On 3/1/2024 1:15 PM, Ma Jun wrote:
> Fix the pwm_mode value error which used for
> pwm1_enable setting
>
> Signed-off-by: Ma Jun
> ---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 12 +++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
The idea behind this patch is to delay the freeing of PT entry objects
until the TLB flush is done.
This patch:
- Adds a tlb_flush_waitlist which will keep the objects that need to be
freed after tlb_flush
- Adds PT entries in this list in amdgpu_vm_pt_free_dfs, instead of freeing
them immedia
From: Christian König
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
Solve this by moving the TLB flush into a DMA-fence object which
can be used to delay the free
The 'mask' array could be used in a way that would make the code
vulnerable to a Spectre attack. The issue is likely related to the fact
that the 'mask' array is being indexed using values that are derived
from user input (the 'se' and 'sh' variables), which could potentially
be manipulated by an a
Add ring timeout related information in the amdgpu
devcoredump file for debugging purposes.
During the gpu recovery process the registered call
is triggered and add the debug information in data
file created by devcoredump framework under the
directory /sys/class/devcoredump/devcdx/
Signed-off-by
Am 01.03.24 um 12:07 schrieb Shashank Sharma:
From: Christian König
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
Solve this by moving the TLB flush into a DMA-
On 01/03/2024 13:59, Christian König wrote:
Am 01.03.24 um 12:07 schrieb Shashank Sharma:
From: Christian König
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
Am 01.03.24 um 12:07 schrieb Shashank Sharma:
The idea behind this patch is to delay the freeing of PT entry objects
until the TLB flush is done.
This patch:
- Adds a tlb_flush_waitlist which will keep the objects that need to be
freed after tlb_flush
- Adds PT entries in this list in amdg
Ping?
On Wed, Feb 28, 2024 at 4:12 PM Alex Deucher wrote:
>
> Need to check the offset bits for values greater than 255.
>
> v2: also update amdgpu_dm_connector values.
>
> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3203
> Signed-off-by: Alex Deucher
> ---
> .../gpu/drm/amd/display
On 3/1/2024 6:15 PM, Srinivasan Shanmugam wrote:
> The 'mask' array could be used in a way that would make the code
> vulnerable to a Spectre attack. The issue is likely related to the fact
> that the 'mask' array is being indexed using values that are derived
> from user input (the 'se' and 'sh
We are seeking nominations for candidates for election to the X.org
Foundation Board of Directors. However, as we presently do not have
enough nominations to start the election - the decision has been made to
extend the timeline by 2 weeks. Note this is a fairly regular part of
the elections pr
Am 01.03.24 um 15:01 schrieb Lazar, Lijo:
On 3/1/2024 6:15 PM, Srinivasan Shanmugam wrote:
The 'mask' array could be used in a way that would make the code
vulnerable to a Spectre attack. The issue is likely related to the fact
that the 'mask' array is being indexed using values that are derived
On 3/1/2024 7:52 PM, Christian König wrote:
> Am 01.03.24 um 15:01 schrieb Lazar, Lijo:
>> On 3/1/2024 6:15 PM, Srinivasan Shanmugam wrote:
>>> The 'mask' array could be used in a way that would make the code
>>> vulnerable to a Spectre attack. The issue is likely related to the fact
>>> that th
On 3/1/2024 00:35, Kim, Jonathan wrote:
> The range check should probably flag any exception prefixed as
> EC_QUEUE_PACKET_* as valid defined in kfd_dbg_trap_exception_code:
> https://github.com/torvalds/linux/blob/master/include/uapi/linux/kfd_ioctl.h#L857
> + Jay to confirm this is the correct
On 2024-03-01 08:55, Alex Deucher wrote:
> Ping?
>
> On Wed, Feb 28, 2024 at 4:12 PM Alex Deucher
> wrote:
>>
>> Need to check the offset bits for values greater than 255.
>>
>> v2: also update amdgpu_dm_connector values.
>>
>> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3203
>> S
On 2024-02-05 12:05, Shashank Sharma wrote:
This patch changes the handling and lifecycle of vm->task_info object.
The major changes are:
- vm->task_info is a dynamically allocated ptr now, and its uasge is
reference counted.
- introducing two new helper funcs for task_info lifecycle managemen
On 01/03/2024 18:07, Felix Kuehling wrote:
On 2024-02-05 12:05, Shashank Sharma wrote:
This patch changes the handling and lifecycle of vm->task_info object.
The major changes are:
- vm->task_info is a dynamically allocated ptr now, and its uasge is
reference counted.
- introducing two new h
On 01/03/2024 14:29, Christian König wrote:
Am 01.03.24 um 12:07 schrieb Shashank Sharma:
The idea behind this patch is to delay the freeing of PT entry objects
until the TLB flush is done.
This patch:
- Adds a tlb_flush_waitlist which will keep the objects that need to be
freed after tl
Hi Dave, Sima,
A few more updates for 6.9.
The following changes since commit 31e0a586f3385134bcad00d8194eb0728cb1a17d:
drm/amdgpu: add MMHUB 3.3.1 support (2024-02-19 14:50:46 -0500)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-next-
On 2024-02-29 01:04, Jesse.Zhang wrote:
fix the issue:
"amdgpu: Failed to create process VM object".
[Why]when amdgpu initialized, seq64 do mampping and update bo mapping in vm
page table.
But when clifo run. It also initializes a vm for a process device through the
function kfd_process_device
On 2024-03-01 06:07, Shashank Sharma
wrote:
From: Christian König
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
Solve this
On 2024-03-01 06:07, Shashank Sharma
wrote:
The idea behind this patch is to delay the freeing of PT entry objects
until the TLB flush is done.
This patch:
- Adds a tlb_flush_waitlist which will keep the objects that need to be
freed after tlb_flush
- Adds
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