Clean up a typo in pr_err() erroneously printing NI MC 'rdev->mc_fw->size'
during SMC firmware load. Log 'rdev->smc_fw->size' instead.
Found by Linux Verification Center (linuxtesting.org) with static
analysis tool SVACE.
Fixes: 6596afd48af4 ("drm/radeon/kms: add dpm support for btc (v3)")
Signed
Since 'adev->dm.dc' in amdgpu_dm_fini() might turn out to be NULL
before the call to dc_enable_dmub_notifications(), check
beforehand to ensure there will not be a possible NULL-ptr-deref
there.
Also, since commit 1e88eb1b2c25 ("drm/amd/display: Drop
CONFIG_DRM_AMD_DC_HDCP") there are two separate
Hi Alexander,
在 2024/2/6 1:12, Deucher, Alexander 写道:
Are you only seeing the problem with this patch applied or in general? If you
are seeing it in general, it likely related to a firmware issue that was
recently fixed that will be resolved with an update CP firmware image.
Driver side chang
denote S to the actual clock in smu v13.0.0/v13.0.7/v13.0.10
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 12 ++--
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 12 ++--
2 files changed, 12 insertions(+), 12 deletions(-)
diff --
On 2/7/2024 2:03 PM, Kenneth Feng wrote:
> denote S to the actual clock in smu v13.0.0/v13.0.7/v13.0.10
>
> Signed-off-by: Kenneth Feng
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 12 ++--
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 12 ++--
> 2
implement smu send rma reason function for smu v13.0.6
Signed-off-by: Yang Wang
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 15 ++
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 1 +
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 ++
drive
send smu rma reason event to smu in ras eeprom driver.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 2fde93b
[AMD Official Use Only - General]
With a nitpick below, the series is
Reviewed-by: Hawking Zhang
+ MSG_MAP(BadPageThreshold,
PPSMC_MSG_RmaDueToBadPageThreshold,0),
Might be better name it to RmaDueToBadPageThreshold/SMU_MSG_
RmaDueToBadPageThreshold
Regards,
[AMD Official Use Only - General]
Thanks , I will correct it before submitting.
Best Regards,
Kevin
-Original Message-
From: Zhang, Hawking
Sent: Wednesday, February 7, 2024 10:00 PM
To: Wang, Yang(Kevin) ; amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Lazar, Lijo
Subject: RE: [PATCH
The 2024 X.Org Foundation elections are rapidly approaching. We will be
forwarding the election schedule and nominating process to the
membership shortly.
Please note that only current members can vote in the upcoming election,
and that the deadline for new memberships or renewals to vote in
[AMD Official Use Only - General]
Reviewed-by: Ruijing Dong
Thanks,
Ruijing
-Original Message-
From: amd-gfx On Behalf Of Thong
Sent: Tuesday, February 6, 2024 6:28 PM
To: amd-gfx@lists.freedesktop.org
Cc: Thai, Thong
Subject: [PATCH] drm/amdgpu/soc21: update VCN 4 max HEVC encoding r
Am 01.02.24 um 17:50 schrieb Philip Yang:
SVM migration unmap pages from GPU and then update mapping to GPU to
recover page fault. Currently unmap clears the PDE entry for range
length >= huge page and free PTB bo, update mapping to alloc new PT bo.
There is race bug that the freed entry bo maybe
[AMD Official Use Only - General]
Reviewed-by: Mukul Joshi
> -Original Message-
> From: Russell, Kent
> Sent: Tuesday, February 6, 2024 4:32 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Joshi, Mukul ; Russell, Kent
>
> Subject: [PATCH v2] drm/amdkfd: Fix L2 cache size reporting in GFX9
Few users have observed display corruption when they boot
the machine to KDE Plasma or playing games. We have root
caused the problem that whenever alloc_range() couldn't
find the required memory blocks the function was returning
SUCCESS in some of the corner cases.
The right approach would be if
commit 5095d5418193 ("drm/amd: Evict resources during PM ops prepare()
callback")
intentionally moved the eviction of resources to earlier in the suspend
process, but this introduced a subtle change that it occurs before adev->in_s0ix
or adev->in_s3 are set. This meant that APUs actually started t
commit ab4750332dbe ("drm/amdgpu/sdma5.2: add begin/end_use ring callbacks")
caused GFXOFF control to be used more heavily and the codepath that was
removed from commit 0dee72639533 ("drm/amd: flush any delayed gfxoff on
suspend entry") now can be exercised at suspend again.
Users report that by u
Summary:
* Revert some changes related to pixel encoding and clocks that cause
corruption
* IPS hang fix and FGCG enable by default for DCN35
* PSR-SU/Replay fixes
* Plane clip size change treated as medium update
* Fix for checking link alignment done during link tra
From: Zhikai Zhai
[WHY]
We Double-check link status if training successful,
but miss the lane align status.
[HOW]
Add the lane align status check
Reviewed-by: Wenjing Liu
Acked-by: Aurabindo Pillai
Signed-off-by: Zhikai Zhai
---
.../gpu/drm/amd/display/dc/link/protocols/link_dp_training.c |
From: Sohaib Nadeem
[why]:
This reverts commit 5abbfa320b88da6034fd4121fa68c2b0e15e97ac.
The commit caused corruption when running some applications in fullscreen
Reviewed-by: Alvin Lee
Acked-by: Aurabindo Pillai
Signed-off-by: Sohaib Nadeem
---
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn3
From: Wenjing Liu
[why]
When clip size is changed recout and viewport size would require an
update. When the update is clip size only current driver fails to
program the update into hardware.
[how]
Set a new clip_size_change flag when it is detected and set MED update
type and reprogram scaling
From: Tom Chung
[Why]
The original picture aspect ratio in mode struct may have chance be
overwritten with wrong aspect ratio data in create_stream_for_sink().
It will create a different VIC output and cause HDMI compliance test
failed.
[How]
Preserve the original picture aspect ratio data durin
From: Michael Strauss
[WHY]
Need to fix some broken logic and sequencing in initial commit
[HOW]
Fix logic handling override deprogramming when exiting SQ128.
Don't exit early from dp_set_hw_lane_settings for DP2/FIXED_VS case.
Move LTTPR 128b/132b check out of requires_hwss and check during
From: Gabe Teeger
This reverts commit 3fda240dc2f6a4a9a3965b80cfb83d0ddfbf489c.
System hang observed, this commit is thought to be the
regression point.
Reviewed-by: Ovidiu Bunea
Acked-by: Aurabindo Pillai
Signed-off-by: Gabe Teeger
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk
From: Martin Tsai
[Why]
Without acquiring DMCUB hw lock, a race condition is caused with
Panel Replay feature, which will trigger a hang. Indicate that a
lock is necessary to prevent this when replay feature is enabled.
[How]
To allow dmub hw lock on Replay.
Reviewed-by: Robin Chen
Acked-by: A
From: Sohaib Nadeem
[why]:
issues fixed:
- comparison with wider integer type in loop condition which can cause
infinite loops
- pointer dereference before null check
Reviewed-by: Josip Pavic
Acked-by: Aurabindo Pillai
Signed-off-by: Sohaib Nadeem
---
.../gpu/drm/amd/display/dc/bios/bios_par
From: Roman Li
[Why]
There is a potential memory access violation while
iterating through array of dcn35 clks.
[How]
Limit iteration per array size.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Aurabindo Pillai
Signed-off-by: Roman Li
---
.../amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 15
From: Charlene Liu
[why]
sw has most of the fgcg enabled which is the same as HW default.
but driver disabled some due to enable flag not initialized.
comparing HW state, we still need to enable dpp and dio.
Reviewed-by: Muhammad Ahmed
Acked-by: Aurabindo Pillai
Signed-off-by: Charlene Liu
-
From: George Shen
[Why/How]
A regression was identified with the change to add left edge pixel for
YCbCr422/420 + ODM combine cases.
This reverts commit 8d09500a33f6a0e0df9cf17822fe51520d0df002
Reviewed-by: Martin Leung
Acked-by: Aurabindo Pillai
Signed-off-by: George Shen
---
drivers/gpu/d
From: Nicholas Kazlauskas
[Why]
Read modify write hazards can occur when using a single shared scratch
register between driver and firmware leading to driver accessing DCN
in IPS2 and a system hang.
[How]
Add infrastructure for using REGION6 as a shared firmware state between
driver and firmware
From: Charlene Liu
[why]
allow psr-su/replay for z8
Reviewed-by: Muhammad Ahmed
Reviewed-by: Sung joon Kim
Acked-by: Aurabindo Pillai
Signed-off-by: Charlene Liu
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c | 12 ++--
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
From: Aric Cyr
Summary:
* Revert some changes related to pixel encoding and clocks that cause
corruption
* IPS hang fix and FGCG enable by default for DCN35
* PSR-SU/Replay fixes
* Plane clip size change treated as medium update
* Fix for checking link alignment done during link training.
* HD
From: Nicholas Kazlauskas
[Why]
New worst-case measurement observed at 1897us.
[How]
Increase to 2000us to cover the new worst case + margin.
Reviewed-by: Ovidiu Bunea
Acked-by: Aurabindo Pillai
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resou
From: Charlene Liu
[ Upstream commit b5abd7f983e14054593dc91d6df2aa5f8cc67652 ]
[why]
BIOS's integration info table not following the original order
which is phy instance is ext_displaypath's array index.
[how]
Move them to follow the original order.
Reviewed-by: Muhammad Ahmed
Acked-by: Tom
From: Sohaib Nadeem
[ Upstream commit 2ff33c759a4247c84ec0b7815f1f223e155ba82a ]
[why]
Originally, PMFW said min FCLK is 300Mhz, but min DCFCLK can be increased
to 400Mhz because min FCLK is now 600Mhz so FCLK >= 1.5 * DCFCLK hardware
requirement will still be satisfied. Increasing min DCFCLK ad
From: Mukul Joshi
[ Upstream commit 4119734e06a7f30e7e8eb92a58b85dca0269 ]
On GFX 9.4.3, for a given KFD node, fetch the correct drm device from
XCP manager when checking for cgroup permissions.
Signed-off-by: Mukul Joshi
Reviewed-by: Harish Kasiviswanathan
Signed-off-by: Alex Deucher
Si
From: Dmytro Laktyushkin
[ Upstream commit 31c2bf25eaf51c2d45f092284a28e97f43b54c15 ]
[Why]
Secondary DP2 display fails to light up in some instances
[How]
Clock needs to be on when DPSTREAMCLK*_EN =1. This change
moves dtbclk_p enable/disable point to make sure this is
the case
Reviewed-by: C
From: Mukul Joshi
[ Upstream commit 4119734e06a7f30e7e8eb92a58b85dca0269 ]
On GFX 9.4.3, for a given KFD node, fetch the correct drm device from
XCP manager when checking for cgroup permissions.
Signed-off-by: Mukul Joshi
Reviewed-by: Harish Kasiviswanathan
Signed-off-by: Alex Deucher
Si
From: Sohaib Nadeem
[ Upstream commit 2ff33c759a4247c84ec0b7815f1f223e155ba82a ]
[why]
Originally, PMFW said min FCLK is 300Mhz, but min DCFCLK can be increased
to 400Mhz because min FCLK is now 600Mhz so FCLK >= 1.5 * DCFCLK hardware
requirement will still be satisfied. Increasing min DCFCLK ad
From: Sohaib Nadeem
[ Upstream commit 2ff33c759a4247c84ec0b7815f1f223e155ba82a ]
[why]
Originally, PMFW said min FCLK is 300Mhz, but min DCFCLK can be increased
to 400Mhz because min FCLK is now 600Mhz so FCLK >= 1.5 * DCFCLK hardware
requirement will still be satisfied. Increasing min DCFCLK ad
On Wed, Feb 7, 2024 at 3:48 PM Mario Limonciello
wrote:
>
> commit 5095d5418193 ("drm/amd: Evict resources during PM ops prepare()
> callback")
> intentionally moved the eviction of resources to earlier in the suspend
> process, but this introduced a subtle change that it occurs before
> adev->i
On 2/7/2024 16:34, Alex Deucher wrote:
On Wed, Feb 7, 2024 at 3:48 PM Mario Limonciello
wrote:
commit 5095d5418193 ("drm/amd: Evict resources during PM ops prepare()
callback")
intentionally moved the eviction of resources to earlier in the suspend
process, but this introduced a subtle change
On Wed, Feb 7, 2024 at 4:18 PM Mario Limonciello
wrote:
>
> commit ab4750332dbe ("drm/amdgpu/sdma5.2: add begin/end_use ring callbacks")
> caused GFXOFF control to be used more heavily and the codepath that was
> removed from commit 0dee72639533 ("drm/amd: flush any delayed gfxoff on
> suspend ent
On Wed, Feb 7, 2024 at 5:36 PM Mario Limonciello
wrote:
>
> On 2/7/2024 16:34, Alex Deucher wrote:
> > On Wed, Feb 7, 2024 at 3:48 PM Mario Limonciello
> > wrote:
> >>
> >> commit 5095d5418193 ("drm/amd: Evict resources during PM ops prepare()
> >> callback")
> >> intentionally moved the evictio
The drm_get_acpi_edid() helper is for drivers that would prefer
to get the EDID from ACPI instead of from the panel.
Earlier versions of this series were aimed at using this in amdgpu
and nouveau.
This version does NOT update amdgpu as the change will require a
larger overhaul to use struct drm_e
Rather than inventing a wrapper to acpi_video_get_edid() use the
one provided by drm. This fixes two problems:
1. A memory leak that the memory provided by the ACPI call was
never freed.
2. Validation of the BIOS provided blob.
Convert the usage in nouveau_connector_detect_lvds() to use
struct
All of the selects on ACPI_VIDEO are unnecessary when DRM does the
select for ACPI_VIDEO as it provides a helper for acpi based EDID.
Reviewed-by: Pranjal Ramajor Asha Kanojiya
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/amdgpu/Kconfig | 7 ---
drivers/gpu/drm/gma500/Kconfig
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops. Drivers can call this
helper to attempt to fetch the EDID from the BIOS's ACPI _DDC method.
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/Kconfig| 5 +++
drivers/gpu/drm/dr
In certain cooperative group dispatch scenarios the default SPI resource
allocation may cause reduced per-CU workgroup occupancy. Set
COMPUTE_RESOURCE_LIMITS.FORCE_SIMD_DIST=1 to mitigate soft hang
scenarions.
Suggested-by: Joseph Greathouse
Signed-off-by: Rajneesh Bhardwaj
---
* Found a bug in
denote S to the deep sleep clock for the clock output on smu
v13.0.0/v13.0.7/v13.0.10
Signed-off-by: Kenneth Feng
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 27 +--
.../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 27 +--
2 files changed, 38 insertions(+)
commit ab4750332dbe ("drm/amdgpu/sdma5.2: add begin/end_use ring
callbacks") caused GFXOFF control to be used more heavily and the
codepath that was removed from commit 0dee72639533 ("drm/amd: flush any
delayed gfxoff on suspend entry") now can be exercised at suspend again.
Users report that by u
amdgpu_acpi_is_s0ix_active() and amdgpu_acpi_is_s0ix_active() aren't
needed to be checked multiple times in a suspend cycle. Checking and
setting up policy one time in the prepare() callback is sufficient.
Signed-off-by: Mario Limonciello
---
v4: New patch
---
drivers/gpu/drm/amd/amdgpu/amdgpu.
commit 5095d5418193 ("drm/amd: Evict resources during PM ops prepare()
callback") intentionally moved the eviction of resources to earlier in
the suspend process, but this introduced a subtle change that it occurs
before adev->in_s0ix or adev->in_s3 are set. This meant that APUs
actually started to
Am 08.02.24 um 06:52 schrieb Mario Limonciello:
amdgpu_acpi_is_s0ix_active() and amdgpu_acpi_is_s0ix_active() aren't
needed to be checked multiple times in a suspend cycle. Checking and
setting up policy one time in the prepare() callback is sufficient.
Mhm, looking at amdgpu_acpi_is_s3_active
Am 07.02.24 um 18:44 schrieb Arunpravin Paneer Selvam:
Few users have observed display corruption when they boot
the machine to KDE Plasma or playing games. We have root
caused the problem that whenever alloc_range() couldn't
find the required memory blocks the function was returning
SUCCESS in s
On 2/8/2024 11:04 AM, Kenneth Feng wrote:
> denote S to the deep sleep clock for the clock output on smu
> v13.0.0/v13.0.7/v13.0.10
>
> Signed-off-by: Kenneth Feng
> ---
> .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 27 +--
> .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
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