Jpeg DPG support for GC IP v11_5_0
Signed-off-by: Saleemkhan Jamadar
Reviewed-by: Leo Liu
Reviewed-by: Veerabadhran Gopalakrishnan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 44
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h | 36 +++
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c | 312 +++
add ucode id and cmd buffer for jpeg psp sram programming
and Jpeg DPG support.
Signed-off-by: Saleemkhan Jamadar
Reviewed-by: Leo Liu
Reviewed-by: Veerabadhran Gopalakrishnan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 2 ++
drivers/gpu/d
On 2/2/2024 3:41 AM, Mario Limonciello wrote:
All of the selects on ACPI_VIDEO are unnecessary when DRM does the
select for ACPI_VIDEO as it provides a helper for acpi based EDID.
Signed-off-by: Mario Limonciello
Reviewed-by: Pranjal Ramajor Asha Kanojiya
On 2/2/2024 3:41 AM, Mario Limonciello wrote:
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops. Drivers can call this
helper to attempt to fetch the EDID from the BIOS's ACPI _DDC method.
Signed-off-by: Mario Limonciello
---
v1->v2
On Thu, 01 Feb 2024, Mario Limonciello wrote:
> Some manufacturers have intentionally put an EDID that differs from
> the EDID on the internal panel on laptops. Drivers can call this
> helper to attempt to fetch the EDID from the BIOS's ACPI _DDC method.
I'm really not happy about adding new str
Hello Christian,
Any update on finding an upstreamable solution for this problem?
Having working hang recovery is really important for us on Steam Deck,
and it would be nice to have an upstream solution, and not carry a bunch
of patches you disagree with. :P
Thanks
- Joshie 🐸✨
On 1/23/24 12
Instead of software managed counters.
Signed-off-by: Candice Li
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6
Hi Joshie,
the first patch is already on the way upstream since that is a clear bug
fix.
Sunil has setup a test system and contacted up with Friedrich to get his
hands on the test application and reproduced the problem. It looks like
that the OVERFLOW_CLEAR bit is only the tip of the iceberg
[Public]
> -Original Message-
> From: SHANMUGAM, SRINIVASAN
> Sent: Thursday, February 1, 2024 12:36 PM
> To: Deucher, Alexander ; Koenig, Christian
>
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
>
> Subject: [PATCH] drm/amdgpu: Fix potential out-of-bounds access in
> 'amd
./drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c:236:49-51: WARNING !A || A
&& B is equivalent to !A || B.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=8169
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c | 2 +-
1 file cha
[AMD Official Use Only - General]
> -Original Message-
> From: Liang, Prike
> Sent: Thursday, February 1, 2024 3:58 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Sharma, Deepak
> ; Liang, Prike
> Subject: [PATCH 1/2] drm/amdgpu: skip to program GFXDEC registers for
>
[Public]
> -Original Message-
> From: Liang, Prike
> Sent: Thursday, February 1, 2024 3:58 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Sharma, Deepak
> ; Liang, Prike
> Subject: [PATCH 2/2] drm/amdgpu: reset gpu for s3 suspend abort case
>
> In the s3 suspend abort
On 2/2/2024 04:29, Jani Nikula wrote:
On Thu, 01 Feb 2024, Mario Limonciello wrote:
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops. Drivers can call this
helper to attempt to fetch the EDID from the BIOS's ACPI _DDC method.
I'm r
We want programs besides the compositor to be able to enable or disable
panel power saving features. However, since they are currently only
configurable through DRM properties, that isn't possible. So, to remedy
that issue introduce a new "panel_power_savings" sysfs attribute.
Cc: Mario Limonciell
The issue arises when the array 'adev->vcn.vcn_config' is accessed
before checking if the index 'adev->vcn.num_vcn_inst' is within the
bounds of the array.
The fix involves moving the bounds check before the array access. This
ensures that 'adev->vcn.num_vcn_inst' is within the bounds of the array
The present way to fetch VRAM vendor information turns out to be not
reliable on GFX 9.4.3 dGPUs as well. Avoid using the data.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/
The issue arises when the array 'adev->vcn.vcn_config' is accessed
before checking if the index 'adev->vcn.num_vcn_inst' is within the
bounds of the array.
The fix involves moving the bounds check before the array access. This
ensures that 'adev->vcn.num_vcn_inst' is within the bounds of the array
On Thu, Feb 1, 2024 at 11:11 PM Mario Limonciello
wrote:
>
> The ACPI specification allows for an EDID to be up to 512 bytes but
> the _DDC EDID fetching code will only try up to 256 bytes.
>
> Modify the code to instead start at 512 bytes and work it's way
> down instead.
>
> As _DDC is now calle
On 2/2/2024 10:07, Rafael J. Wysocki wrote:
On Thu, Feb 1, 2024 at 11:11 PM Mario Limonciello
wrote:
The ACPI specification allows for an EDID to be up to 512 bytes but
the _DDC EDID fetching code will only try up to 256 bytes.
Modify the code to instead start at 512 bytes and work it's way
d
On 2024-02-01 13:54, Rajneesh Bhardwaj wrote:
In certain cooperative group dispatch scenarios the default SPI resource
allocation may cause reduced per-CU workgroup occupancy. Set
COMPUTE_RESOURCE_LIMITS.FORCE_SIMD_DIST=1 to mitigate soft hang
scenarions.
Suggested-by: Joseph Greathouse
Signe
On 2/2/2024 09:28, Hamza Mahfooz wrote:
We want programs besides the compositor to be able to enable or disable
panel power saving features. However, since they are currently only
configurable through DRM properties, that isn't possible. So, to remedy
that issue introduce a new "panel_power_savin
On Fri, Feb 2, 2024 at 10:13 AM Jiapeng Chong
wrote:
>
> ./drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c:236:49-51: WARNING !A || A
> && B is equivalent to !A || B.
>
> Reported-by: Abaci Robot
> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=8169
> Signed-off-by: Jiapeng Chong
Appl
On Fri, Feb 2, 2024 at 10:53 AM Lijo Lazar wrote:
>
> The present way to fetch VRAM vendor information turns out to be not
> reliable on GFX 9.4.3 dGPUs as well. Avoid using the data.
>
> Signed-off-by: Lijo Lazar
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 --
On Fri, Feb 2, 2024 at 10:53 AM Srinivasan Shanmugam
wrote:
>
> The issue arises when the array 'adev->vcn.vcn_config' is accessed
> before checking if the index 'adev->vcn.num_vcn_inst' is within the
> bounds of the array.
>
> The fix involves moving the bounds check before the array access. This
[AMD Official Use Only - General]
> -Original Message-
> From: Kuehling, Felix
> Sent: Monday, January 22, 2024 2:02 PM
> To: amd-gfx@lists.freedesktop.org; Greathouse, Joseph
>
> Subject: Re: [PATCH] drm/amdkfd: Add cache line sizes to KFD topology
>
> On 2024-01-19 21:21, Joseph Great
From: Roman Li
[ Upstream commit 8894b9283afd35b8d22ae07a0c118eb5f7d2e78b ]
[Why]
While in IPS2 an access to dcn registers is not allowed.
If interrupt results in dc call, we should disable IPS.
[How]
Safeguard register access in IPS2 by disabling idle optimization
before calling dc interrupt s
[AMD Official Use Only - General]
> -Original Message-
> From: Kuehling, Felix
> Sent: Friday, February 2, 2024 10:21 AM
> To: Bhardwaj, Rajneesh ;
> amd-gfx@lists.freedesktop.org
> Cc: Greathouse, Joseph
> Subject: Re: [PATCH] drm/amdkfd: update SIMD distribution algo for GFXIP
> 9.4.
Currently, drivers have no mechanism to block requests to unbind
devices. However, this can cause resource leaks and leave the device in
an inconsistent state, such that rebinding the device may cause a hang
or otherwise prevent the device from being rebound. So, introduce
the can_remove() callback
Wire up the can_remove() callback, such that pci drivers can implement
their own version of it.
Cc: sta...@vger.kernel.org
Signed-off-by: Hamza Mahfooz
---
drivers/pci/pci-driver.c | 12
include/linux/pci.h | 5 +
2 files changed, 17 insertions(+)
diff --git a/drivers/pci
Removing an amdgpu device that still has user space references allocated
to it causes undefined behaviour. So, implement amdgpu_pci_can_remove()
and disallow devices that still have files allocated to them from being
unbound.
Cc: sta...@vger.kernel.org
Signed-off-by: Hamza Mahfooz
---
drivers/gp
On 2024-02-02 17:24, Greathouse, Joseph wrote:
[AMD Official Use Only - General]
-Original Message-
From: Kuehling, Felix
Sent: Friday, February 2, 2024 10:21 AM
To: Bhardwaj, Rajneesh ;
amd-gfx@lists.freedesktop.org
Cc: Greathouse, Joseph
Subject: Re: [PATCH] drm/amdkfd: update SIMD
[+cc Bartosz]
On Fri, Feb 02, 2024 at 05:25:56PM -0500, Hamza Mahfooz wrote:
> Removing an amdgpu device that still has user space references allocated
> to it causes undefined behaviour. So, implement amdgpu_pci_can_remove()
> and disallow devices that still have files allocated to them from bein
On 2024-02-01 11:50, Philip Yang wrote:
SVM migration unmap pages from GPU and then update mapping to GPU to
recover page fault. Currently unmap clears the PDE entry for range
length >= huge page and free PTB bo, update mapping to alloc new PT bo.
There is race bug that the freed entry bo maybe
When dc_state_destruct() was refactored the new phantom_stream_count
and phantom_plane_count members weren't cleared.
Fixes: 012a04b1d6af ("drm/amd/display: Refactor phantom resource allocation")
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/display/dc/core/dc_state.c | 3 +++
1 file
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