[PATCH] drm/amdgpu: Fix 'adev->gfx.rlc_fw' from request_firmware() not released in 'gfx_v10_0_init_microcode()'

'adev->gfx.rlc_fw' may not be released before end of gfx_v10_0_init_microcode() function. Using the function release_firmware() to release adev->gfx.rlc_fw. Fixes the below: drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:4046 gfx_v10_0_init_microcode() warn: 'adev->gfx.rlc_fw' from request_firmware() no

[PATCH v2 1/2] drm/amdgpu/pm: Add default case for smu IH process func

Add default case for smu IH process func. Signed-off-by: Ma Jun Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 4 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 4 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 5 - 3 files cha

[PATCH v2 2/2] drm/amdgpu/pm: Use macro definitions in the smu IH process function

Replace the hard-coded numbers with macro definition Signed-off-by: Ma Jun --- .../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h | 11 --- .../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_6.h | 4 .../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h | 11 --- drivers/gpu/drm/a

Re: [PATCH] drm/amdgpu: Fix 'adev->gfx.rlc_fw' from request_firmware() not released in 'gfx_v10_0_init_microcode()'

On 1/23/2024 1:38 PM, Srinivasan Shanmugam wrote: > 'adev->gfx.rlc_fw' may not be released before end of > gfx_v10_0_init_microcode() function. > > Using the function release_firmware() to release adev->gfx.rlc_fw. > > Fixes the below: > drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:4046 gfx_v10_0_in

Re: [PATCH] drm/amdgpu: Fix 'adev->gfx.rlc_fw' from request_firmware() not released in 'gfx_v10_0_init_microcode()'

[AMD Official Use Only - General] + @Yin, ZhenGuo (Chris) for review BR/ Monk Liu (Cloud and Virtualization Solution, SRDC) From: amd-gfx on behalf of Srinivasan Shanmugam Date: Tuesday, January 23, 2024 at 16:09 To: Koenig, Christian , Deucher, Alexander Cc: La

RE: [PATCH] mm: Remove double faults once write a device pfn

[AMD Official Use Only - General] > > The vmf_insert_pfn_prot could cause unnecessary double faults on a > > device pfn. Because currently the vmf_insert_pfn_prot does not make > > the pfn writable so the pte entry is normally read-only or dirty > > catching. > > What? How do you got to this concl

Re: [PATCH] drm/amdgpu: check flag ring->no_scheduler before usage

On 1/21/2024 5:49 AM, vitaly.pros...@amd.com wrote: > From: Vitaly Prosyak > >The issue started to appear after the following commit > 11b3b9f461c5c4f700f6c8da202fcc2fd6418e1f (scheduler to variable number > of run-queues). The scheduler flag ready (ring->sched.ready) could not be > use

Re: [PATCH] drm/amdgpu: covert some variable sized arrays to [] style

On 1/22/2024 8:30 PM, Alex Deucher wrote: > Replace [1] with []. Silences UBSAN warnings. > > Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3107 > Signed-off-by: Alex Deucher typo => covert-> convert With the typo fixed in the subject - Reviewed-by: Lijo Lazar Thanks, Li

Re: [PATCH v2 2/2] drm/amdgpu/pm: Use macro definitions in the smu IH process function

On 1/23/2024 1:43 PM, Ma Jun wrote: > Replace the hard-coded numbers with macro definition > > Signed-off-by: Ma Jun Series is Reviewed-by: Lijo Lazar Thanks, Lijo > --- > .../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h | 11 --- > .../pm/swsmu/inc/pmfw_if/smu13_driver_

Re: [PATCH v2 0/8] Expand and improve AMDGPU documentation

Am 22.01.24 um 22:24 schrieb Rodrigo Siqueira: This patchset improves how the AMDGPU display documentation is organized, expands the kernel-doc to extract information from the source, and adds more context about DC workflow. Finally, at the end of this series, we also introduce a contribution sec

Re: [PATCH 1/2] drm/amdgpu: Reset IH OVERFLOW_CLEAR bit after writing rptr

Am 22.01.24 um 23:39 schrieb Joshua Ashton: [SNIP] Most work submissions in practice submit more waves than the number of wave slots the GPU has. As far as I understand soft recovery, the only thing it does is kill all active waves. This frees up the CUs so more waves are launched, which c

Re: [PATCH 1/2] drm/amdgpu: Reset IH OVERFLOW_CLEAR bit after writing rptr

On 23.01.24 10:36, Christian König wrote: Am 22.01.24 um 23:39 schrieb Joshua Ashton: [SNIP] Most work submissions in practice submit more waves than the number of wave slots the GPU has. As far as I understand soft recovery, the only thing it does is kill all active waves. This frees up the

Re: [PATCH] mm: Remove double faults once write a device pfn

Am 23.01.24 um 09:33 schrieb Zhou, Xianrong: [AMD Official Use Only - General] The vmf_insert_pfn_prot could cause unnecessary double faults on a device pfn. Because currently the vmf_insert_pfn_prot does not make the pfn writable so the pte entry is normally read-only or dirty catching. What?

[PATCH v3 1/2] drm/amdgpu: Reset IH OVERFLOW_CLEAR bit

Allows us to detect subsequent IH ring buffer overflows as well. Cc: Joshua Ashton Cc: Alex Deucher Cc: Christian König Cc: sta...@vger.kernel.org Signed-off-by: Friedrich Vock --- v2: Reset CLEAR_OVERFLOW bit immediately after setting it v3: Move everything related to fence processing on ove

[PATCH v3 2/2] drm/amdgpu: Process fences on IH overflow

If the IH ring buffer overflows, it's possible that fence signal events were lost. Check each ring for progress to prevent job timeouts/GPU hangs due to the fences staying unsignaled despite the work being done. Cc: Joshua Ashton Cc: Alex Deucher Cc: Christian König Cc: sta...@vger.kernel.org

[PATCH 1/1] drm/amdgpu: fix wrong sizeof argument

voltage_parameters is a point to a struct of type SET_VOLTAGE_PARAMETERS_V1_3. Passing just voltage_parameters would not print the right size of the struct variable. So we need to pass *voltage_parameters to sizeof(). Fixes: 4630d5031cd8 ("drm/amdgpu: check PS, WS index") Signed-off-by: Samasth N

[bug report] drm/amd/display: Add dpia display mode validation logic

Hello Meenakshikumar Somasundaram, The patch 59f1622a5f05: "drm/amd/display: Add dpia display mode validation logic" from Dec 5, 2023 (linux-next), leads to the following Smatch static checker warning: drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_dpia_bw.c:208 get_hos

[PATCH 1/1] drm/amdgpu: fix wrong sizeof argument

voltage_parameters is a point to a struct of type SET_VOLTAGE_PARAMETERS_V1_3. Passing just voltage_parameters would not print the right size of the struct variable. So we need to pass *voltage_parameters to sizeof(). Fixes: 4630d5031cd8 ("drm/amdgpu: check PS, WS index") Signed-off-by: Samasth N

Re: BUG [RESEND]: kernel NULL pointer dereference, address: 0000000000000008

On 22. 01. 2024. 09:34, Ma, Jun wrote: > Perhaps similar to the problem I encountered earlier, you can > try the following patch > > https://lists.freedesktop.org/archives/amd-gfx/2024-January/103259.html Appaarently, this patch prevented NULL dereference, it was no longer in the log. However, t

RE: [PATCH v2 2/2] drm/amdgpu/pm: Use macro definitions in the smu IH process function

[AMD Official Use Only - General] HI Jun, I don't think it's necessary to delete these definitions in smu driver_if.h. Adding a prefix can be used to distinguish definitions in the driver and can also make it easier for us to track problems. E.g: SMU_IH_INTERRUPT_ID_TO_DRIVER And definitions in

Re: [PATCH 1/2] drm/amdgpu: Reset IH OVERFLOW_CLEAR bit after writing rptr

Am 23.01.24 um 12:35 schrieb Friedrich Vock: On 23.01.24 10:36, Christian König wrote: Am 22.01.24 um 23:39 schrieb Joshua Ashton: [SNIP] Most work submissions in practice submit more waves than the number of wave slots the GPU has. As far as I understand soft recovery, the only thing it

RE: [PATCH 1/1] drm/amdgpu: fix wrong sizeof argument

Reviewed-by: Yang Wang Best Regards, Kevin -Original Message- From: amd-gfx On Behalf Of Samasth Norway Ananda Sent: Tuesday, January 23, 2024 5:32 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; samasth.norway.ana...@oracle.com Subject: [PATCH 1/1] drm/amdgpu: fix wrong

Re: [PATCH v2] drm/amdgpu: Fix the warning info in mode1 reset

On Fri, Jan 5, 2024 at 1:15 AM Ma Jun wrote: > > Fix the warning info below during mode1 reset. > [ +0.04] Call Trace: > [ +0.04] > [ +0.06] ? show_regs+0x6e/0x80 > [ +0.11] ? __flush_work.isra.0+0x2e8/0x390 > [ +0.05] ? __warn+0x91/0x150 > [ +0.09] ? __flush_wo

[PATCH] drm/amd/display: Fix a potential buffer overflow in 'dp_dsc_clock_en_read()'

Tell snprintf() to store at most 10 bytes in the output buffer instead of 30. Fixes the below: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1508 dp_dsc_clock_en_read() error: snprintf() is printing too much 30 vs 10 Fixes: c06e09b76639 ("drm/amd/display: Add DSC parameters

Re: [PATCH] drm/amd/display: Fix a potential buffer overflow in 'dp_dsc_clock_en_read()'

On 2024-01-23 10:01, Srinivasan Shanmugam wrote: > Tell snprintf() to store at most 10 bytes in the output buffer > instead of 30. > > Fixes the below: > drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1508 > dp_dsc_clock_en_read() error: snprintf() is printing too much 30 vs

Re: [PATCH v2 0/8] Expand and improve AMDGPU documentation

On 1/22/24 16:24, Rodrigo Siqueira wrote: This patchset improves how the AMDGPU display documentation is organized, expands the kernel-doc to extract information from the source, and adds more context about DC workflow. Finally, at the end of this series, we also introduce a contribution section

Re: [PATCH v2 2/2] drm/amdgpu: Implement check_async_props for planes

On 2024-01-23 13:02, Xaver Hugl wrote: > Am Mo., 22. Jan. 2024 um 16:50 Uhr schrieb Harry Wentland > : >> >> >> >> On 2024-01-19 13:25, Ville Syrjälä wrote: >>> On Fri, Jan 19, 2024 at 03:12:35PM -0300, André Almeida wrote: AMD GPUs can do async flips with changes on more properties than ju

[PATCH] drm/amdgpu: Fix module unload hang with RAS enabled

The driver unload hangs because the page retirement kthread cannot be stopped as it is sleeping and waiting on page retirement event to occur. Add kthread_should_stop() to the event condition to wake up the kthread when kthread stop is called during driver unload. Fixes: 45c3d468793d ("drm/amdgpu:

Wanted: pointer to FreeBSD Radeon expertise

I don't know where to ask for help with my Radeon graphics card. I can't get it to work -- always says: "[EE] no screen found" or something like that. I've read everything in the handbook, and several related man pages. I can't get it to work. Surely there is someone in FreeBSD who could point

RE: [PATCH] mm: Remove double faults once write a device pfn

[AMD Official Use Only - General] > >>> The vmf_insert_pfn_prot could cause unnecessary double faults on a > >>> device pfn. Because currently the vmf_insert_pfn_prot does not make > >>> the pfn writable so the pte entry is normally read-only or dirty > >>> catching. > >> What? How do you got to t

[PATCH] drm/amdgpu: Fix driver uninstallation problem

The following is the error message: [ 484.495995] task:rmmod state:D stack:0 pid: 2195 ppid: 2194 flags:0x4002 [ 484.496000] Call Trace: [ 484.496002] [ 484.496007] __schedule+0xaf8/0x1870 [ 484.496015] ? update_load_avg+0x74/0x7b0 [ 484.496021] schedule+0x58/0xc0 [

Re: [PATCH] drm/amdgpu: Fix driver uninstallation problem

Mukul posted a patch for this already. "drm/amdgpu: Fix module unload hang with RAS enabled" Thanks, Lijo On 1/24/2024 9:09 AM, YiPeng Chai wrote: > The following is the error message: > [ 484.495995] task:rmmod state:D stack:0 pid: 2195 ppid: 2194 > flags:0x4002 > [

Re: [PATCH] drm/amdgpu: check flag ring->no_scheduler before usage

On 2024-01-23 04:00, Lazar, Lijo wrote: > > On 1/21/2024 5:49 AM, vitaly.pros...@amd.com wrote: >> From: Vitaly Prosyak >> >>The issue started to appear after the following commit >> 11b3b9f461c5c4f700f6c8da202fcc2fd6418e1f (scheduler to variable number >> of run-queues). The scheduler fla

RE: [PATCH] drm/amdgpu: Fix module unload hang with RAS enabled

[AMD Official Use Only - General] Reviewed-by: Hawking Zhang Regards, Hawking -Original Message- From: Joshi, Mukul Sent: Wednesday, January 24, 2024 05:01 To: amd-gfx@lists.freedesktop.org Cc: Zhang, Hawking ; Chai, Thomas ; Joshi, Mukul Subject: [PATCH] drm/amdgpu: Fix module unload

[PATCH 1/2] drm/amdgpu: add aca sysfs remove support

add aca sysfs remove support. Fixes: d06f6ed6bcc6 ("drm/amdgpu: add aca sysfs support") Signed-off-by: Yang Wang --- drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c b/drivers

[PATCH 2/2] drm/amdgpu: adjust aca init/fini sequence to match gpu reset

- move aca init/fini function into ras init/fini to adapt gpu reset sequence. - add new function amdgpu_aca_reset() Signed-off-by: Yang Wang --- drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c| 7 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.

RE: [PATCH 2/2] drm/amdgpu: adjust aca init/fini sequence to match gpu reset

[AMD Official Use Only - General] Series is Reviewed-by: Hawking Zhang Regards, Hawking -Original Message- From: amd-gfx On Behalf Of Yang Wang Sent: Wednesday, January 24, 2024 13:59 To: amd-gfx@lists.freedesktop.org Cc: Zhou1, Tao ; Wang, Yang(Kevin) ; Zhang, Hawking Subject: [PATC

[PATCH 1/2] drm/amdgpu: skip to program GFXDEC registers for PM abort case

In the PM abort cases, the gfx power rail doesn't turn off so some GFXDEC registers/CSB can't reset to default vaule. In order to avoid unexpected problem now need skip to program GFXDEC registers and bypass issue CSB packet for PM abort case. Signed-off-by: Prike Liang --- drivers/gpu/drm/amd/a

[PATCH 2/2] drm/amdgpu: reset gpu for pm abort case

In the pm abort case the gfx power rail not turn off from FCH side and this will lead to the gfx reinitialized failed base on the unknown gfx HW status, so let's reset the gpu to a known good power state. Signed-off-by: Prike Liang --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 5 + drivers/g

[PATCH 01/22] drm/amd/display: Fix static screen event mask definition change

From: Yiling Chen [why] The static screen event mask definition is different betwnn DCN31 after and before. [how] Rename DCN30_set_static_screen_control to DCN31. Reviewed-by: Charlene Liu Acked-by: Tom Chung Signed-off-by: Yiling Chen --- .../amd/display/dc/hwss/dcn30/dcn30_hwseq.c| 18

[PATCH 02/22] Revert "drm/amd/display: initialize all the dpm level's stutter latency"

From: Charlene Liu Revert commit beca01e909cf ("drm/amd/display: initialize all the dpm level's stutter latency") Because it causes some regression Reviewed-by: Muhammad Ahmed Acked-by: Tom Chung Signed-off-by: Charlene Liu --- drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c |

[PATCH 04/22] drm/amd/display: Wait for mailbox ready when powering up DMCUB

From: Nicholas Kazlauskas [Why] Otherwise we can send commands too early and they don't execute until the next command is sent. [How] Check the extra status bit when polling for HW powered up. Reviewed-by: Charlene Liu Acked-by: Tom Chung Signed-off-by: Nicholas Kazlauskas --- drivers/gpu/d

[PATCH 03/22] drm/amd/display: Wait before sending idle allow and after idle disallow

From: Nicholas Kazlauskas [Why] We want acknowledgment of the driver idle disallow from DMCUB before continuing with any further programming. For idle allow we want to minimize the chance of DMCUB actively interacing with other firmware components on the system (eg. PMFW) at the same time. [How

[PATCH 00/22] DC Patches Jan 29 2024

This DC patchset brings improvements in multiple areas. In summary, we have: - Add control flag for IPS residency profiling - Populate invalid split index to be 0xF - Fix dcn35 8k30 Underflow/Corruption Issue - Fix DP audio settings - Use correct phantom pipe when populating subvp pipe info - Fix

[PATCH 05/22] drm/amd/display: increased min_dcfclk_mhz and min_fclk_mhz

From: Sohaib Nadeem [why] Originally, PMFW said min FCLK is 300Mhz, but min DCFCLK can be increased to 400Mhz because min FCLK is now 600Mhz so FCLK >= 1.5 * DCFCLK hardware requirement will still be satisfied. Increasing min DCFCLK addresses underflow issues (underflow occurs when phantom pipe i

[PATCH 07/22] drm/amd/display: For FPO and SubVP/DRR configs program vmin/max sel

From: Alvin Lee [Why & How] For FPO and SubVP/DRR cases we need to ensure to program OTG_V_TOTAL_MIN/MAX_SEL, otherwise stretching the vblank in FPO / SubVP / DRR cases will not have any effect and we could hit underflow / corruption. Reviewed-by: Alvin Lee Acked-by: Tom Chung Signed-off-by: A

[PATCH 08/22] drm/amd/display: add debugfs disallow edp psr

From: Hersen Wu [Why] fix reading edp rx crc timeout failure. after bootup, kernel setup psr with dpcd 0x170 = 5. this notify rx psr enable and let rx fw start checking crc for fw internal logic. rx fw may not update crc read count within dpcd 0x246. read count is always 0. this will lead tx crc

[PATCH 09/22] drm/amd/display: fix USB-C flag update after enc10 feature init

From: Charlene Liu [why] BIOS's integration info table not following the original order which is phy instance is ext_displaypath's array index. [how] Move them to follow the original order. Reviewed-by: Muhammad Ahmed Acked-by: Tom Chung Signed-off-by: Charlene Liu --- drivers/gpu/drm/amd/d

[PATCH 10/22] drm/amd/display: Send DTBCLK disable message on first commit

From: Taimur Hassan [Why] Previous patch to allow DTBCLK disable didn't address boot case. Driver thinks DTBCLK is disabled by default, so we don't send disable message to PMFW. DTBCLK is then enabled at idle desktop on boot, burning power. [How] Set dtbclk_en to true on boot so that disable mes

[PATCH 06/22] drm/amd/display: Unify optimize_required flags and VRR adjustments

From: Aric Cyr [why] There is only a single call to dc_post_update_surfaces_to_stream so there is no need to have two flags to control it. Unifying this to a single flag allows dc_stream_adjust_vmin_vmax to skip actual programming when there is no change required. [how] Remove wm_optimze_require

[PATCH 11/22] drm/amd/display: refine code for dmcub inbox1 ring buffer debug

From: Fudongwang [Why] 1. To watch dmcub inbox1 ring buffer cmd type without tools 2. dmub_cmd_PLAT_54186_wa 66 bytes [How] Added dmcub cmd type enum: unsigned char for debug use only, also fixed 66 bytes issue by using unsigned int in bit define instead of unsigned char. Reviewed-by: Nicholas

[PATCH 13/22] drm/amd/display: Fix DPSTREAM CLK on and off sequence

From: Dmytro Laktyushkin [Why] Secondary DP2 display fails to light up in some instances [How] Clock needs to be on when DPSTREAMCLK*_EN =1. This change moves dtbclk_p enable/disable point to make sure this is the case Reviewed-by: Charlene Liu Reviewed-by: Dmytro Laktyushkin Acked-by: Tom Ch

[PATCH 12/22] drm/amd/display: fix invalid reg access on DCN35 FPGA

From: Eric Yang [Why] Unguarded SMU and CLK IP access cause issue on FPGA [How] Guard them for FPGA environment Reviewed-by: Sung joon Kim Acked-by: Tom Chung Signed-off-by: Eric Yang --- .../amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 12 .../drm/amd/display/dc/clk_mgr/dcn

[PATCH 15/22] drm/amd/display: use correct phantom pipe when populating subvp pipe info

From: Wenjing Liu [why] In current code, we recognize a pipe as a phantom pipe if it references the same phantom stream. However it can also a phantom split pipe. If the phantom split pipe has a smaller pipe index than the phantom pipe we will mistakenly use the phantom split pipe as the phantom

[PATCH 16/22] drm/amd/display: Underflow workaround by increasing SR exit latency

From: Nicholas Susanto [Why] On 14us for exit latency time causes underflow for 8K monitor with HDR on. Increasing the latency to 28us fixes the underflow. [How] Increase the latency to 28us. This workaround should be sufficient before we figure out why SR exit so long. Reviewed-by: Chaitanya D

[PATCH 14/22] drm/amd/display: fix incorrect mpc_combine array size

From: Wenjing Liu [why] MAX_SURFACES is per stream, while MAX_PLANES is per asic. The mpc_combine is an array that records all the planes per asic. Therefore MAX_PLANES should be used as the array size. Using MAX_SURFACES causes array overflow when there are more than 3 planes. [how] Use the MAX

[PATCH 17/22] drm/amd/display: fix DP audio settings

From: Charlene Liu [why] Audio channel layout for 5.1ch is not correct [how] Add the audio layout for 5.1ch (channel_count = 6). Add divided by zero check. Reviewed-by: Zhan Liu Acked-by: Tom Chung Signed-off-by: Charlene Liu --- drivers/gpu/drm/amd/display/dc/dce/dce_audio.c | 9 +++--

[PATCH 18/22] drm/amd/display: clkmgr unittest with removal of warn & rename DCN35 ips handshake for idle

From: Mounika Adhuri [why] To Remove warnings of clk_mgr. [How] Added code to remove warnings by resolving redefinations. Reviewed-by: Martin Leung Acked-by: Tom Chung Signed-off-by: Mounika Adhuri --- .../gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 8 1 file changed, 4

[PATCH 20/22] drm/amd/display: Populate invalid split index to be 0xF

From: Alvin Lee [why] There exists scenarios where the split index for subvp can be pipe index 0. The assumption in FW is that the split index won't be 0 but this is incorrect. [how] Instead populate non-split cases to be 0xF to differentiate between split and non-split. Reviewed-by: Wenjing Li

[PATCH 21/22] drm/amd/display: [FW Promotion] Release 0.0.202.0

From: Anthony Koo - Add control flag for IPS residency profiling Reviewed-by: Tom Chung Acked-by: Tom Chung Signed-off-by: Anthony Koo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/d

[PATCH 22/22] drm/amd/display: 3.2.270

From: Aric Cyr - Add control flag for IPS residency profiling - Populate invalid split index to be 0xF - Fix dcn35 8k30 Underflow/Corruption Issue - Fix DP audio settings - Use correct phantom pipe when populating subvp pipe info - Fix incorrect mpc_combine array size - Fix DPSTREAM CLK on and of

[PATCH 19/22] drm/amd/display: Fix dcn35 8k30 Underflow/Corruption Issue

From: Fangzhi Zuo [why] odm calculation is missing for pipe split policy determination and cause Underflow/Corruption issue. [how] Add the odm calculation. Cc: Mario Limonciello Cc: Alex Deucher Cc: sta...@vger.kernel.org Reviewed-by: Charlene Liu Acked-by: Tom Chung Signed-off-by: Fangzhi

Re: [PATCH] mm: Remove double faults once write a device pfn

Am 24.01.24 um 03:43 schrieb Zhou, Xianrong: [AMD Official Use Only - General] The vmf_insert_pfn_prot could cause unnecessary double faults on a device pfn. Because currently the vmf_insert_pfn_prot does not make the pfn writable so the pte entry is normally read-only or dirty catching. What?