[AMD Official Use Only - General]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Wang, Yang(Kevin)
> Sent: Thursday, January 18, 2024 3:50 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Wang, Yang(Kevin)
> Subject: [PATCH] drm/amdgpu: skip call ras_lat
[AMD Official Use Only - General]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Tao Zhou
Sent: Thursday, January 18, 2024 15:36
To: amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao
Subject: [PATCH 2/2] update check condition of query f
[AMD Official Use Only - General]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Chai, Thomas
Sent: Thursday, January 18, 2024 14:43
To: amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhang, Hawking ;
Zhou1, Tao ; Li, Candice ; Wang,
Yang(Kevin) ; Ya
On 1/18/2024 12:57 PM, Ma Jun wrote:
The power source flag should be updated when
[1] System receives an interrupt indicating that the power source
has changed.
[2] System resumes from suspend or runtime suspend
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 13 +++
./drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c:703:47-49:
WARNING !A || A && B is equivalent to !A || B.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7931
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgm
Inside the if block with (running == 0), the checks for 'running'
possibly being non-zero are redundant. Remove them altogether.
This change is similar to the one authored by Heinrich Schuchardt
in commit
ddbbd3be9679 ("drm/radeon: remove dead code, si_mc_load_microcode (v2)")
Found by Linux Ver
'leakage_table' will always be successfully initialized as a pointer
to '&rdev->pm.dpm.dyn_state.cac_leakage_table'.
Remove unnecessary check if only to silence static checkers.
Found by Linux Verification Center (linuxtesting.org) with static
analysis tool Svace.
Fixes: 69e0b57a91ad ("drm/radeo
On 1/18/2024 4:38 PM, Lazar, Lijo wrote:
> On 1/18/2024 12:57 PM, Ma Jun wrote:
>> The power source flag should be updated when
>> [1] System receives an interrupt indicating that the power source
>> has changed.
>> [2] System resumes from suspend or runtime suspend
>>
>> Signed-off-by: Ma Jun
Power limit of SMUv13.0.6 SOCs can be updated by out-of-band ways. Fetch
the limit from firmware instead of using cached values.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
On 1/18/2024 2:31 PM, Ma, Jun wrote:
On 1/18/2024 4:38 PM, Lazar, Lijo wrote:
On 1/18/2024 12:57 PM, Ma Jun wrote:
The power source flag should be updated when
[1] System receives an interrupt indicating that the power source
has changed.
[2] System resumes from suspend or runtime suspend
Si
[AMD Official Use Only - General]
Reviewed-by: Asad Kamal
Thanks & Regards
Asad
-Original Message-
From: Lazar, Lijo
Sent: Thursday, January 18, 2024 2:33 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Kamal, Asad
Subject: [PATCH] drm/amd/pm: Fetch cur
Am 18.01.24 um 00:44 schrieb Friedrich Vock:
On 18.01.24 00:00, Alex Deucher wrote:
[SNIP]
Right now, IH overflows, even if they occur repeatedly, only get
registered once. If not registering IH overflows can trivially
lead to
system crashes, it's amdgpu's current handling that is broken.
It
[AMD Official Use Only - General]
The title and description don't seem right.
Remove smu?
Best Regards,
Kevin
From: Chai, Thomas
Sent: Thursday, January 18, 2024 14:43
To: amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhang, Hawking ;
Zhou1, Tao ; Li, Candi
Fixes the below gcc with W=1:
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_replay.c:262: warning: This
comment starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
* Set REPLAY power optimization flags and coasting vtotal.
drivers/gpu/drm/amd/amdgp
On Thu, Jan 18, 2024 at 9:22 AM Srinivasan Shanmugam
wrote:
>
> Fixes the below gcc with W=1:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_replay.c:262: warning: This
> comment starts with '/**', but isn't a kernel-doc comment. Refer
> Documentation/doc-guide/kernel-doc.rst
> * Set REPLA
From: Roman Li
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Add power_state/pme_pending flag/usb4_bw_alloc_support flags
* Add GART memory support
* Improvements for HDMI, IPS, DML2 and others
Allen Pan (1):
drm/amd/display: Add NULL-checks in dml2 assi
From: "Leo (Hanghong) Ma"
[Why && How]
The current bandwidth calculation for timing doesn't account for
certain HDMI modes overhead which leads to DSC can't be enabled.
Add support to calculate the actual bandwidth for these HDMI modes.
Reviewed-by: Chris Park
Acked-by: Roman Li
Signed-off-by:
From: Muhammad Ahmed
[what]
Adding power_state to dc.h and pme_pending flag to clk_mgr_internal.h
Reviewed-by: Charlene Liu
Acked-by: Roman Li
Signed-off-by: Muhammad Ahmed
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_inter
From: Roman Li
[Why]
With IPS enabled a system hangs once PSR is active.
PSR active triggers transition to IPS2 state.
While in IPS2 an access to dcn registers results in hard hang.
Existing check doesn't cover for PSR sequence.
[How]
Safeguard register access by disabling idle optimization in a
From: Allen Pan
[Why]
NULL-deref regression after:
"drm/amd/display: Fix dml2 assigned pipe search"
[How]
Add verification for potential NULLs
Fixes: 133e813d5044 ("drm/amd/display: Fix dml2 assigned pipe search")
Reviewed-by: Charlene Liu
Reviewed-by: Nicholas Kazlauskas
Acked-by: Roman Li
From: Aric Cyr
Acked-by: Roman Li
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 1d052742d4c7..432ae08462e4 100644
--- a/drivers
From: Anthony Koo
- Add debug flag for Replay IPS visual confirm
- Remove unused debug flags that should not
be controlled inside Replay FSM
Acked-by: Roman Li
Signed-off-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 13 -
1 file changed, 4 insertions(
From: Charlene Liu
This reverts commit 080a7e9d7dc5a18401d0569a36d55e133ed10cf8.
It caused intermittent hangs when enabling IPS on static screen.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Roman Li
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 11 +-
From: Aric Cyr
- FW Release 0.0.201.0
- Fix resizing video window for dcn321
- Fix timing bandwidth calculation for HDMI
- Fix null-deref in dml2 assigned pipe search
- Add GART memory support for dmcub
- Add power_state and pme_pending flag
- Add usb4_bw_alloc_support flag
- Revert "Rework DC Z1
From: Fudongwang
[Why]
In dump file, GART memory can be accessed while frame buffer cannot.
[How]
Add GART memory support for dmcub.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Roman Li
Signed-off-by: Fudongwang
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 ++-
drivers/gpu/drm/amd
From: Peichen Huang
[Why]
dc should have a flag for DM to enable usb4_bw_alloc in dptx
[How]
- Add usb4_bw_alloc_support flag in dc_config
Reviewed-by: Wayne Lin
Reviewed-by: Meenakshikumar Somasundaram
Acked-by: Roman Li
Signed-off-by: Peichen Huang
---
drivers/gpu/drm/amd/display/dc/dc.h
From: ChunTao Tso
[Why]
Because ABM will wait VStart to start getting histogram data,
it will cause we can't enter IPS while full screnn video playing.
[How]
Modify the panel refresh rate to the maximun multiple of current
refresh rate.
Reviewed-by: Dennis Chan
Acked-by: Roman Li
Signed-off
From: Wenjing Liu
[why]
It has been found a regression caused by enabling this feature during ODM to
MPC combine switch when user is resizing video window. The transition is
only needed when the feature is enabled. During the transition driver will
temporary switch to use max dppclk level through
If the IH ring buffer overflows, it's possible that fence signal events
were lost. Check each ring for progress to prevent job timeouts/GPU
hangs due to the fences staying unsignaled despite the work being done.
Cc: Joshua Ashton
Cc: Alex Deucher
Cc: Christian König
Cc: sta...@vger.kernel.org
Allows us to detect subsequent IH ring buffer overflows as well.
Cc: Joshua Ashton
Cc: Alex Deucher
Cc: Christian König
Cc: sta...@vger.kernel.org
Signed-off-by: Friedrich Vock
---
v2: Reset CLEAR_OVERFLOW bit immediately after setting it
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 2 ++
driv
This patch changes the handling and lifecycle of vm->task_info object.
The major changes are:
- vm->task_info is a dynamically allocated ptr now, and its uasge is
reference counted.
- introducing two new helper funcs for task_info lifecycle management
- amdgpu_vm_get_task_info: reference coun
These have been released now, so add them to the documentation.
Signed-off-by: Alex Deucher
---
Documentation/gpu/amdgpu/dgpu-asic-info-table.csv | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv
b/Documentation/gpu/amdgpu/dgpu-asic-info-tab
On Thu, Jan 18, 2024 at 3:52 AM Nikita Zhandarovich
wrote:
>
> Inside the if block with (running == 0), the checks for 'running'
> possibly being non-zero are redundant. Remove them altogether.
>
> This change is similar to the one authored by Heinrich Schuchardt
> in commit
> ddbbd3be9679 ("drm/
On Wed, Jan 17, 2024 at 12:58:15PM +, Andri Yngvason wrote:
> mið., 17. jan. 2024 kl. 09:21 skrifaði Pekka Paalanen :
> >
> > On Tue, 16 Jan 2024 14:11:43 +
> > Andri Yngvason wrote:
> >
> > > þri., 16. jan. 2024 kl. 13:29 skrifaði Sebastian Wick
> > > :
> > > >
> > > > On Tue, Jan 16, 202
Hi Dave, Sima,
New fixes for 6.8, on top of the fixes I sent last week and fixed up on Monday.
The following changes since commit d7643fe6fb76edb1f2f1497bf5e8b8f4774b5129:
drm/amd/display: Avoid enum conversion warning (2024-01-15 18:35:07 -0500)
are available in the Git repository at:
htt
[AMD Official Use Only - General]
OK, I will remove it.
-
Best Regards,
Thomas
From: Wang, Yang(Kevin)
Sent: Thursday, January 18, 2024 9:15 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhang, Hawking ;
Zhou1, Tao ; Li, Candice ; Yang, Stanley
Subje
Hi Lijo,
On 1/18/2024 5:24 PM, Lazar, Lijo wrote:
> On 1/18/2024 2:31 PM, Ma, Jun wrote:
>>
>>
>> On 1/18/2024 4:38 PM, Lazar, Lijo wrote:
>>> On 1/18/2024 12:57 PM, Ma Jun wrote:
The power source flag should be updated when
[1] System receives an interrupt indicating that the power sour
update smu v13.0.6 message to allow guest driver set gfx clock.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
b/drivers/gpu/drm/amd/pm
On 1/19/2024 9:17 AM, Yang Wang wrote:
update smu v13.0.6 message to allow guest driver set gfx clock.
Signed-off-by: Yang Wang
Reviewed-by: Lijo Lazar
Thanks,
Lijo
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff -
On 1/19/2024 7:24 AM, Ma, Jun wrote:
Hi Lijo,
On 1/18/2024 5:24 PM, Lazar, Lijo wrote:
On 1/18/2024 2:31 PM, Ma, Jun wrote:
On 1/18/2024 4:38 PM, Lazar, Lijo wrote:
On 1/18/2024 12:57 PM, Ma Jun wrote:
The power source flag should be updated when
[1] System receives an interrupt indicating
Am 18.01.24 um 19:54 schrieb Friedrich Vock:
Allows us to detect subsequent IH ring buffer overflows as well.
Cc: Joshua Ashton
Cc: Alex Deucher
Cc: Christian König
Cc: sta...@vger.kernel.org
Signed-off-by: Friedrich Vock
---
v2: Reset CLEAR_OVERFLOW bit immediately after setting it
d
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