Use asynchronous polling to handle umc_v12_0 poisoning.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 +
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 143 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 3 +
3 files changed, 120 insertions(+), 31
Add interface to check mca umc status.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c | 12 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 4 +++-
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c| 20
Support retiring multiple MCA error address pages in
one in-band query for umc v12_0.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 43 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 8 ++-
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c | 66 +
Preparing for asynchronous processing of umc page retirement.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 34 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 5
2 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgp
Add log info for umc_v12_0 and smu_v13_0_6.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c | 11 +++
drivers/gpu/drm/amd/amdkfd/kfd_events.c | 6 +-
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c| 13 +
3 files change
On Tue, 16 Jan 2024 01:51:57 -0300
André Almeida wrote:
> Hi,
>
> AMD hardware can do more on the async flip path than just the primary plane,
> so
> to lift up the current restrictions, this patchset allows drivers to write
> their
> own check for planes for async flips.
Hi,
what's the user
On 16.01.24 08:03, Christian König wrote:
Am 15.01.24 um 12:18 schrieb Friedrich Vock:
Adding the original Ccs from the thread since they seemed to be missing
in the reply.
On 15.01.24 11:55, Christian König wrote:
Am 14.01.24 um 14:00 schrieb Friedrich Vock:
Allows us to detect subsequent IH
fix array index out of bounds issue for ras_block_string[] array.
Fixes: 2e3675fe4e3ee ("drm/amdgpu: Align ras block enum with firmware")
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/
On 1/16/2024 4:32 PM, Yang Wang wrote:
fix array index out of bounds issue for ras_block_string[] array.
Fixes: 2e3675fe4e3ee ("drm/amdgpu: Align ras block enum with firmware")
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 -
1 file changed, 4 insertions(+), 1
On Mon, Jan 15, 2024 at 04:05:52PM +, Andri Yngvason wrote:
> From: Werner Sembach
>
> Add a new general drm property "force color format" which can be used
> by userspace to tell the graphics driver which color format to use.
I don't like the "force" in the name. This just selects the color
Hi Pekka,
Em 16/01/2024 06:45, Pekka Paalanen escreveu:
On Tue, 16 Jan 2024 01:51:57 -0300
André Almeida wrote:
Hi,
AMD hardware can do more on the async flip path than just the primary plane, so
to lift up the current restrictions, this patchset allows drivers to write their
own check for p
On 1/16/24 07:47, Christian König wrote:
Am 16.01.24 um 01:05 schrieb Marek Olšák:
On Mon, Jan 15, 2024 at 3:06 PM Christian König
wrote:
Am 15.01.24 um 20:30 schrieb Joshua Ashton:
On 1/15/24 19:19, Christian König wrote:
Am 15.01.24 um 20:13 schrieb Joshua Ashton:
On 1/15/24 18:53, Chr
On Tue, 16 Jan 2024 08:50:59 -0300
André Almeida wrote:
> Hi Pekka,
>
> Em 16/01/2024 06:45, Pekka Paalanen escreveu:
> > On Tue, 16 Jan 2024 01:51:57 -0300
> > André Almeida wrote:
> >
> >> Hi,
> >>
> >> AMD hardware can do more on the async flip path than just the primary
> >> plane, so
>
On Tue, Jan 16, 2024 at 01:13:13PM +, Andri Yngvason wrote:
> Hi Sebastian,
>
> þri., 16. jan. 2024 kl. 11:42 skrifaði Sebastian Wick
> :
> >
> > On Mon, Jan 15, 2024 at 04:05:52PM +, Andri Yngvason wrote:
> > > From: Werner Sembach
> > >
> > > Add a new general drm property "force color
+ Joshua
Em 16/01/2024 10:14, Pekka Paalanen escreveu:
On Tue, 16 Jan 2024 08:50:59 -0300
André Almeida wrote:
Hi Pekka,
Em 16/01/2024 06:45, Pekka Paalanen escreveu:
On Tue, 16 Jan 2024 01:51:57 -0300
André Almeida wrote:
Hi,
AMD hardware can do more on the async flip path than just
On 1/16/24 12:24, Joshua Ashton wrote:
On 1/16/24 07:47, Christian König wrote:
Am 16.01.24 um 01:05 schrieb Marek Olšák:
On Mon, Jan 15, 2024 at 3:06 PM Christian König
wrote:
Am 15.01.24 um 20:30 schrieb Joshua Ashton:
On 1/15/24 19:19, Christian König wrote:
Am 15.01.24 um 20:13 sch
On 1/16/24 13:41, Joshua Ashton wrote:
On 1/16/24 12:24, Joshua Ashton wrote:
On 1/16/24 07:47, Christian König wrote:
Am 16.01.24 um 01:05 schrieb Marek Olšák:
On Mon, Jan 15, 2024 at 3:06 PM Christian König
wrote:
Am 15.01.24 um 20:30 schrieb Joshua Ashton:
On 1/15/24 19:19, Christ
On 1/16/24 13:44, Joshua Ashton wrote:
On 1/16/24 13:41, Joshua Ashton wrote:
On 1/16/24 12:24, Joshua Ashton wrote:
On 1/16/24 07:47, Christian König wrote:
Am 16.01.24 um 01:05 schrieb Marek Olšák:
On Mon, Jan 15, 2024 at 3:06 PM Christian König
wrote:
Am 15.01.24 um 20:30 schrie
[AMD Official Use Only - General]
Reviewed-by: Kent Russell
> -Original Message-
> From: amd-gfx On Behalf Of Felix
> Kuehling
> Sent: Monday, January 15, 2024 5:57 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Dan Carpenter
> Subject: [PATCH] drm/amdgpu: Remove unnecessary NULL check
Seems calling drm_aperture_remove_conflicting_pci_framebuffers()
will take away the apertures for unrelated devices on some kernel
versions. E.g., calling this on a PCIe accelerator with no display
IP may take the apertures away from the actual PCIe display adapter
on the system, breaking efifb, d
Am 16.01.24 um 14:48 schrieb Joshua Ashton:
[SNIP]
Going to adjust the implementation accordingly.
Awesome, please CC me know when you have something.
Sure, going to keep that in mind.
In the short-term I have changed if (r && r != -ENODATA) to if (r)
and that seems to work nicely for m
On 2024-01-16 14:44, Joshua Ashton wrote:
> On 1/16/24 13:41, Joshua Ashton wrote:
>> On 1/16/24 12:24, Joshua Ashton wrote:
>>> On 1/16/24 07:47, Christian König wrote:
Am 16.01.24 um 01:05 schrieb Marek Olšák:
> On Mon, Jan 15, 2024 at 3:06 PM Christian König
> wrote:
>> Am 15.0
On 1/16/24 15:48, Michel Dänzer wrote:
On 2024-01-16 14:44, Joshua Ashton wrote:
On 1/16/24 13:41, Joshua Ashton wrote:
On 1/16/24 12:24, Joshua Ashton wrote:
On 1/16/24 07:47, Christian König wrote:
Am 16.01.24 um 01:05 schrieb Marek Olšák:
On Mon, Jan 15, 2024 at 3:06 PM Christian König
On 1/16/24 15:05, Christian König wrote:
Am 16.01.24 um 14:48 schrieb Joshua Ashton:
[SNIP]
Going to adjust the implementation accordingly.
Awesome, please CC me know when you have something.
Sure, going to keep that in mind.
In the short-term I have changed if (r && r != -ENODATA) t
Am 15.01.24 um 23:57 schrieb Felix Kuehling:
A static checker pointed out, that bo_va->base.bo was already derefenced
earlier in the same scope. Therefore this check is unnecessary here.
Reported-by: Dan Carpenter
Fixes: 79e7fdec71f2 ("drm/amdgpu: Auto-validate DMABuf imports in compute VMs")
S
On 1/16/24 13:35, André Almeida wrote:
+ Joshua
Em 16/01/2024 10:14, Pekka Paalanen escreveu:
On Tue, 16 Jan 2024 08:50:59 -0300
André Almeida wrote:
Hi Pekka,
Em 16/01/2024 06:45, Pekka Paalanen escreveu:
On Tue, 16 Jan 2024 01:51:57 -0300
André Almeida wrote:
Hi,
AMD hardware can d
- Add a field in struct v11_gfx_mqd for userqueue
fence address.
- Assign fence gpu VA address to the userqueue mqd
fence address fields.
v2: Remove the mask and replace with lower_32_bits (Christian)
Signed-off-by: Arunpravin Paneer Selvam
Reviewed-by: Christian König
---
drivers/gpu/drm
Add UAPI header support for userqueue Secure semaphore
v2: Worked on review comments from Christian for the following
modifications
- Add bo handles, bo flags and padding fields.
- Include value/va in a combined array.
v3: Worked on review comments from Christian
- Add num_fence
This patch introduces new IOCTL for userqueue secure semaphore.
The signal IOCTL called from userspace application creates a drm
syncobj and array of bo GEM handles and passed in as parameter to
the driver to install the fence into it.
The wait IOCTL gets an array of drm syncobjs, finds the fence
Add support to handle the userqueue protected fence signal hardware
interrupt.
Create a xarray which maps the doorbell index to the fence driver address.
This would help to retrieve the fence driver information when an userq fence
interrupt is triggered. Firmware sends the doorbell offset value an
Developed a userqueue fence driver for the userqueue process shared
BO synchronization.
Create a dma fence having write pointer as the seqno and allocate a
seq64 memory for each user queue process and feed this memory address
into the firmware/hardware, thus the firmware writes the read pointer
in
On GFX version 11, GFXOFF was disabled due to a MES KIQ firmware
issue, which has since been fixed after version 64.
This patch only re-enables GFXOFF for GFX version 11 if the GPU's
MES KIQ firmware version is newer than version 64.
V2: Keep GFXOFF disabled on GFX11 if MES KIQ is below version 64
[AMD Official Use Only - General]
Reviewed-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Ori Messinger
Sent: Tuesday, January 16, 2024 5:15 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Messinger, Ori
Subject: [PATCH v5] drm/amdgpu: Enable GF
-Original Message-
From: Lazar, Lijo
Sent: Tuesday, January 16, 2024 7:16 PM
To: Wang, Yang(Kevin) ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking
Subject: Re: [PATCH] drm/amdgpu: fix UBSAN array-index-out-of-bounds for
ras_block_string[]
On 1/16/2024 4:32 PM, Yang Wang wrote:
> f
Add set_power_source function for smu13.0.0
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index c01d5f
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Ma Jun
Sent: Wednesday, January 17, 2024 10:00 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Ma, Jun ;
Feng, Kenneth ; Wang, Yang(Kevin)
Subject: [PATCH] drm/amdgpu/pm: Add set_pow
The 'status' variable in 'core_link_read_dpcd()' &
'core_link_write_dpcd()' was uninitialized for success scenarios.
Thus, initializing 'status' variable with appropriate enum value.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dpcd.c:226
core_link_read_dpcd() er
The 'status' variable in 'core_link_read_dpcd()' &
'core_link_write_dpcd()' was uninitialized.
Thus, initializing 'status' variable to 'DC_ERROR_UNEXPECTED' by default.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dpcd.c:226
core_link_read_dpcd() error: uninitial
[AMD Official Use Only - General]
Reviewed-by: Tao Zhou
> -Original Message-
> From: amd-gfx On Behalf Of Yang
> Wang
> Sent: Tuesday, January 16, 2024 7:02 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Wang, Yang(Kevin) ; Zhang, Hawking
>
> Subject: [PATCH] drm/amdgpu: fix UBSAN array-
Am 16.01.24 um 15:39 schrieb Alex Deucher:
Seems calling drm_aperture_remove_conflicting_pci_framebuffers()
will take away the apertures for unrelated devices on some kernel
versions. E.g., calling this on a PCIe accelerator with no display
IP may take the apertures away from the actual PCIe dis
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