From: Yang Guang
Dynamic size calculations (especially multiplication) should not be
performed in memory allocator (or similar) function arguments due
to the risk of them overflowing. This could lead to values wrapping
around and a smaller allocation being made than the caller was
expecting.
[AMD Official Use Only - General]
+ if (adev->gmc.ecc_irq.funcs)
+ amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);
+
This doesn't match with amdgpu_irq_get call for gmc.ecc_irq, where driver
checks ras cap to decide whether enabling the interrupt or not (see
amdgpu_umc_ras_late
[AMD Official Use Only - General]
It's already protected by the reset lock. In my understanding, soft reset
should not run in parallel.
Regards,
Jack
-Original Message-
From: Alex Deucher
Sent: Wednesday, December 20, 2023 1:04 AM
To: Xiao, Jack
Cc: amd-gfx@lists.freedesktop.org; Deuc
[AMD Official Use Only - General]
Yes, it should add check ras cap before put gmc.ecc_irq, thanks.
Regards,
Stanley
> -Original Message-
> From: Zhang, Hawking
> Sent: Wednesday, December 20, 2023 4:12 PM
> To: Yang, Stanley ; amd-gfx@lists.freedesktop.org
> Subject: RE: [PATCH Review V2
Fixes the below:
drivers/gpu/drm/amd/amdgpu/atom.c:316 atom_get_src_int() warn: ignoring
unreachable code.
drivers/gpu/drm/amd/amdgpu/atom.c:398 atom_skip_src_int() warn: ignoring
unreachable code.
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/a
Fixes the below:
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c:706 amdgpu_xgmi_set_pstate() warn:
ignoring unreachable code.
Cc: Jonathan Kim
Cc: Felix Kuehling
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 3 ---
1 file
Am 19.12.23 um 23:43 schrieb Felix Kuehling:
On 2023-12-19 3:10, Christian König wrote:
Am 15.12.23 um 16:19 schrieb Felix Kuehling:
On 2023-12-15 07:30, Christian König wrote:
@@ -1425,11 +1451,21 @@ int amdgpu_vm_handle_moved(struct
amdgpu_device *adev,
}
r = amdgpu_v
Well not the reset lock, but there should only be a single reset queue
which this runs on.
Regards,
Christian.
Am 20.12.23 um 10:49 schrieb Xiao, Jack:
[AMD Official Use Only - General]
It's already protected by the reset lock. In my understanding, soft reset
should not run in parallel.
Reg
Am 19.12.23 um 14:38 schrieb Srinivasan Shanmugam:
drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c:1106
amdgpu_connector_dvi_detect() warn: inconsistent indenting
'Fixes: 760817a60724 ("drm/amdgpu: Refactor
'amdgpu_connector_dvi_detect' in amdgpu_connectors.c")'
Cc: Christian König
Cc: Alex Deu
Am 19.12.23 um 06:58 schrieb Ma Jun:
Print a warnning message if the system can't access
the resize bar register when using large bar.
Well pretty clear NAK, we have embedded use cases where this would
trigger an incorrect warning.
What should that be good for in the first place?
Regards,
C
kvmalloc_array + __GFP_ZERO is the same with kvcalloc.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:873 amdgpu_cs_parser_bos() warn: Please
consider using kvcalloc instead of kvmalloc_array
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/dr
Am 20.12.23 um 14:56 schrieb Srinivasan Shanmugam:
Fixes the below:
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c:706 amdgpu_xgmi_set_pstate() warn:
ignoring unreachable code.
Cc: Jonathan Kim
Cc: Felix Kuehling
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
dri
Am 20.12.23 um 15:10 schrieb Srinivasan Shanmugam:
kvmalloc_array + __GFP_ZERO is the same with kvcalloc.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:873 amdgpu_cs_parser_bos() warn: Please
consider using kvcalloc instead of kvmalloc_array
Cc: Christian König
Cc: Alex Deucher
Sig
unsigned int "version_minor" is always >= 0
Fixes the below:
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c:534 amdgpu_gfx_rlc_init_microcode()
warn: always true condition '(version_minor >= 0) => (0-u16max >= 0)'
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
drivers/
On 2023-12-20 8:58, Christian König wrote:
Am 19.12.23 um 23:43 schrieb Felix Kuehling:
On 2023-12-19 3:10, Christian König wrote:
Am 15.12.23 um 16:19 schrieb Felix Kuehling:
On 2023-12-15 07:30, Christian König wrote:
@@ -1425,11 +1451,21 @@ int amdgpu_vm_handle_moved(struct
amdgpu_device
Here we are at the end of the year, the last set of patches for DC. This
DC patch set brings improvements in multiple areas. In summary, we
highlight:
* Address SubVP issues
* Update DMUB
* Improve mechanisms for test
Thanks
Siqueira
Cc: Daniel Wheeler
Alvin Lee (4):
drm/amd/display: Fix sub
From: Alvin Lee
[Why]
There is some logic error where the wrong variable was used to check for
OTG_MASTER and DPP_PIPE.
[How]
Add booleans to confirm that the expected pipes were found before
validating schedulability.
Acked-by: Rodrigo Siqueira
Reviewed-by: Samson Tam
Reviewed-by: Chaitanya
From: Relja Vojvodic
[Why]
More information is desired for the test tools.
[How]
Refactored get_subvp_visual_confirm_color and
get_mclk_switch_visual_confirm_color to support the new method of
storing the p_state type, which was changed so that it could also be
saved and output by the DPM log. E
From: "Leo (Hanghong) Ma"
[Why]
Certain HDMI modes failed at dml cap check for uncompressed video but
they can still be supported for compressed video.
[How]
Add HDMI capacity computations using fixed31_32 in dc side.
Reviewed-by: Chris Park
Acked-by: Rodrigo Siqueira
Signed-off-by: Leo (Hang
From: Josip Pavic
[Why]
Some functions whose output is typically checked for null are not being
checked for null at several call sites, causing some static analysis
tools to throw an error.
[How]
Add null pointer guards around functions that typically have them at
other call sites.
Reviewed-by:
From: Alvin Lee
In DCN32/321 FPO uses per-pipe P-State force. If there is no plane, then
then HUBP is power gated, in which case any programming in HUBP has no
effect and the pipe is always asserting P-State allow. This is contrary
to what we want to happen for FPO (FW should moderate the P-State
From: Camille Cho
[Why]
BL1_PWM_USER_LEVEL is meant for the user brightness level setting from
OS. However, we update it along with other ABM levels to the real PWM
value which could be ABMed.
[How]
Driver to cache and restore the user brightness level setting so that
DMUB can retrieve the last
From: Meenakshikumar Somasundaram
[Why]
Fix minor issues in BW Allocation Phase2.
[How]
- In set_usb4_req_bw_req(), link->dpia_bw_alloc_config.response_ready
flag should be reset before writing DPCD REQUEST_BW.
- Fix the granularity for value of 2 in get_bw_granularity().
- Removed bandwidth a
From: Relja Vojvodic
[Why]
Some debug tools, sometimes wrap around to multiple lines which causes
issues with the DPM test script while it is looking for the logs. Need a
way to tell when the log is finished.
[How]
Added "LOG_END" to the end of the log.
Reviewed-by: Alvin Lee
Acked-by: Rodrigo
From: Alvin Lee
A new check was added to ensure FPO is not enabled when the FPO pipe has
0 planes. This requires the stream status to check the plane count, but
the stream status was not assigned for FPO + Vactive cases which leads
to FPO not be enabled always.
Reviewed-by: Relja Vojvodic
Acked
From: Wayne Lin
link_rate sometime will be changed when DP MST connector hotplug, so
pbn_div also need be updated; otherwise, it will mismatch with
link_rate, causes no output in external monitor.
Cc: sta...@vger.kernel.org
Reviewed-by: Jerry Zuo
Acked-by: Rodrigo Siqueira
Signed-off-by: Wade
From: Nicholas Kazlauskas
[Why]
dc->idle_optimizations_allowed may be desynced with the hardware state.
[How]
Make sure we always exit out when dc_dmub_srv_exit_low_power_state is
called by removing the check.
Reviewed-by: Sung joon Kim
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicholas Kazla
From: Nicholas Kazlauskas
[Why]
If we time out waiting for PMFW to finish the exit sequence and touch
the DMCUB register the system will hang in a hard locked state.
[How]
Pol forever. This covers the case where things take too long but also
enables for debugging to occur since the cores won't b
From: Nicholas Kazlauskas
[Why]
Race condition between notification of driver idle and the command being
processed. We could theoretically enter idle between the submission and
the wait for idle that occurs after.
[How]
Switch the notification to NO_WAIT to avoid the RPTR access.
Reviewed-by: S
From: Alvin Lee
For FPO and SubVP/DRR cases we need to ensure to program
OTG_V_TOTAL_MIN/MAX_SEL, otherwise stretching the vblank in FPO / SubVP
/ DRR cases will not have any effect and we could hit underflow /
corruption.
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin L
From: Meenakshikumar Somasundaram
[Why]
If bandwidth allocation feature is enabled, connection manager wont
limit the dp tunnel bandwidth. So, need to do display mode validation
for streams on dpia links to avoid oversubscription of dp tunnel
bandwidth.
[How]
- To read non reduced link rate and
From: Revalla
[why]
Move all init files to hwss folder.
[how]
moved the dcnxx_init.c and .h files into inside the hwss and cleared the
linkage errors.
Reviewed-by: Martin Leung
Acked-by: Rodrigo Siqueira
Signed-off-by: Revalla
---
drivers/gpu/drm/amd/display/dc/Makefile | 2 -
drive
From: Gabe Teeger
[Why]
Failing mode validation during dc_commit, leading to blackscreen with an
8k DP2 display during mode change.
[What]
Fix mixmatch between pipe and stream, which prevented us from
recognizing the link as DP2.
Reviewed-by: Dmytro Laktyushkin
Acked-by: Rodrigo Siqueira
Sign
From: Nicholas Kazlauskas
[Why]
A hang was observed where a read-modify-write access occurred due to the
register for idle state being shared between DMCUB and driver.
dmcub read - idle allow / no commit
driver read - idle allow / no commit
driver write - idle disallow / no commit
dmcub write -
From: Relja Vojvodic
For certain dual display configs that had one display using a 1080p
mode, the DPM level used to drive the configs regressed from DPM 0 to
DPM 3. This was caused by a missing check that should have only limited
the pipe segments on non-phantom pipes. This caused issues with de
From: Tom Chung
[WHY]
Prepare for enabling the Panel Replay feature
[HOW]
- Add some Panel Replay setting functions in DC
- Add the Panel Replay resource in dcn35_resource.c
- Add debug masks for Panel Replay
Acked-by: Rodrigo Siqueira
Reviewed-by: Leo Li
Signed-off-by: Tom Chung
---
driver
[Public]
Hi all,
This week this patchset was tested on the following systems:
* Lenovo ThinkBook T13s Gen4 with AMD Ryzen 5 6600U
* MSI Gaming X Trio RX 6800
* Gigabyte Gaming OC RX 7900 XTX
These systems were tested on the following display/connection types:
* eD
Hi Dave, Sima,
A few holiday fixes for 6.7.
The following changes since commit ceb6a6f023fd3e8b07761ed900352ef574010bcb:
Linux 6.7-rc6 (2023-12-17 15:19:28 -0800)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.7-2023-12-20
for
On 2023-12-11 10:56, Felix Kuehling wrote:
On 2023-12-08 05:11, Christian König wrote:
Am 07.12.23 um 20:14 schrieb Felix Kuehling:
On 2023-12-05 17:20, Felix Kuehling wrote:
Properly mark kfd_process->ef as __rcu and consistently access it with
rcu_dereference_protected.
Reported-by: kerne
Hi,
On 14/12/2023 13:42, Arunpravin Paneer Selvam wrote:
- Add tracking clear page feature.
- Driver should enable the DRM_BUDDY_CLEARED flag if it
successfully clears the blocks in the free path. On the otherhand,
DRM buddy marks each block as cleared.
- Track the available cleared page
From: Roman Li
[Why]
Instability is observed on DCN35 if idle power optimization is enabled.
[How]
Disable IPS until issue is resolved.
Signed-off-by: Roman Li
Tested-by: Daniel Wheeler
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
On 12/20/23 12:30, roman...@amd.com wrote:
From: Roman Li
[Why]
Instability is observed on DCN35 if idle power optimization is enabled.
[How]
Disable IPS until issue is resolved.
Signed-off-by: Roman Li
Tested-by: Daniel Wheeler
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2
Hi Christian,
On 12/20/2023 10:10 PM, Christian König wrote:
> Am 19.12.23 um 06:58 schrieb Ma Jun:
>> Print a warnning message if the system can't access
>> the resize bar register when using large bar.
>
> Well pretty clear NAK, we have embedded use cases where this would
> trigger an incorre
The list has the head node, the NULL pointer check is therefore
superfluous, Hence removed it.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1347
kfd_create_indirect_link_prop() warn: can 'gpu_link' even be NULL?
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1428 kfd_
Doing a bitwise AND between a bool and an int is generally not a good
idea. The bool will be promoted to an int with value 0 or 1, the int is
generally regarded as true with a non-zero value, thus ANDing them using
bitwise has the potential to yield an undesired result.
Thus fixes the below:
dri
The ecc_irq is disabled while GPU mode2 reset suspending process,
but not be enabled during GPU mode2 reset resume process.
Changed from V1:
only do sdma/gfx ras_late_init in aldebaran_mode2_restore_ip
delete amdgpu_ras_late_resume function
Changed from V2:
check umc ras s
[AMD Official Use Only - General]
Reviewed-by: Tao Zhou
> -Original Message-
> From: amd-gfx On Behalf Of Srinivasan
> Shanmugam
> Sent: Tuesday, December 19, 2023 10:12 PM
> To: Deucher, Alexander ; Koenig, Christian
>
> Cc: SHANMUGAM, SRINIVASAN ; amd-
> g...@lists.freedesktop.org
>
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