Unsigned expression compared with zero:
dummy_latency_index > 0.The return data type of the function is also int
For rigor,it is necessary to replace the data type unsigned int with int.
Otherwise,if there is a negative number,the consequences will be
disastrous.
Signed-off-by: Wang Ming
---
dr
fix the following coccicheck warning:
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c:1657:14-18: Unneeded
variable: "size".
Signed-off-by: Mingtong Bao
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/
Use memdup_user() rather than duplicating its implementation. This is a
little bit restricted to reduce false positives.
./drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c:2813:13-20: WARNING
opportunity for memdup_user.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_
On 6/14/23 10:49 AM, Wang Ming wrote:
Identify issues that arise by using the tests/doubletest.cocci
semantic patch.Need to remove duplicate expression in if statement.
Signed-off-by: Wang Ming
Reviewed-by: Ammar Faizi
--
Ammar Faizi
Identify issues that arise by using the tests/doubletest.cocci
semantic patch.Need to remove duplicate expression in if statement.
Signed-off-by: Wang Ming
---
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/
fix the following coccicheck warning:
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c:1156:5-11:
Unneeded variable: "result".
Signed-off-by: Mingtong Bao
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/
Am 10.05.23 um 00:01 schrieb Alex Deucher:
From: Rajneesh Bhardwaj
This adds dummy vram manager to support ASICs that do not have a
dedicated or carvedout vram domain.
Well that doesn't seem to make much sense. Why we should have that?
Christian.
Reviewed-by: Felix Kuehling
Signed-off-by
Hi,
On 2023/6/13 11:01, Sui Jingfeng wrote:
From: Sui Jingfeng
Deal only with the VGA devcie(pdev->class == 0x0300), so replace the
pci_get_subsys() function with pci_get_class(). Filter the non-PCI display
device(pdev->class != 0x0300) out. There no need to process the non-display
PCI device.
Report the per-ring timeout in milliseconds and allow users to adjust
the timeout dynamically. This can be useful for debugging, e.g. to more
easily test whether a submission genuinely hangs or is just taking very
long, and to temporarily disable GPU recovery so that shader problems
can be examined
Am 30.05.23 um 17:02 schrieb Thomas Zimmermann:
For framebuffers in I/O and system memory, add macros that set
struct fb_ops to the respective callback functions.
For deferred I/O, add macros that generate callback functions with
damage handling. Add initializer macros that set struct fb_ops
Hi
Am 14.06.23 um 13:29 schrieb Christian König:
Am 30.05.23 um 17:02 schrieb Thomas Zimmermann:
For framebuffers in I/O and system memory, add macros that set
struct fb_ops to the respective callback functions.
For deferred I/O, add macros that generate callback functions with
damage handli
, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Jiapeng-Chong/drm-amdkfd-Switch-over-to-memdup_user/20230614-100553
base: next-20230613
patch link:
https://lore.ke
Hi Christian,
On Thu, 4 May 2023 13:51:47 +0200
"Christian König" wrote:
> This adds the infrastructure for an execution context for GEM buffers
> which is similar to the existing TTMs execbuf util and intended to replace
> it in the long term.
>
> The basic functionality is that we abstracts
Am 14.06.23 um 14:23 schrieb Boris Brezillon:
Hi Christian,
On Thu, 4 May 2023 13:51:47 +0200
"Christian König" wrote:
This adds the infrastructure for an execution context for GEM buffers
which is similar to the existing TTMs execbuf util and intended to replace
it in the long term.
The
Am 14.06.23 um 13:27 schrieb Nicolai Hähnle:
Report the per-ring timeout in milliseconds and allow users to adjust
the timeout dynamically. This can be useful for debugging, e.g. to more
easily test whether a submission genuinely hangs or is just taking very
long, and to temporarily disable GPU r
On Wed, 14 Jun 2023 14:30:53 +0200
Christian König wrote:
> Am 14.06.23 um 14:23 schrieb Boris Brezillon:
> > Hi Christian,
> >
> > On Thu, 4 May 2023 13:51:47 +0200
> > "Christian König" wrote:
> >
> >> This adds the infrastructure for an execution context for GEM buffers
> >> which is simil
On 6/13/23 19:21, Srinivasan Shanmugam wrote:
Fixes the following gcc with W=1:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3483: warning: Cannot
understand *
***
drivers/gpu/drm/amd/amdgpu/../display/dc/cor
Am 2023-06-13 um 22:04 schrieb Jiapeng Chong:
Use memdup_user() rather than duplicating its implementation. This is a
little bit restricted to reduce false positives.
./drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c:2813:13-20: WARNING
opportunity for memdup_user.
Reported-by: Abaci R
Am 2023-06-14 um 06:38 schrieb Christian König:
Am 10.05.23 um 00:01 schrieb Alex Deucher:
From: Rajneesh Bhardwaj
This adds dummy vram manager to support ASICs that do not have a
dedicated or carvedout vram domain.
Well that doesn't seem to make much sense. Why we should have that?
TTM al
This DC patch-set brings improvements in multiple areas. In summary, we
highlight:
- DCN314 fixes
- DCN32x fixes
- New fast update sequence enablement
- DC mode clock switching enablement for DCN32x
- DP link loss fix
- New debugfs entry to set MST link settings
Alvin Lee (4):
drm/amd/display:
From: Daniel Miess
This partially reverts commit 94bea120b3f5 ("drm/amd/display: Fix
possible underflow for displays with large vblank").
[Why]
The increased value of VBlankNomDefaultUS causes underflow at the
desktop of an IP KVM setup
[How]
Change the value from 800 back to 668
Reviewed-by:
From: Daniel Miess
[Why]
Setting DPP/HUBP power gating debug settings occurs before debug
struct initalization leading to the values being clobbered
[How]
Move the setting down below debug struct initalization
Fixes: 6d642c58a814 ("drm/amd/display: Re-enable DPP/HUBP Power Gating")
Reviewed-by:
From: Sung-huai Wang
[Why & How]
We have to check if stream is properly initialized before calling
find_matching_pll(), otherwise we might end up trying to deferecence a
NULL pointer.
Cc: sta...@vger.kernel.org # 6.1+
Reviewed-by: Nicholas Kazlauskas
Acked-by: Hamza Mahfooz
Signed-off-by: Sun
From: Daniel Miess
[Why]
In some cases enabling RCO on older dcn314 chips leads to underflow
[How]
Explicitly disable RCO on unsupported dcn314 chips
Fixes: 0e1961c93839 ("drm/amd/display: Enable dcn314 DPP RCO")
Reviewed-by: Nicholas Kazlauskas
Acked-by: Hamza Mahfooz
Signed-off-by: Daniel M
From: Austin Zheng
Why:
Certain display configs resulted in underflow
How:
Add an entry containing all max DC clock timings
Reviewed-by: Alvin Lee
Acked-by: Hamza Mahfooz
Signed-off-by: Austin Zheng
---
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 90 --
.../drm/amd/displ
From: Alvin Lee
Clear update flags so the next flip does not have any redundant
programming (if a subsequent flip does not have a stream or plane
update, the update flags are not cleared).
Fixes: 7c2c33690791 ("drm/amd/display: Refactor fast update to use new HWSS
build sequence")
Reviewed-by:
From: Daniel Miess
This reverts commit e383b12709e32d6494c948422070c2464b637e44.
Controling hubp power gating using the DMCUB isn't stable so we
are reverting this change to move control back into the driver.
Cc: sta...@vger.kernel.org # 6.3+
Reviewed-by: Nicholas Kazlauskas
Acked-by: Hamza Ma
From: Sridevi Arvindekar
[Why]
We are currently missing some ABM registers.
[How]
Add the missing registers to dce_abm.h.
Reviewed-by: Jun Lei
Reviewed-by: Chris Park
Acked-by: Hamza Mahfooz
Signed-off-by: Sridevi Arvindekar
---
drivers/gpu/drm/amd/display/dc/dce/dce_abm.h | 29 +++
From: Alvin Lee
Condition for programming manually trigger used the wrong pipe (always
used top pipe instead of the one we are iterating through).
Fixes: 7c2c33690791 ("drm/amd/display: Refactor fast update to use new HWSS
build sequence")
Reviewed-by: Samson Tam
Acked-by: Hamza Mahfooz
Signe
From: Alvin Lee
- DC mode clock switch interface was previously only executed
for DCN303. Enable it for DCN32x so that the interface is called
correctly
- Assign function pointers for DCN32x that are used in the dc mode
interface
- Update the dc mode interface to work generically for each A
From: Dmytro Laktyushkin
Correct setting is div by 2 for odm. Seamless odm transitions
are enabled with enable_dp_dig_pixel_rate_div_policy debug flag.
Fixes: 252e0b122f50 ("drm/amd/display: fix pixel rate update sequence")
Reviewed-by: Nicholas Kazlauskas
Acked-by: Hamza Mahfooz
Signed-off-by
From: Leo Chen
[Why & How]
Having seamless boot on while forcing debug option ODM combine 2 to 1
will cause some corruptions because of some missing programmings.
Cc: sta...@vger.kernel.org # 6.1+
Reviewed-by: Nicholas Kazlauskas
Acked-by: Hamza Mahfooz
Signed-off-by: Leo Chen
---
drivers/gp
From: Fangzhi Zuo
When using debugfs to change MST link settings, we need to wait until
the next stream update to apply the preferred link setting. So, trigger
a hotplug event right after the preferred link setting is applied.
Reviewed-by: Wayne Lin
Acked-by: Hamza Mahfooz
Signed-off-by: Fangz
From: Alvin Lee
The new fast update sequence is now supported on some ASICs. So, enable
it by default for all applicable ASICs.
Reviewed-by: Samson Tam
Acked-by: Hamza Mahfooz
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 3 ++-
drivers/gpu/drm/amd/di
From: Ilya Bakoulin
[Why]
We don't check 128b132b-specific bits in LANE_ALIGN_STATUS_UPDATED DPCD
registers when parsing link loss status, which can cause us to miss a
link loss notification from some sinks.
[How]
Add a 128b132b-specific status bit check.
Cc: sta...@vger.kernel.org # 6.3+
Revie
From: Austin Zheng
Why:
Limiting clocks to DC mode max results in some
display modes to no longer be supported
How:
Disable the path that limits the clock values
Fixes: d65f0d2a2a2f ("drm/amd/display: Filter out AC mode frequencies on DC
mode systems")
Reviewed-by: Martin Leung
Acked-by: Hamz
From: Aric Cyr
This version brings along the following:
- DCN314 fixes
- DCN32x fixes
- New fast update sequence enablement
- DC mode clock switching enablement for DCN32x
- DP link loss fix
- New debugfs entry to set MST link settings
Acked-by: Hamza Mahfooz
Signed-off-by: Aric Cyr
---
drive
Hi Christian,
> > Report the per-ring timeout in milliseconds and allow users to adjust
> > the timeout dynamically. This can be useful for debugging, e.g. to more
> > easily test whether a submission genuinely hangs or is just taking very
> > long, and to temporarily disable GPU recovery so that
From: Daniel Miess
[Why]
Power gating is causing error messages on some DCN314 systems
[How]
Force disable power gating for DCN314
Fixes: 6d642c58a814 ("drm/amd/display: Re-enable DPP/HUBP Power Gating")
Reviewed-by: Nicholas Kazlauskas
Acked-by: Hamza Mahfooz
Signed-off-by: Daniel Miess
---
From: Daniel Miess
[Why]
RCO is causing error messages on some DCN314 systems
[How]
Force disable RCO for DCN314
Fixes: 0e1961c93839 ("drm/amd/display: Enable dcn314 DPP RCO")
Reviewed-by: Nicholas Kazlauskas
Acked-by: Hamza Mahfooz
Signed-off-by: Daniel Miess
---
drivers/gpu/drm/amd/displa
Hi Dave, Daniel,
Fixes for 6.4.
The following changes since commit 858fd168a95c5b9669aac8db6c14a9aeab446375:
Linux 6.4-rc6 (2023-06-11 14:35:30 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.4-2023-06-14
for you to fetch
patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Jiapeng-Chong/drm-amdkfd-Switch-over-to-memdup_user/20230614-100553
base: next-20230613
patch link:
Hi,
Does anyone has the bandwidth to review this?
I provide more additional information here, hope it helps.
On a non-x86 multiple platform, the discrete AMDGPU fails to override
the integrated one.
because the PCI BAR 0 of the AMDGPU gets moved.
Below is the log of 'dmesg | grep vgaarb'.
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