This adds the infrastructure for an execution context for GEM buffers
which is similar to the existinc TTMs execbuf util and intended to replace
it in the long term.
The basic functionality is that we abstracts the necessary loop to lock
many different GEM buffers with automated deadlock and dupli
Hello everyone,
compared to the earlier version this has seen quite a bit of additional
testing and can now handle both amdgpu as well as radeon without any
performance drop.
QXL is converted over as well and then the remaining ttm_execbuf_util
implementation moved into VMWGFX which is the only r
This adds the infrastructure for an execution context for GEM buffers
which is similar to the existinc TTMs execbuf util and intended to replace
it in the long term.
The basic functionality is that we abstracts the necessary loop to lock
many different GEM buffers with automated deadlock and dupli
Largely just the initial skeleton.
Signed-off-by: Christian König
---
drivers/gpu/drm/selftests/Makefile| 2 +-
.../gpu/drm/selftests/drm_exec_selftests.h| 10 +++
drivers/gpu/drm/selftests/test-drm_exec.c | 74 +++
3 files changed, 85 insertions(+), 1 deleti
Avoids quite a bit of logic and kmalloc overhead.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h| 5 +-
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 303 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 14 +
drivers/gpu/drm/amd/amdgpu/a
Just a straightforward conversion without any optimization.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon.h| 7 ++--
drivers/gpu/drm/radeon/radeon_cs.c | 45 +-
drivers/gpu/drm/radeon/radeon_gem.c| 40 +--
drivers/gp
Start using the new component here as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 42 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 77 +++--
2 files changed, 53 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/amd
Use the new component here as well and remove the old handling.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 70 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h | 7 +-
drivers/gpu/drm/amd/amdgpu/amdgp
Just a straightforward conversion without any optimization.
Only compile tested for now.
Signed-off-by: Christian König
---
drivers/gpu/drm/qxl/qxl_drv.h | 7 ++--
drivers/gpu/drm/qxl/qxl_release.c | 67 ---
2 files changed, 38 insertions(+), 36 deletions(-)
di
VMWGFX is the only remaining user of this and should probably moved over
to drm_exec when it starts using GEM as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/Makefile | 4 ++--
drivers/gpu/drm/vmwgfx/Makefile | 2 +-
Add common vcn sofware ring decode.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/Makefile | 1 +
drivers/gpu/drm/amd/amdgpu/vcn_sw_ring.c | 85
drivers/gpu/drm/amd/amdgpu/vcn_sw_ring.h | 39 +++
3 files changed, 125 insertions(+)
create mode 100
Replace ip based software ring decode with common vcn software ring decode.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
b/drivers/gpu/drm/amd
Replace ip based software ring decode with common vcn software ring decode.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 82 ---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.h | 12
2 files changed, 11 insertions(+), 83 deletions(-)
diff --git a/drive
This reverts commit 9a45ac2320d0a6ae01880a30d4b86025fce4061b.
This was added a helper for amdgpu to workaround a runtime pm regression
caused by a runtime pm fix in efifb. We now have a better workarouund
in amdgpu in
commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays
This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b.
This workaround is no longer necessary. We have a better workaround
in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are
displays attached (v3)").
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdg
This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b.
This workaround is no longer necessary. We have a better workaround
in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are
displays attached (v3)").
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdg
This reverts commit 9a45ac2320d0a6ae01880a30d4b86025fce4061b.
This was added a helper for amdgpu to workaround a runtime pm regression
caused by a runtime pm fix in efifb. We now have a better workarouund
in amdgpu in
commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays
Am 04.05.22 um 15:23 schrieb James Zhu:
Replace ip based software ring decode with common vcn software ring decode.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 82 ---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.h | 12
2 files changed, 11 inser
In SRIOV, PSP will block incompatible firmware from loading. When this
happens, driver should be prevented from continue initialization and
start cleanup. Return failure in psp_cmd_submit_buf when firmware load
failed in SRIOV.
Signed-off-by: Alice Wong
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.
Add common vcn sofware ring decode.
Signed-off-by: James Zhu
Reviewed-by: Christian Koenig
---
drivers/gpu/drm/amd/amdgpu/Makefile | 1 +
drivers/gpu/drm/amd/amdgpu/vcn_sw_ring.c | 85
drivers/gpu/drm/amd/amdgpu/vcn_sw_ring.h | 44
3 files changed, 13
v2: add VCN_SW_RING_EMIT_FRAME_SIZE.(Suggested from Christian)
James Zhu (3):
drm/amdgpu/vcn: add common vcn sofware ring decode
drm/amdgpu/vcn3: replace ip based software ring decode with common vcn
software ring decode
drm/amdgpu/vcn4: replace ip based software ring decode with common
Replace ip based software ring decode with common vcn software ring decode.
Signed-off-by: James Zhu
Reviewed-by: Christian Koenig
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 80 +++
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.h | 12
2 files changed, 9 insertions(+), 83 de
Replace ip based software ring decode with common vcn software ring decode.
Signed-off-by: James Zhu
Reviewed-by: Christian Koenig
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v
Problem:
During hive reset caused by command timing out on a ring
extra resets are generated by triggered by KFD which is
unable to accesses registers on the resetting ASIC.
Fix: Rework GPU reset to use a list of pending reset jobs
such that the first reset jobs that actaully resets the entire
res
Hello Alex,
On 5/4/22 15:48, Alex Deucher wrote:
> This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b.
>
> This workaround is no longer necessary. We have a better workaround
> in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are
> displays attached (v3)").
>
I w
On Wed, May 04, 2022 at 09:48:32AM -0400, Alex Deucher wrote:
> This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b.
>
> This workaround is no longer necessary. We have a better workaround
> in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are
> displays attached (v
On 5/4/22 15:48, Alex Deucher wrote:
> This reverts commit 9a45ac2320d0a6ae01880a30d4b86025fce4061b.
>
> This was added a helper for amdgpu to workaround a runtime pm regression
> caused by a runtime pm fix in efifb. We now have a better workarouund
s/workarouund/workaround
> in amdgpu in
> com
On Wed, May 4, 2022 at 12:46 PM Javier Martinez Canillas
wrote:
>
> Hello Alex,
>
> On 5/4/22 15:48, Alex Deucher wrote:
> > This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b.
> >
> > This workaround is no longer necessary. We have a better workaround
> > in commit f95af4a9236695 ("drm
On 5/4/22 18:50, Alex Deucher wrote:
> On Wed, May 4, 2022 at 12:46 PM Javier Martinez Canillas
> wrote:
>>
>> Hello Alex,
>>
>> On 5/4/22 15:48, Alex Deucher wrote:
>>> This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b.
>>>
>>> This workaround is no longer necessary. We have a better
Hi Dave, Daniel,
Fixes for 5.18.
The following changes since commit 9d9f720733b7e8d11e4cc53b53f461b117dab839:
Merge tag 'amd-drm-fixes-5.18-2022-04-27' of
https://gitlab.freedesktop.org/agd5f/linux into drm-fixes (2022-04-29 10:27:05
+1000)
are available in the Git repository at:
https:/
Some good news: I actually came up with a way of handling this in the new MST
code pretty nicely, so I think we should be able to move forward without
having to disable this (although it would be very nice to know whether or not
this is necessary for amdgpu to work, since it'd still be nice to spli
The 3rd patch from the previous series was already applied
This reworks the other two based on Alex's comments
Mike Lothian (2):
drm/amdgpu/gfx10: Avoid uninitialised variable 'index'
drm/amdgpu/gfx11: Avoid uninitialised variable 'index'
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 ++-
driv
This stops clang complaining:
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:6: warning: variable 'index' is
used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
if (ring->is_mes_queue) {
^~
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3903:30:
This stops clang complaining:
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:6: warning: variable 'index' is used
uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
if (ring->is_mes_queue) {
^~
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:433:30: n
Ping...
From: ricet...@gmail.com
Sent: Saturday, April 30, 2022 3:34:00 PM
To: amd-gfx@lists.freedesktop.org
Cc: lang...@amd.com ; ckoenig.leichtzumer...@gmail.com
; guchun.c...@amd.com ;
yifan1.zh...@amd.com ; hawking.zh...@amd.com
; Haohui Mai
Subject: [PATC
From: Minghao Chi
Simplify the return expression.
Reported-by: Zeal Robot
Signed-off-by: Minghao Chi
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 13 ++---
1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdg
Applied the series. Thanks!
Alex
On Wed, May 4, 2022 at 6:24 PM Mike Lothian wrote:
>
> This stops clang complaining:
>
> drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:6: warning: variable 'index' is
> used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
> if (ri
Applied. Thanks!
On Wed, May 4, 2022 at 10:11 PM wrote:
>
> From: Minghao Chi
>
> Simplify the return expression.
>
> Reported-by: Zeal Robot
> Signed-off-by: Minghao Chi
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 13 ++---
> 1 file changed, 2 insertions(+), 11 deletions(-)
>
>
From: Minghao Chi
Simplify the return expression.
Reported-by: Zeal Robot
Signed-off-by: Minghao Chi
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
b/drivers/gpu/drm/amd/amdgpu/vega10
Applied. Thanks!
Alex
On Wed, May 4, 2022 at 10:22 PM wrote:
>
> From: Minghao Chi
>
> Simplify the return expression.
>
> Reported-by: Zeal Robot
> Signed-off-by: Minghao Chi
> ---
> drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> di
[AMD Official Use Only - General]
Hi Lyude:
Sorry for replying late.
1. The payload increase/decrease routines are not for DP2.
2. mst_bw_update is not used in amdgpu_dm, so those two functions are not
getting used for now. I leave it there simply for future possible hook up.
Re
On Wed, May 4, 2022 at 2:28 AM Christian König wrote:
>
> Am 03.05.22 um 22:38 schrieb Alex Deucher:
> > From: Xiaojian Du
> >
> > This patch will handle asics with 1 SDMA instance.
> >
> > Signed-off-by: Xiaojian Du
> > Reviewed-by: Huang Rui
> > Reviewed-by: Alex Deucher
> > Signed-off-by: A
Check of the base offset for the IP exists rather than
explicitly checking for how many instances of a particular
IP there are. This is what soc15.c already does. Expand
this to nv.c and soc21.c.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c| 6 +++---
drivers/gpu/drm/amd
Some copy paste leftovers for older asics. They were protected
by __BIG_ENDIAN, so we didn't notice them initially.
Reported-by: kernel test robot
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/amd
Then other IPs can use this utility.
Signed-off-by: Lang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 3 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 36 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 36 --
drivers/gpu/drm/amd/amdgpu/amdgpu_gf
Some copy paste leftovers for older asics. They were protected
by __BIG_ENDIAN, so we didn't notice them initially.
Reported-by: kernel test robot
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/am
[why]
lru_list not empty warning in sw fini during repeated device bind unbind.
There should be a amdgpu_fence_wait_empty() before the flush_delayed_work()
call as sugested.
[how]
Do flush_delayed_work for ttm bo delayed delete wq after fence_driver_hw_fini.
Signed-off-by: Yiqing Yao
---
driver
Am 05.05.22 um 05:20 schrieb Lang Yu:
Then other IPs can use this utility.
Oh, we intentionally move the scratch register handling from the device
code into the GFX code a few years ago.
Why is that suddenly necessary here again?
Regards,
Christian.
Signed-off-by: Lang Yu
---
drivers/
Am 05.05.22 um 08:35 schrieb Yiqing Yao:
[why]
lru_list not empty warning in sw fini during repeated device bind unbind.
There should be a amdgpu_fence_wait_empty() before the flush_delayed_work()
call as sugested.
[how]
Do flush_delayed_work for ttm bo delayed delete wq after fence_driver_hw_fi
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