Eliminate the following coccicheck warning:
./drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c:477:2-3:
Unneeded semicolon
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 d
In order to debug ras error, driver will print IPID/SYND/MISC0
register value if detect correctable or uncorrectable error.
Provide umc_query_error_status_helper function to reduce code
redundancy.
Change-Id: I09a2aae85cde3ab2cb6b042b973da6839ad024ec
Signed-off-by: Stanley.Yang
---
drivers/gpu/d
Am 08.04.22 um 06:02 schrieb Lijo Lazar:
Use flexible array member in ip discovery struct as recommended[1].
[1]
https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c |
[AMD Official Use Only]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Stanley.Yang
> Sent: Friday, April 8, 2022 4:10 PM
> To: amd-gfx@lists.freedesktop.org; Zhang, Hawking
> ; Zhou1, Tao ; Li, Candice
>
> Cc: Yang, Stanley
> Subject: [PATCH Review 1/1] drm/amdgpu: add umc query
Is amdgpu_display_get_fb_info ever called with NULL tiling_flags/tmz_surface?
If not, there's no point in adding NULL checks.
Use flexible array member in ip discovery struct as recommended[1].
[1]
https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays
Signed-off-by: Lijo Lazar
---
v2 : Use struct_size (Christian)
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
drive
Dear Stanley,
Thank you for the patch.
Am 08.04.22 um 10:10 schrieb Stanley.Yang:
Please remove the dot/period from the name.
In order to debug ras error, driver will print IPID/SYND/MISC0
register value if detect correctable or uncorrectable error.
… if it detects …
Provide umc_query_er
Am 08.04.22 um 12:07 schrieb Lijo Lazar:
Use flexible array member in ip discovery struct as recommended[1].
[1]
https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays
Signed-off-by: Lijo Lazar
Reviewed-by: Christian König
---
v2 : Use struct_
On Fri, 08 Apr 2022, cgel@gmail.com wrote:
> From: Lv Ruyi
>
> There are some spelling mistakes in the comments. Fix it.
Please prefer splitting by driver. This isn't even split by subsystem. I
presume there are very few maintainers willing to pick this up as it is.
BR,
Jani.
>
> Reported-b
[AMD Official Use Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Friday, April 8, 2022 18:07
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
Subject: [PATCH v2] drm/amdgpu: Use flexible array member
Use flexible
[AMD Official Use Only]
+static void umc_query_error_status_helper(struct amdgpu_device *adev,
+ uint64_t mc_umc_status,
uint32_t umc_reg_offset)
Might be better keep umc_v6_7 naming style. Call it umc_v6_7_query_mca_status.
Apart from that, the p
Hi Christian
> those are two independent and already known problems.
>
> The warning triggered from the sync_file is already fixed in
> drm-misc-next-fixes, but so far I couldn't figure out why the games
> suddenly doesn't work any more.
I thought that these warnings are related to the stuck of t
Am 08.04.22 um 13:01 schrieb Mikhail Gavrilov:
Hi Christian
those are two independent and already known problems.
The warning triggered from the sync_file is already fixed in
drm-misc-next-fixes, but so far I couldn't figure out why the games
suddenly doesn't work any more.
I thought that the
On Fri, Apr 8, 2022 at 12:01 PM Simon Ser wrote:
>
> Is amdgpu_display_get_fb_info ever called with NULL tiling_flags/tmz_surface?
> If not, there's no point in adding NULL checks.
It isn't called with NULL anywhere, the NULL checks that already exist
seem redundant.
On Friday, April 8th, 2022 at 13:28, Bas Nieuwenhuizen
wrote:
> On Fri, Apr 8, 2022 at 12:01 PM Simon Ser cont...@emersion.fr wrote:
>
> > Is amdgpu_display_get_fb_info ever called with NULL
> > tiling_flags/tmz_surface?
> > If not, there's no point in adding NULL checks.
>
> It isn't called wi
On Fri, 8 Apr 2022 at 16:13, Christian König wrote:
> I own you a beer.
>
> I still don't know what happens here, but that makes at least a bit more
> sense than a patch which only changes comments :)
>
> Looks like we are missing something here. Can I send you a patch to try
> something later to
Hi Bhanuprakash,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip next-20220408]
[cannot apply to drm/drm-next v5.18-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And
The revision was not changed to 5 from 4. Also since
this was missed I took the opportunity to add future
upper 64-bits of PG flags as well so we don't need to
bump it again when that comes.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 7 ---
1 file changed,
On Friday, April 8th, 2022 at 15:21, Grigory Vasilyev wrote:
> Simon Ser and Bas Nieuwenhuizen, do you understand that you are
> proposing to make the code less safe in the future? In the future,
> someone might rewrite the code and we'll get an error.
I don't think we should blindly add NULL ch
I'd add who and how is the message dropped, and also mention that we're unable
to recognize a dropped message.
On 2022-04-07 22:26, Darren Powell wrote:
> Contrary to the smu_cmn_send_smc_msg_with_param documentation, two
> cases exist where messages are silently dropped with no error returned
>
The code below check for NULL, but is no check at this place, which is
potentially dangerous.
Signed-off-by: Grigory Vasilyev
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/d
Thanks Evan, your patch applied to Linus' origin/master source worked for me
running amdgpu module with a Radeon SI (Cape Verde) GPU card.
Regards,
Arthur Marsh.
On 8 April 2022 9:54:57 pm ACST, "Quan, Evan" wrote:
>[AMD Official Use Only]
>
>Hi Arthur,
>
>Please give the attached patch a try
Currently, the IO-links to the device being removed from topology,
are not cleared. As a result, there would be dangling links left in
the KFD topology. This patch aims to fix the following:
1. Cleanup all IO links to the device being removed.
2. Ensure that node numbering in sysfs and nodes proxim
Adding PCIe Hotplug Support for AMDKFD: the support of hot-plug of GPU
devices can open doors for many advanced applications in data center
in the next few years, such as for GPU resource
disaggregation. Current AMDKFD does not support hotplug out b/o the
following reasons:
1. During PCIe removal,
From: Lv Ruyi
There are some spelling mistakes in the comments. Fix it.
Reported-by: Zeal Robot
Signed-off-by: Lv Ruyi
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/net/ethernet/sfc/mcdi_pcol.h
Instead of the 'amdgpu_ring_priority_level' type,
the 'amdgpu_gfx_pipe_priority' type was used,
which is an error when setting ring priority.
This is a minor error, but may cause problems in the future.
Instead of AMDGPU_RING_PRIO_2 = 2, we can use AMDGPU_RING_PRIO_MAX = 3,
but AMDGPU_RING_PRIO_2
Simon Ser and Bas Nieuwenhuizen, do you understand that you are
proposing to make the code less safe in the future? In the future,
someone might rewrite the code and we'll get an error.
пт, 8 апр. 2022 г. в 14:48, Simon Ser :
>
> On Friday, April 8th, 2022 at 13:28, Bas Nieuwenhuizen
> wrote:
>
Add CONFIG_X86 check to fix the build error.
Fixes: 67c7a4b1ec6c
("drm/amd/amdgpu: Only reserve vram for firmware with vega9 MS_HYPERV
host.")
Reported-by: kernel test robot
Signed-off-by: Yongqiang Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4
1 file changed, 4 insertions(+)
diff
On Fri, Apr 8, 2022 at 9:58 AM Yongqiang Sun wrote:
>
> Add CONFIG_X86 check to fix the build error.
>
> Fixes: 67c7a4b1ec6c
> ("drm/amd/amdgpu: Only reserve vram for firmware with vega9 MS_HYPERV
> host.")
>
> Reported-by: kernel test robot
> Signed-off-by: Yongqiang Sun
Acked-by: Alex Deucher
Am 08.04.22 um 14:24 schrieb Mikhail Gavrilov:
On Fri, 8 Apr 2022 at 16:13, Christian König wrote:
I own you a beer.
I still don't know what happens here, but that makes at least a bit more
sense than a patch which only changes comments :)
Looks like we are missing something here. Can I send
Am 08.04.22 um 15:21 schrieb Grigory Vasilyev:
Simon Ser and Bas Nieuwenhuizen, do you understand that you are
proposing to make the code less safe in the future? In the future,
someone might rewrite the code and we'll get an error.
Which is perfectly fine.
See error handling is to handle user
On Fri, Apr 8, 2022 at 9:21 AM Tom St Denis wrote:
>
> The revision was not changed to 5 from 4. Also since
> this was missed I took the opportunity to add future
> upper 64-bits of PG flags as well so we don't need to
> bump it again when that comes.
>
> Signed-off-by: Tom St Denis
Maybe add a
On 2022-04-08 02:53, Bhanuprakash Modem wrote:
> It's useful to know the connector's max supported bpc for IGT
> testing. Expose it via a debugfs file on the connector "output_bpc".
>
> Example: cat /sys/kernel/debug/dri/0/DP-1/output_bpc
>
> Cc: Jani Nikula
> Cc: Ville Syrjälä
> Cc: Harry W
On 2022-04-08 02:53, Bhanuprakash Modem wrote:
> As drm_connector already have the display_info, instead of creating
> "output_bpc" debugfs in vendor specific driver, move the logic to
> the drm layer.
>
> This patch will also move "Current" bpc to the crtc debugfs from
> connector debugfs, sin
On Fri-08-04-2022 08:33 pm, Harry Wentland wrote:
On 2022-04-08 02:53, Bhanuprakash Modem wrote:
As drm_connector already have the display_info, instead of creating
"output_bpc" debugfs in vendor specific driver, move the logic to
the drm layer.
This patch will also move "Current" bpc to the
On 2022-04-08 11:23, Modem, Bhanuprakash wrote:
> On Fri-08-04-2022 08:33 pm, Harry Wentland wrote:
>>
>>
>> On 2022-04-08 02:53, Bhanuprakash Modem wrote:
>>> As drm_connector already have the display_info, instead of creating
>>> "output_bpc" debugfs in vendor specific driver, move the logic t
On Fri-08-04-2022 08:32 pm, Harry Wentland wrote:
On 2022-04-08 02:53, Bhanuprakash Modem wrote:
It's useful to know the connector's max supported bpc for IGT
testing. Expose it via a debugfs file on the connector "output_bpc".
Example: cat /sys/kernel/debug/dri/0/DP-1/output_bpc
Cc: Jani Ni
On 2022-04-08 04:45, Shuotao Xu wrote:
Adding PCIe Hotplug Support for AMDKFD: the support of hot-plug of GPU
devices can open doors for many advanced applications in data center
in the next few years, such as for GPU resource
disaggregation. Current AMDKFD does not support hotplug out b/o the
Active State Power Management (ASPM) feature is enabled since kernel 5.14.
However there are some legacy products (WX3200 and RX640 are examples) that
do not support ASPM. Use them as video/display output and system would hang
during suspend/resume.
Add extra check to disable ASPM for old products
[Public]
> -Original Message-
> From: Gong, Richard
> Sent: Friday, April 8, 2022 10:45
> To: Deucher, Alexander ; Koenig, Christian
> ; Pan, Xinhui ;
> airl...@linux.ie; dan...@ffwll.ch
> Cc: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; linux-
> ker...@vger.kernel.or
On Fri, Apr 8, 2022 at 11:47 AM Limonciello, Mario
wrote:
>
> [Public]
>
>
>
> > -Original Message-
> > From: Gong, Richard
> > Sent: Friday, April 8, 2022 10:45
> > To: Deucher, Alexander ; Koenig, Christian
> > ; Pan, Xinhui ;
> > airl...@linux.ie; dan...@ffwll.ch
> > Cc: amd-gfx@lists.
On Fri, Apr 8, 2022 at 11:54 AM Alex Deucher wrote:
>
> On Fri, Apr 8, 2022 at 11:47 AM Limonciello, Mario
> wrote:
> >
> > [Public]
> >
> >
> >
> > > -Original Message-
> > > From: Gong, Richard
> > > Sent: Friday, April 8, 2022 10:45
> > > To: Deucher, Alexander ; Koenig, Christian
> >
Hi Alex,
On 4/8/2022 10:54 AM, Alex Deucher wrote:
On Fri, Apr 8, 2022 at 11:47 AM Limonciello, Mario
wrote:
[Public]
-Original Message-
From: Gong, Richard
Sent: Friday, April 8, 2022 10:45
To: Deucher, Alexander ; Koenig, Christian
; Pan, Xinhui ;
airl...@linux.ie; dan...@ffwll.
On 4/8/2022 10:47 AM, Limonciello, Mario wrote:
[Public]
-Original Message-
From: Gong, Richard
Sent: Friday, April 8, 2022 10:45
To: Deucher, Alexander ; Koenig, Christian
; Pan, Xinhui ;
airl...@linux.ie; dan...@ffwll.ch
Cc: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesk
[Public]
> -Original Message-
> From: Gong, Richard
> Sent: Friday, April 8, 2022 11:20
> To: Limonciello, Mario ; Deucher, Alexander
> ; Koenig, Christian
> ; Pan, Xinhui ;
> airl...@linux.ie; dan...@ffwll.ch
> Cc: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; linux-
On Fri, 8 Apr 2022 at 19:27, Christian König wrote:
>
> Please test the attached patch, it just re-introduce the lock without
> doing much else.
>
> And does your branch contain the following patch:
>
> commit d18b8eadd83e3d8d63a45f9479478640dbcfca02
> Author: Christian König
> Date: Wed Feb 23
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
*Disabling Z10 on DCN31
*Fix issue breaking 32bit Linux build
*Fix inconsistent timestamp type
*Add DCN30 support FEC init
*Fix crash on setting VRR with no display connected
*Disable FEC
From: Josip Pavic
[Why]
When booting, the driver waits for the MPC idle bit to be set as part of
pipe initialization. However, on some systems this occurs before OTG is
enabled, and since the MPC idle bit won't be set until the vupdate
signal occurs (which requires OTG to be enabled), this never
From: Eric Yang
[Why]
Z10 and S0i3 have some shared path. Previous code clean up ,
incorrectly removed these pointers, which breaks s0i3 restore
[How]
Do not clear the function pointers based on Z10 disable.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Pavle Kotarac
Signed-off-by: Eric Yang
--
From: Max Erenberg
[WHY]
The dGPU cannot enter PSR when it is not connected to a panel.
[HOW]
Added a check to dc_link_set_psr_allow_active
which returns early if panel is disconnected.
Reviewed-by: Harry Vanzylldejong
Reviewed-by: Evgenii Krasnikov
Reviewed-by: Nicholas Choi
Acked-by: Pavle
From: "AMD\\syerizvi"
[WHY]
Z10 is should not be enabled by default on DCN31.
[HOW]
Using DC debug flags to disable Z10 by default on DCN31.
Reviewed-by: Eric Yang
Acked-by: Pavle Kotarac
Signed-off-by: AMD\syerizvi
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 1 +
1 file cha
From: Harry VanZyllDeJong
[HOW&WHY]
VRR was getting set at the same time
the timing generator would be null when there was no display
connected. Added null check to the timing generator variable
so it does not get referenced if it is null.
Reviewed-by: Harry Vanzylldejong
Reviewed-by: Evgenii K
From: Iswara Nagulendran
[WHY]
Screen was seen corrupted for a few ms
when switching both ways. There was also
not enough bandwidth for HDR to be
enabled in HG disabled mode.
This was due to FEC being
enabled although DSC was not supported
or disabled for the EDP.
[HOW]
Check for EDP DSC support
From: Evgenii Krasnikov
[HOW&WHY]
Make sure psr_force_static() can always be called regardless of
psr_allow_active value.
Reviewed-by: Harry Vanzylldejong
Reviewed-by: Evgenii Krasnikov
Reviewed-by: Nicholas Choi
Acked-by: Pavle Kotarac
Signed-off-by: Evgenii Krasnikov
---
drivers/gpu/drm/
From: Paul Hsieh
[WHY]
In headless systems, if SetMode/Power down timer
is not called, hardware will not be powered down
causing HW/SW discrepancies. Powering down hardware
on SetPowerState to D3 will ensure SW/HW state is accurate.
[HOW]
1. If PowerDownThread timer is not trigger but OS call
Se
From: Charlene Liu
[why]
dcn316's dtbclk is from non_ss clock source.
no compensation required here.
Reviewed-by: Chris Park
Acked-by: Pavle Kotarac
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c | 2 +-
.../gpu/drm/amd/display/dc/clk_mgr/dcn316
From: Duncan Ma
[WHY]
Implement changes to transition from Pre-OS odm to
Post-OS odm support. Seamless boot case is also
considered.
[HOW]
Revised validation logic when marking for seamless
boot. Init resources accordingly when Pre-OS has
odm enabled. Reset odm and det size when transitioning
Pr
From: Oliver Logush
[why]
Need to update the update_clock sequence to a fully tested sequence for
dcn30
[how]
Removed the check to see if clock is lowered
Reviewed-by: Charlene Liu
Acked-by: Pavle Kotarac
Signed-off-by: Oliver Logush
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_
From: Oliver Logush
[why]
Make sure smu is not busy before sending another request, this is to
prevent stress failures from MS.
[how]
Check to make sure the SMU fw busy signal is cleared before sending
another request
Reviewed-by: Charlene Liu
Reviewed-by: Nicholas Kazlauskas
Acked-by: Pavle
From: Dillon Varone
Reviewed-by: Ariel Bernstein
Acked-by: Pavle Kotarac
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 863d90bec61b..544d
From: Jingwen Zhu
[Why]
FEC init used on DCN30.
[How]
Check fec active when HW init.
Co-authored-by: Jingwen Zhu
Reviewed-by: Wenjing Liu
Acked-by: Pavle Kotarac
Signed-off-by: Jingwen Zhu
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 6 +-
1 file changed, 5 insertions(+), 1
From: Angus Wang
[WHY]
An unsigned int timestamp variable is assigned with an unsigned
long long value. Also, the assignment directly converts the
tick value to us without using built-in get elapsed time function.
[HOW]
Cast the assigned value correctly and also use built-in function
to get the
From: hersen wu
[Why] within dc link detecion, dp link training will be
executed for external sst dp. for debug purpose, we may
need skip dp link training.
[How] expose dc debug option to skip_detection_link_training
to debugfs
Reviewed-by: Roman Li
Acked-by: Pavle Kotarac
Signed-off-by: hers
From: Hayden Goodfellow
[Why]
Currently, the 32bit linux build is failing due to an issue with using the
built-in / operator with a 64bit dividend. Doing so generates code which
calls __udivdi3() in libgcc. However, libgcc is not linked with the kernel
at this point in the build, hence this cause
From: Aric Cyr
Title: DC Patches Apri 6, 2022
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
*Disabling Z10 on DCN31
*Fix issue breaking 32bit Linux build
*Fix inconsistent timestamp type
*Add DCN30 support FEC init
*Fix crash on setting VRR with no display c
From: Dillon Varone
[WHY&HOW]
Change criteria for setting DTO source value, and always set it regardless of
the signal type.
Reviewed-by: Ariel Bernstein
Acked-by: Pavle Kotarac
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 2 +-
1 file changed, 1 i
From: David Zhang
[why]
creating a generic helper for AMD specific PSR-SU sink validation.
Moving the function to the power module to reference it across all
OS.
[how]
- drop PSRSU specific sink validation helper and move to power
module by reading PSR version and other PSR caps
- call the new
On Fri, Apr 8, 2022 at 12:15 PM Gong, Richard wrote:
>
> Hi Alex,
>
> On 4/8/2022 10:54 AM, Alex Deucher wrote:
> > On Fri, Apr 8, 2022 at 11:47 AM Limonciello, Mario
> > wrote:
> >> [Public]
> >>
> >>
> >>
> >>> -Original Message-
> >>> From: Gong, Richard
> >>> Sent: Friday, April 8, 2
Active State Power Management (ASPM) feature is enabled since kernel 5.14.
There are some AMD GFX cards (such as WX3200 and RX640) that cannot be
used with Intel AlderLake based systems to enable ASPM. Using these GFX
cards as video/display output, Intel Alder Lake based systems will hang
during su
On Fri, Apr 8, 2022 at 3:05 PM Richard Gong wrote:
>
> Active State Power Management (ASPM) feature is enabled since kernel 5.14.
> There are some AMD GFX cards (such as WX3200 and RX640) that cannot be
> used with Intel AlderLake based systems to enable ASPM. Using these GFX
> cards as video/disp
[Public]
> -Original Message-
> From: Alex Deucher
> Sent: Friday, April 8, 2022 14:09
> To: Gong, Richard
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Pan, Xinhui ; Dave Airlie
> ; Daniel Vetter ; Limonciello, Mario
> ; Maling list - DRI developers de...@lists.freedesktop.org>; a
On Thu, Apr 7, 2022 at 5:47 PM Tom Rix wrote:
>
> cayman_default_state and cayman_default_size are only
> used in ni.c. Single file symbols should be static.
> So move their definitions to cayman_blit_shaders.h
> and change their storage-class-specifier to static.
>
> Remove unneeded cayman_blit_
Applied. Thanks!
On Fri, Apr 8, 2022 at 3:58 AM Grigory Vasilyev wrote:
>
> Instead of the 'amdgpu_ring_priority_level' type,
> the 'amdgpu_gfx_pipe_priority' type was used,
> which is an error when setting ring priority.
> This is a minor error, but may cause problems in the future.
>
> Instead
On Thu, Apr 7, 2022 at 7:31 PM Nathan Chancellor wrote:
>
> On Thu, Apr 07, 2022 at 03:50:29PM -0400, Alex Deucher wrote:
> > Use do_div() rather than a a 64 bit divide.
> >
> > Fixes: 3fe5739db48843 ("drm/amd/display: Add flip interval workaround")
> > Reported-by: kernel test robot
> > Signed-o
[AMD Official Use Only]
inline
From: Tuikov, Luben
Sent: Friday, April 8, 2022 9:33 AM
To: Powell, Darren ; amd-gfx@lists.freedesktop.org
Cc: Quan, Evan ; wenhui.sh...@amd.com
; Grodzovsky, Andrey
Subject: Re: [PATCH 1/1] amdgpu/pm: Clarify Documentation of e
[AMD Official Use Only]
will respin and incorporate your suggestions
Thanks,
Darren
From: Paul Menzel
Sent: Friday, April 8, 2022 2:29 AM
To: Powell, Darren
Cc: amd-gfx@lists.freedesktop.org ; Tuikov,
Luben ; Quan, Evan ;
wenhui.sh...@amd.com ; Grodzovsky, Andr
fix compilation warning arising from fixing incorrect VMIDs passed to HWS patch
Signed-off-by: Tushar Patel
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/kfd_de
Use div_u64() rather than a a 64 bit divide.
Fixes: 3fe5739db48843 ("drm/amd/display: Add flip interval workaround")
Reported-by: kernel test robot
Signed-off-by: Alex Deucher
Cc: Angus Wang
Cc: Anthony Koo
Cc: Aric Cyr
Cc: Nathan Chancellor
---
drivers/gpu/drm/amd/display/modules/freesync/
On Fri, Apr 08, 2022 at 05:04:55PM -0400, Alex Deucher wrote:
> Use div_u64() rather than a a 64 bit divide.
>
> Fixes: 3fe5739db48843 ("drm/amd/display: Add flip interval workaround")
> Reported-by: kernel test robot
> Signed-off-by: Alex Deucher
> Cc: Angus Wang
> Cc: Anthony Koo
> Cc: Aric
Dear Richard,
Thank you for your patch.
Am 08.04.22 um 21:05 schrieb Richard Gong:
Active State Power Management (ASPM) feature is enabled since kernel 5.14.
There are some AMD GFX cards (such as WX3200 and RX640) that cannot be
used with Intel AlderLake based systems to enable ASPM. Using the
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