[AMD Official Use Only]
Hi Christian,
There is already a string comparison in the same function. I just reference
that to port this solution.
#define ACPI_AC_CLASS "ac_adapter"
static int amdgpu_acpi_event(struct notifier_block *nb,
unsigned long val,
Hi Ryan,
we should try to avoid that and if it isn't possible at least use some
constant like ACPI_AC_CLASS.
Could be that the information isn't available otherwise. Alex should
know more about that.
Regards,
Christian.
Am 25.03.22 um 08:09 schrieb Lin, Tsung-hua (Ryan):
[AMD Official Use
Am 24.03.22 um 22:31 schrieb Alex Deucher:
Properly case to u32 to fix the warning.
Fixes: 83f1287c57228f ("drm/amdkfd: Fix Incorrect VMIDs passed to HWS")
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
Am 25.03.22 um 01:06 schrieb Sean Paul:
From: Sean Paul
ATOMIC and DRIVER log categories do not typically contain per-frame log
messages. This patch re-classifies some messages in amd to chattier
categories to keep ATOMIC/DRIVER quiet.
Signed-off-by: Sean Paul
Please use drm/amdgpu for the
Instead of ASIC type, use GC and MP1 IP versions for feature support checks.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 72 --
1 file changed, 39 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm
Fix two incorrect kerneldocs for the recent VM code changes.
Signed-off-by: Christian König
Reported-by: kernel test robot
Reported-by: Stephen Rothwell
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 2 +-
2 files changed, 2 insertions(+), 2 d
On Fri, Mar 25, 2022 at 08:22:29AM +0100, Christian König wrote:
> Hi Ryan,
>
> we should try to avoid that and if it isn't possible at least use some
> constant like ACPI_AC_CLASS.
>
> Could be that the information isn't available otherwise. Alex should know
> more about that.
I wonder whether
Am 25.03.22 um 10:49 schrieb Daniel Vetter:
On Fri, Mar 25, 2022 at 08:22:29AM +0100, Christian König wrote:
Hi Ryan,
we should try to avoid that and if it isn't possible at least use some
constant like ACPI_AC_CLASS.
Could be that the information isn't available otherwise. Alex should know
mo
[AMD Official Use Only]
if (adev->asic_type > CHIP_VEGA20) {
+ if (gc_ver != IP_VERSION(9, 4, 0) && mp1_ver > IP_VERSION(9, 0, 0)) {
/* VCN clocks */
[kevin]:
please put some comments here (why mp1_ver and gc_ver is needed both), it can
help developer to understand
This is being added to SMU Metrics, so add the required tie-ins in the
kernel. Also create the corresponding unique_id sysfs file.
v2: Add FW version check, remove SMU mutex
Signed-off-by: Kent Russell
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c| 3 +-
.../pmfw_if/smu11_driver_if_sienna
On Fri, Mar 25, 2022 at 2:27 AM Ryan Lin wrote:
>
> Disable ABM feature when the system is running on AC mode to get
> the more perfect contrast of the display.
>
> Signed-off-by: Ryan Lin
>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 4 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_device
[AMD Official Use Only]
> -Original Message-
> From: Alex Deucher
> Sent: Friday, March 25, 2022 9:26 AM
> To: Russell, Kent
> Cc: amd-gfx list
> Subject: Re: [PATCH] drm/amdgpu: Add unique_id support for sienna cichlid
>
> On Fri, Mar 25, 2022 at 9:05 AM Kent Russell wrote:
> >
> > Th
On Fri, Mar 25, 2022 at 9:05 AM Kent Russell wrote:
>
> This is being added to SMU Metrics, so add the required tie-ins in the
> kernel. Also create the corresponding unique_id sysfs file.
>
> v2: Add FW version check, remove SMU mutex
>
> Signed-off-by: Kent Russell
> ---
> drivers/gpu/drm/amd/
On 3/25/2022 4:55 PM, Wang, Yang(Kevin) wrote:
[AMD Official Use Only]
if (adev->asic_type > CHIP_VEGA20) {
+ if (gc_ver != IP_VERSION(9, 4, 0) && mp1_ver > IP_VERSION(9, 0,
0)) {
/* VCN clocks */
[kevin]:
please put some comments here (why mp1_ver and gc_v
On Fri, Mar 25, 2022 at 5:41 AM Christian König
wrote:
>
> Fix two incorrect kerneldocs for the recent VM code changes.
>
> Signed-off-by: Christian König
> Reported-by: kernel test robot
> Reported-by: Stephen Rothwell
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 2 +-
> drivers/gpu/dr
SMI clock measure API is failing, because sysfs node
for pp_dpm_vclk is not existing
Bug:
https://ontrack-internal.amd.com/browse/SWDEV-327254
Signed-off-by: Marko Zekovic
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/a
On 2022-03-25 00:05, Ryan Lin wrote:
> Disable ABM feature when the system is running on AC mode to get
> the more perfect contrast of the display.
It says patch 3 out of 25. Are there other patches? If so, I can't
find them in my mailbox and neither can patchwork
https://patchwork.freedesktop.
On 2022-03-24 20:06, Sean Paul wrote:
> From: Sean Paul
>
> ATOMIC and DRIVER log categories do not typically contain per-frame log
> messages. This patch re-classifies some messages in amd to chattier
> categories to keep ATOMIC/DRIVER quiet.
>
> Signed-off-by: Sean Paul
With the subject line
On Fri, Mar 25, 2022 at 10:29 AM Marko Zekovic wrote:
>
> SMI clock measure API is failing, because sysfs node
> for pp_dpm_vclk is not existing
> Bug:
> https://ontrack-internal.amd.com/browse/SWDEV-327254
Please drop internal bug tickets. With that fixed, assuming vclk dpm
node is actually sup
Thanks. Fixed up the title when I applied it.
Alex
On Fri, Mar 25, 2022 at 10:55 AM Harry Wentland wrote:
>
> On 2022-03-24 20:06, Sean Paul wrote:
> > From: Sean Paul
> >
> > ATOMIC and DRIVER log categories do not typically contain per-frame log
> > messages. This patch re-classifies some me
Dear Christian, dear Daniel, dear Alex,
Am 23.03.22 um 16:32 schrieb Christian König:
Am 23.03.22 um 16:24 schrieb Daniel Stone:
On Wed, 23 Mar 2022 at 15:14, Alex Deucher wrote:
On Wed, Mar 23, 2022 at 11:04 AM Daniel Stone
wrote:
That's not what anyone's saying here ...
No-one's demandi
@Wheeler, Daniel
@Siqueira, Rodrigo were you able to repro this? Any ideas? Any
downsides to picking this up for now?
Alex
On Wed, Mar 23, 2022 at 5:18 PM Benjamin Marty wrote:
>
> Fixes crash on MST Hub disconnect.
>
> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1849
> Fixes: ee2698
Hi Dave, Daniel,
Fixes for 5.18.
The following changes since commit c6e90a1c660874736bd09c1fec6312b4b4c2ff7b:
Merge tag 'amd-drm-next-5.18-2022-03-18' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2022-03-21 13:48:20
+1000)
are available in the Git repository at:
https://g
[Public]
I never saw the hang with my testing, not sure if anyone else happened to see
it. I'm not opposed to including the line.
Thank you,
Dan Wheeler
Technologist | AMD
SW Display
--
Applied both patches. Thanks!
Alex
On Thu, Mar 24, 2022 at 9:46 AM Haowen Bai wrote:
>
> The value actual_pix_clk_100Hz is dereferencing pointer pix_clk_params
> before pix_clk_params is being null checked. Fix this by assigning
> pix_clk_params->requested_pix_clk_100hz to actual_pix_clk_100Hz
[AMD Official Use Only]
Hi Paul,
Thanks for your feedbacks. I fixed many errors and typos you highlighted in
this series. In cases where modification requires re-testing we or anyone can
have follow-up patches in the future.
From: Paul Menzel
Sent: 19 March 202
Hi all,
I'm examining the IGT kms_plane_alpha_blend test, specifically the
alpha-7efc. It fails on AMD and Intel gen8 hw, but passes on Intel
gen11. At first, I thought it was a rounding issue. In fact, it may be
the problem for different results between intel hw generations.
However, I changed t
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Fix allocate_mst_payload assert on resume
* [FW Promotion] Release 0.0.110.0
* Revert FEC check in validation
* Update LTTPR UHBR link rate support struct
* Add support for USBC connector
* Add work around for AUX
From: Angus Wang
[WHY]
We want another entry in IRQ type that can be used to
help find the underflow interrupt source.
[HOW]
Added another mapping in IRQ type enum.
Reviewed-by: Jun Lei
Acked-by: Alex Hung
Signed-off-by: Angus Wang
---
drivers/gpu/drm/amd/display/dc/irq_types.h | 1 +
1 fil
From: Oliver Logush
[why]
W/a no longer needed
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Oliver Logush
---
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c | 3 +--
drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c | 3 +--
2 files changed, 2 insertions(+), 4
From: Jingwen Zhu
[Why]
We don't include this eDP FEC init on fastboot.
[How]
Set the fec to init value when stopping driver &get the fec register value to
check should enable FEC.
Co-authored-by: Jingwen Zhu
Reviewed-by: Wenjing Liu
Acked-by: Alex Hung
Signed-off-by: Jingwen Zhu
---
driv
From: Krunoslav Kovac
[WHY&HOW]
It can be enabled by users, but proper way is to report max_slave_planes
in DC caps for each ASIC.
Some structures use hardcoded max_plane=2, this is also addressed here.
Reviewed-by: Nevenko Stupar
Reviewed-by: Aric Cyr
Acked-by: Alex Hung
Signed-off-by: Kruno
From: Chris Park
[Why]
Once DSC slice cannot fit pixel clock, we incorrectly
reset min slices to 0 and allow max slice to operate,
even when max slice itself cannot fit the pixel clock
properly.
[How]
Change the sequence such that we correctly determine
DSC is not possible when both min slices a
From: Paul Hsieh
[WHY]
In headless systems, if SetMode/Power down timer
is not called, hardware will not be powered down
causing HW/SW discrepancies. Powering down hardware
on SetPowerState to D3 will ensure SW/HW state is accurate.
[HOW]
If PowerDownThread timer is not trigger but OS call
SetPo
From: Roman Li
[Why]
DSC Power down code has been moved from dcn31_init_hw into init_pipes()
Need to remove it from dcn10_init_hw() as well to avoid duplicated action
on dcn1.x/2.x
[How]
Remove DSC power down code from dcn10_init_hw()
Fixes: 8fa6f4c5715c ("drm/amd/display: fixed the DSC power o
From: Roman Li
[Why]
In init_hw() we call init_pipes() before enabling power gating.
init_pipes() tries to power gate dsc but it may fail because
required force-ons are not released yet.
As a result with dsc config the following errors observed on resume:
"REG_WAIT timeout 1us * 1000 tries - dcn2
From: Charlene Liu
[why]
when disable optc, need to clear the underflow status as well.
Reviewed-by: Chris Park
Acked-by: Alex Hung
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c | 14 +++---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c | 5
From: Jimmy Kizito
[Why]
When waking from low-power states, a DP sink may remain unresponsive to
AUX transactions.
[How]
Try to toggle DPCD SET_POWER register repeatedly (up to a maximum
timeout value) until DP sink becomes responsive.
Reviewed-by: Mustapha Ghaddar
Acked-by: Alex Hung
Signed-
From: Samson Tam
[Why]
Add support for CONNECTOR_ID_USBC
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: Samson Tam
---
drivers/gpu/drm/amd/display/dc/bios/bios_parser_common.c | 3 +++
drivers/gpu/drm/amd/display/dc/bios/command_table.c | 3 ++-
drivers/gpu/drm/amd/display/dc
From: Michael Strauss
[WHY]
Update field order to match DP2.0 spec SCR
Reviewed-by: George Shen
Acked-by: Alex Hung
Signed-off-by: Michael Strauss
---
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/
From: Martin Leung
why and how:
causes failure on install on certain machines
Reviewed-by: George Shen
Acked-by: Alex Hung
Signed-off-by: Martin Leung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
From: Anthony Koo
- Revert save/restore PANEL_PWRSEQ_REF_DIV2 and
other psr phy optimizations
Reviewed-by: Aric Cyr
Acked-by: Alex Hung
Signed-off-by: Anthony Koo
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 90 +--
1 file changed, 4 insertions(+), 86 deletions(-)
d
From: Aric Cyr
- [FW Promotion] Release 0.0.110.0
- Revert FEC check in validation
- Update LTTPR UHBR link rate support struct
- Add support for USBC connector
- Add work around for AUX failure on wake
- Clear optc false state when disable otg
- Enable power gating before init_pipes
- Remove red
From: Roman Li
[Why]
On resume we do link detection for all non-MST connectors.
MST is handled separately. However the condition for telling
if connector is on mst branch is not enough for mst hub case.
Link detection for mst branch link leads to mst topology reset.
That causes assert in dc_link_
[AMD Official Use Only]
amdgpu has 2 resets: soft reset and hard reset.
The soft reset is able to recover from an infinite loop and even some GPU hangs
due to bad shaders or bad states. The soft reset uses a signal that kills all
currently-running shaders of a certain process (VM context), whic
To support multi-thread update page table.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdkfd/kfd_priv.h| 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
b/drivers/gpu/drm/
MMU callback update page table set unlocked flag, add callback tlb_cb to
vm->last_unlocked fence, and pass it back to upper layer to wait for
page table update done.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
d
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