Am 11.01.22 um 23:45 schrieb Alex Deucher:
Rather than opting into GPU recovery support, default to on, and
opt out if it's not working on a particular GPU. This avoids the
need to add new asics to this list since this is a core feature.
Signed-off-by: Alex Deucher
Reviewed-by: Christian Kön
[AMD Official Use Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, January 12, 2022 3:48 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH 1/2] drm/amdgpu: Add a filter conditi
[AMD Official Use Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, January 12, 2022 3:48 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH 2/2] drm/amdgpu: No longer insert ras
[AMD Official Use Only]
> -Original Message-
> From: Stanley.Yang
> Sent: Wednesday, January 12, 2022 9:43 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Clements, John
> ; Zhou1, Tao ; Yang,
> Stanley
> Subject: [PATCH Review 1/1] drm/amdgpu: handle denied inject error
-Original Message-
From: Zhou1, Tao
Sent: Wednesday, January 12, 2022 4:28 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Clements, John
Subject: RE: [PATCH 1/2] drm/amdgpu: Add a filter condition to restrict the SW
ras function to be registered only by asi
-Original Message-
From: Zhou1, Tao
Sent: Wednesday, January 12, 2022 4:37 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Clements, John
Subject: RE: [PATCH 2/2] drm/amdgpu: No longer insert ras blocks into ras_list
if it already exists in ras_list
[AMD Of
Hi everyone,
On Thu, Jan 06, 2022 at 01:24:52PM +0100, Wolfram Sang wrote:
> This largely reverts commit 5a7b95fb993ec399c8a685552aa6a8fc995c40bd. It
> breaks suspend with AMD GPUs, and we couldn't incrementally fix it. So,
> let's remove the code and go back to the drawing board. We keep the
> he
Add ras supported check for register_ras_block.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index b1bedfd4febc..614ae8455c9f 100644
--
No longer insert ras blocks into ras_list if it already exists in ras_list.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 614
On 1/11/2022 12:26 PM, Christian König wrote:
Am 11.01.22 um 08:12 schrieb Somalapuram Amaranath:
AMDGPURESET uevent added to notify userspace,
collect dump_stack and amdgpu_reset_reg_dumps
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/nv.c | 31 +
On 10.01.22 23:31, Alex Sierra wrote:
> This patch series introduces MEMORY_DEVICE_COHERENT, a type of memory
> owned by a device that can be mapped into CPU page tables like
> MEMORY_DEVICE_GENERIC and can also be migrated like
> MEMORY_DEVICE_PRIVATE.
>
> Christoph, the suggestion to incorporate
I have been looking at this in relation to the migration code and noticed we
have the following in try_to_migrate():
if (is_zone_device_page(page) && !is_device_private_page(page))
return;
Which if I'm understanding correctly means that migration of device coherent
pages w
On Wed, Jan 12, 2022 at 6:58 PM Hsin-Yi Wang wrote:
>
> hi Konstantin and Tareque,
>
> Can you help provide logs if we apply
> 5a7b95fb993ec399c8a685552aa6a8fc995c40bd but revert
> 8d35a2596164c1c9d34d4656fd42b445cd1e247f?
>
Another thing might be helpful to test with:
after apply 5a7b95fb993ec39
From: Aun-Ali Zaidi
The eDP link rate reported by the DP_MAX_LINK_RATE dpcd register (0xa) is
contradictory to the highest rate supported reported by
EDID (0xc = LINK_RATE_RBR2). The effects of this compounded with commit
'4a8ca46bae8a ("drm/amd/display: Default max bpc to 16 for eDP")' results
On Wed, 2022-01-12 at 10:32 +0100, Wolfram Sang wrote:
> Hi everyone,
>
> On Thu, Jan 06, 2022 at 01:24:52PM +0100, Wolfram Sang wrote:
> > This largely reverts commit 5a7b95fb993ec399c8a685552aa6a8fc995c40bd. It
> > breaks suspend with AMD GPUs, and we couldn't incrementally fix it. So,
> > let's
hi Konstantin and Tareque,
Can you help provide logs if we apply
5a7b95fb993ec399c8a685552aa6a8fc995c40bd but revert
8d35a2596164c1c9d34d4656fd42b445cd1e247f?
Thanks
On Wed, Jan 12, 2022 at 6:02 PM Tareque Md Hanif
wrote:
>
>
> On 1/12/22 15:51, Wolfram Sang wrote:
> > would the reporters of th
On 1/12/2022 4:08 PM, yipechai wrote:
Add ras supported check for register_ras_block.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras
[Public]
Thanks Christian. I've already merged based on Felix's review.
I'll send your suggested cleanup for review out soon.
Jon
> -Original Message-
> From: Koenig, Christian
> Sent: January 12, 2022 2:33 AM
> To: Kim, Jonathan ; amd-
> g...@lists.freedesktop.org
> Cc: Kuehling, Feli
A bad merge of
1abaa75bae9e ("drm/amd/display: Fix for otg synchronization logic")
caused Linus to see a lot of underflow on his two 4k displays.
This set pulls his revert and fixes up the original patch.
Linus Torvalds (1):
Revert "drm/amd/display: Fix for otg synchronization logic"
Meenakshi
From: Linus Torvalds
This reverts commit a896f870f8a5f23ec961d16baffd3fda1f8be57c.
It causes odd flickering on my Radeon RX580 (PCI ID 1002:67df rev e7,
subsystem ID 1da2:e353).
Bisected right to this commit, and reverting it fixes things.
Link:
https://lore.kernel.org/all/CAHk-=wg9hDde_L3bK9
From: Meenakshikumar Somasundaram
[Why]
During otg sync trigger, plane states are used to decide whether the otg
is already synchronized or not. There are scenarions when otgs are
disabled without plane state getting disabled and in such case the otg is
excluded from synchronization.
[How]
Intro
Yeah, that's basically my fault.
I haven't even worked myself through all the mails which piled up during
the xmas break :(
Christian.
Am 12.01.22 um 15:21 schrieb Kim, Jonathan:
[Public]
Thanks Christian. I've already merged based on Felix's review.
I'll send your suggested cleanup for re
+ int err = 0;
+ const struct psp_firmware_header_v1_0 *cap_hdr_v1_0;
+ struct amdgpu_firmware_info *info = NULL;
Please put short variable declaration last. With this fixed, the patch is:
Acked-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: amd-gfx On Behal
On 1/12/2022 7:12 AM, Stanley.Yang wrote:
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 10 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
drivers/gpu/drm/amd/amdgpu/ta_ras_if.h | 3 ++-
3 files changed, 12 insertions(+), 3 deletions(-)
diff --
On 2022-01-11 15:51, Linus Torvalds wrote:
> On Tue, Jan 11, 2022 at 7:38 AM Harry Wentland wrote:
>>
>> Attached is a v2 of the buggy patch that should get this right.
>> If you have a chance to try it out let us know
>
> I can confirm that I do not see the horribly flickering behavior with
>
On Wed, Jan 12, 2022 at 9:28 AM Harry Wentland wrote:
>
> From: Meenakshikumar Somasundaram
>
> [Why]
> During otg sync trigger, plane states are used to decide whether the otg
> is already synchronized or not. There are scenarions when otgs are
> disabled without plane state getting disabled and
Some suggested cleanups to declutter ttm when doing debug VRAM access over
SDMA.
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 23 +++
2 files changed, 16 insertions(+), 16 deletions(-)
diff
Am 12.01.22 um 16:59 schrieb Jonathan Kim:
Some suggested cleanups to declutter ttm when doing debug VRAM access over
SDMA.
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 23 +++
2 file
Am 2022-01-12 um 6:16 a.m. schrieb David Hildenbrand:
> On 10.01.22 23:31, Alex Sierra wrote:
>> This patch series introduces MEMORY_DEVICE_COHERENT, a type of memory
>> owned by a device that can be mapped into CPU page tables like
>> MEMORY_DEVICE_GENERIC and can also be migrated like
>> MEMORY_D
On 2022-01-12 10:53, Alex Deucher wrote:
> On Wed, Jan 12, 2022 at 9:28 AM Harry Wentland wrote:
>>
>> From: Meenakshikumar Somasundaram
>>
>> [Why]
>> During otg sync trigger, plane states are used to decide whether the otg
>> is already synchronized or not. There are scenarions when otgs are
Am 2022-01-12 um 2:48 a.m. schrieb yipechai:
> No longer insert ras blocks into ras_list if it already exists in ras_list.
>
> Signed-off-by: yipechai
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdg
Some suggested cleanups to declutter ttm when doing debug VRAM access over
SDMA.
v2: rename post_mortem_allowed func to has_timeouts_enable.
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 23 +++--
LGTM acked-by: Nirmoy Das
On 1/12/2022 7:52 PM, Jonathan Kim wrote:
Some suggested cleanups to declutter ttm when doing debug VRAM access over
SDMA.
v2: rename post_mortem_allowed func to has_timeouts_enable.
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 9 +++
Unused outside of the file.
Reported-by: kernel test robot
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
b/drivers/gpu/drm
GFX has the following changes when handling interrupts in the KFD:
- no pasid workaround required
- SQ interrupt auto has different events
- SQ interrupt word is continguous and only has 23-bit data.
Also SH is labelled as SA and workgroup id replaces CU id.
- SQ interrupt word is continguos and on
Changed from v1:
remove unused brace
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
drivers/gpu/drm/amd/amdgpu/ta_ras_if.h | 3 ++-
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers
[AMD Official Use Only]
Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: Thursday, January 13, 2022 5:26 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; kernel test robot
>
> Subject: [PATCH] drm/amdgpu/swsmu: make sienna
Eliminate the following coccicheck warning:
./drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2725:16-17: Unneeded semicolon
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/am
Eliminate the follow smatch warnings:
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:3504 amdgpu_device_init()
warn: inconsistent indenting
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1716
amdgpu_ras_error_status_query() warn: if statement not indented
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2724 amdgpu_ra
Hi Felix:
amdgpu_ras_register_ras_block was called by all IP ras blocks, and every
ip also has different ras versions. We do common work together, which can
reduce the chance of the ras function going wrong.
-Original Message-
From: Kuehling, Felix
Sent: Thursday, January 13, 20
Hi Dave, Daniel,
Fixes for 5.17.
The following changes since commit cb6846fbb83b574c85c2a80211b402a6347b60b1:
Merge tag 'amd-drm-next-5.17-2021-12-30' of
ssh://gitlab.freedesktop.org/agd5f/linux into drm-next (2021-12-31 10:59:17
+1000)
are available in the Git repository at:
https://git
[AMD Official Use Only]
The series is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, January 12, 2022 6:39 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH
[AMD Official Use Only]
Since you use dev_warn, "RAS WARNING" is better than "RAS INFO" in the print
message, with this fixed the patch is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Stanley.Yang
> Sent: Thursday, January 13, 2022 9:28 AM
> To: amd-gfx@lists.freedesktop.org
>
Thanks for your patch, Yang. Can you pls also fix the original indentation
problem as well?
if (!adev)
- return -EINVAL;;
+ return -EINVAL;
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Yang Li
Sent: Thursday, January 13, 2022 9:22 AM
To: airl...@linux.ie
Cc
It can cause a hang. This is normally not enabled for GPU
hangs on these asics, but was recently enabled for handling
aborted suspends. This causes hangs on some platforms
on suspend.
Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend (v2)")
Cc: sta...@vger.kernel.org
Bug: http
Acked-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Thursday, January 13, 2022 12:01 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; sta...@vger.kernel.org
Subject: [PATCH] drm/amdgpu: don't do resets on APUs which don't s
Hello yipechai,
The patch d51ce4db0747: "drm/amdgpu: Modify gfx block to fit for the
unified ras block data and ops" from Jan 4, 2022, leads to the
following Smatch static checker warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1058 amdgpu_ras_error_inject()
warn: inconsistent in
These if statements need to be indented.
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index d4d9b9ea8bbd..777def
[AMD Official Use Only]
Thanks, will update before submit.
Regards,
Stanley
> -邮件原件-
> 发件人: Zhou1, Tao
> 发送时间: Thursday, January 13, 2022 11:29 AM
> 收件人: Yang, Stanley ; amd-
> g...@lists.freedesktop.org
> 抄送: Zhang, Hawking ; Clements, John
> ; Yang, Stanley
> 主题: RE: [PATCH Review 1/1
Hi Alex,
What about something like this?
bool amdgpu_device_reset_on_suspend(struct amdgpu_device *adev)
{
if (adev->in_s0ix || adev->gmc.xgmi.num_physical_nodes > 1)
return false;
switch (amdgpu_asic_reset_method(adev)) {
case AMD_RESET_METHOD_BACO:
check null ptr first before access its element
Signed-off-by: Flora Cui
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 2 +-
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
b/drivers/gpu/drm/am
Am 12.01.22 um 19:52 schrieb Jonathan Kim:
Some suggested cleanups to declutter ttm when doing debug VRAM access over
SDMA.
v2: rename post_mortem_allowed func to has_timeouts_enable.
Signed-off-by: Jonathan Kim
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h |
Fix compile warnings.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 394a18e3c6af..7afeec4255bd 100644
--- a/drivers
Use ARRAY_SIZE to get array length.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 23f4290b2fde..394a18e3c6af 100644
Adjust the code format.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 7afeec4255bd..54d807b021fe 100644
--- a/drive
This patch is to add data struct for vram check.
Signed-off-by: Xiaojian Du
Reviewed-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 64cd80d050eb..1319
This will add vram check function for GMC, it will cover gmc v8/9/10
Signed-off-by: Xiaojian Du
Reviewed-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 42 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 1 +
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 4 +++
dr
On Thu, Jan 13, 2022 at 03:45:25PM +0800, Du, Xiaojian wrote:
> This patch is to add data struct for vram check.
>
The subject has a typo: admgpu -> amdgpu
> Signed-off-by: Xiaojian Du
> Reviewed-by: Huang Rui
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 5 +
> 1 file changed, 5 insertio
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