RE: [PATCH v2] Revert "drm/scheduler: Avoid accessing freed bad job."

[AMD Official Use Only] @Daniel Vetter @Grodzovsky, Andrey @Koenig, Christian Do you have any concern on the kthread_park() approach ? Theoretically speaking sched_main shall run there exclusively with job_timeout since they both touches jobs, and stop scheduler during job_timeout won't impac

Re: [PATCH v6 02/13] mm: remove extra ZONE_DEVICE struct page refcount

On Thu, Aug 19, 2021 at 11:00 AM Sierra Guiza, Alejandro (Alex) wrote: > > > On 8/18/2021 2:28 PM, Ralph Campbell wrote: > > On 8/17/21 5:35 PM, Felix Kuehling wrote: > >> Am 2021-08-17 um 8:01 p.m. schrieb Ralph Campbell: > >>> On 8/12/21 11:31 PM, Alex Sierra wrote: > From: Ralph Campbell

Re: [PATCH v2] Revert "drm/scheduler: Avoid accessing freed bad job."

No, that perfectly works for me. The problem we used to have with this approach was that we potentially have multiple timeouts at the same time. But when we serialize the timeout handling by using a single workqueue as suggested by Daniel now as well then that isn't an issue any more. Regar

Re: [PATCH v6 08/13] mm: call pgmap->ops->page_free for DEVICE_GENERIC pages

On Thu, Aug 19, 2021 at 10:05 PM Christoph Hellwig wrote: > > On Tue, Aug 17, 2021 at 11:44:54AM -0400, Felix Kuehling wrote: > > >> That's a good catch. Existing drivers shouldn't need a page_free > > >> callback if they didn't have one before. That means we need to add a > > >> NULL-pointer chec

RE: [PATCH v2] drm/amdgpu/OLAND: clip the ref divider max value

[AMD Official Use Only] Agree, on the similar note, which Gen is OLAND BTW 😊 ? Regards Shashank -Original Message- From: Koenig, Christian Sent: Friday, August 20, 2021 12:08 PM To: Sharma, Shashank ; amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: Re: [PATCH v2] drm/amdg

Re: [PATCH v2] drm/amdgpu/OLAND: clip the ref divider max value

Uff, I think that was SI but could be CIK as well. We have a table for this somewhere, but I don't have it at hand. Regards, Christian. Am 20.08.21 um 09:43 schrieb Sharma, Shashank: [AMD Official Use Only] Agree, on the similar note, which Gen is OLAND BTW 😊 ? Regards Shashank -Original

[PATCH v3] Revert "drm/scheduler: Avoid accessing freed bad job."

[Why] for bailing job, this commit will delete it from pending list thus the bailing job will never have a chance to be resubmitted even in advance tdr mode. [How] after embeded hw_fence into amdgpu_job is done, the race condition that this commit tries to work around is completely solved.So rever

RE: [PATCH v2] drm/amdgpu/OLAND: clip the ref divider max value

[AMD Official Use Only] No problem, let me dig for this information. Regards Shashank -Original Message- From: Koenig, Christian Sent: Friday, August 20, 2021 1:36 PM To: Sharma, Shashank ; amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: Re: [PATCH v2] drm/amdgpu/OLAND:

[PATCH] drm/amdgpu: use the preferred pin domain after the check

For some reason we run into an use case where a BO is already pinned into GTT, but should be pinned into VRAM|GTT again. Handle that case gracefully as well. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 10 +- 1 file changed, 5 insertions(+), 5 deletio

RE: [PATCH] drm/amdgpu: use the preferred pin domain after the check

[AMD Official Use Only] Please feel free to use: Reviewed-by: Shashank Sharma Regards Shashank -Original Message- From: amd-gfx On Behalf Of Christian König Sent: Friday, August 20, 2021 2:01 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH] drm/amdgpu: use

[PATCH] drm/amd/pm: a quick fix for "divided by zero" error

Considering Arcturus is a dedicated ASIC for computing, it will be more proper to drop the support for fan speed reading and setting. That's on the TODO list. Change-Id: Id83a7a88f26644ba66c4fd15034b4fc861cc6901 Signed-off-by: Evan Quan Reported-by: Rui Teng --- .../gpu/drm/amd/pm/swsmu/smu11/a

RE: [PATCH] drm/amd/pm: a quick fix for "divided by zero" error

[Public] Reviewed-by: Guchun Chen Regards, Guchun -Original Message- From: Quan, Evan Sent: Friday, August 20, 2021 5:01 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Chen, Guchun ; Teng, Rui ; Quan, Evan Subject: [PATCH] drm/amd/pm: a quick fix for "divided by zero

Re: [PATCH v2] Revert "drm/scheduler: Avoid accessing freed bad job."

Hi all, I just submit a v3 patch according your opinion on using kthread_park instead. Thanks, Jingwen On Fri Aug 20, 2021 at 09:20:42AM +0200, Christian König wrote: > No, that perfectly works for me. > > The problem we used to have with this approach was that we potentially have > multiple tim

Re: [PATCH v6 02/13] mm: remove extra ZONE_DEVICE struct page refcount

On Wed, Aug 18, 2021 at 12:28:30PM -0700, Ralph Campbell wrote: > Did you test on a system without CONFIG_ARCH_HAS_PTE_SPECIAL defined? > In that case, mmap() of a DAX device will call insert_page() which calls > get_page() which would trigger VM_BUG_ON_PAGE(). __vm_insert_mixed still ends up call

Re: [PATCH v6 08/13] mm: call pgmap->ops->page_free for DEVICE_GENERIC pages

On Tue, Aug 17, 2021 at 11:44:54AM -0400, Felix Kuehling wrote: > >> That's a good catch. Existing drivers shouldn't need a page_free > >> callback if they didn't have one before. That means we need to add a > >> NULL-pointer check in free_device_page. > > Also the other state clearing (__ClearPage

Re: [PATCH v6 02/13] mm: remove extra ZONE_DEVICE struct page refcount

On Thu, Aug 19, 2021 at 03:59:56PM -0400, Felix Kuehling wrote: > I got lost trying to understand how DAX counts page references and how > the PTE_SPECIAL option affects that. Theodore, can you help with this? > Is there an easy way to test without CONFIG_ARCH_HAS_PTE_SPECIAL on x86, > or do we nee

Re: [PATCH v2] drm/amdgpu/OLAND: clip the ref divider max value

It's SI. Alex On Fri, Aug 20, 2021 at 4:08 AM Sharma, Shashank wrote: > > [AMD Official Use Only] > > No problem, let me dig for this information. > > Regards > Shashank > -Original Message- > From: Koenig, Christian > Sent: Friday, August 20, 2021 1:36 PM > To: Sharma, Shashank ; amd-g

Re: [PATCH] drm/amdgpu: use the preferred pin domain after the check

On Fri, Aug 20, 2021 at 4:30 AM Christian König wrote: > > For some reason we run into an use case where a BO is already pinned > into GTT, but should be pinned into VRAM|GTT again. > > Handle that case gracefully as well. > > Signed-off-by: Christian König Reviewed-by: Alex Deucher > --- > d

RE: [PATCH v2] drm/amdgpu/OLAND: clip the ref divider max value

[Public] Thanks Alex, Regards Shashank -Original Message- From: Alex Deucher Sent: Friday, August 20, 2021 6:42 PM To: Sharma, Shashank Cc: Koenig, Christian ; amd-gfx@lists.freedesktop.org; Deucher, Alexander Subject: Re: [PATCH v2] drm/amdgpu/OLAND: clip the ref divider max value

Re: [PATCH v2] Revert "drm/scheduler: Avoid accessing freed bad job."

I believe we have some minor confusion here On 2021-08-20 4:09 a.m., Jingwen Chen wrote: Hi all, I just submit a v3 patch according your opinion on using kthread_park instead. Thanks, Jingwen On Fri Aug 20, 2021 at 09:20:42AM +0200, Christian König wrote: No, that perfectly works for me. The

[PATCH v3] drm/amdgpu/OLAND: clip the ref divider max value

This patch limits the ref_div_max value to 100, during the calculation of PLL feedback reference divider. With current value (128), the produced fb_ref_div value generates unstable output at particular frequencies. Radeon driver limits this value at 100. On Oland, when we try to setup mode 2048x12

Re: [PATCH v2] Revert "drm/scheduler: Avoid accessing freed bad job."

On 2021-08-20 3:12 a.m., Liu, Monk wrote: [AMD Official Use Only] @Daniel Vetter @Grodzovsky, Andrey @Koenig, Christian Do you have any concern on the kthread_park() approach ? Theoretically speaking sched_main shall run there exclusively with job_timeout since they both touches jobs, an

Re: [PATCH v3 5/6] drm/amd/display: Add DP 2.0 BIOS and DMUB Support

On 2021-08-19 2:58 p.m., Fangzhi Zuo wrote: Parse DP2 encoder caps and hpo instance from bios Signed-off-by: Fangzhi Zuo --- drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 10 ++ drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 10 ++ .../drm/amd/display/dc

Re: [PATCH] drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend

On Thu, Aug 19, 2021 at 10:15 PM Quan, Evan wrote: > > [AMD Official Use Only] > > > > > > > > From: Lazar, Lijo > Sent: Thursday, August 19, 2021 10:36 PM > To: Zhu, James ; Quan, Evan ; > amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander ; Chen, Guchun > ; Pan, Xinhui > Subject: RE: [PA

Re: [PATCH v3] drm/amdgpu/OLAND: clip the ref divider max value

Am 20.08.21 um 15:54 schrieb Shashank Sharma: This patch limits the ref_div_max value to 100, during the calculation of PLL feedback reference divider. With current value (128), the produced fb_ref_div value generates unstable output at particular frequencies. Radeon driver limits this value at 1

Re: [PATCH] drm/amd/pm: And destination bounds checking to struct copy

On Thu, Aug 19, 2021 at 4:14 PM Kees Cook wrote: > > In preparation for FORTIFY_SOURCE performing compile-time and run-time > field bounds checking for memcpy(), memmove(), and memset(), avoid > intentionally writing across neighboring fields. > > The "Board Parameters" members of the structs: >

Re: [PATCH 2/2] drm/amdkfd: map SVM range with correct access permission

On 2021-08-19 5:32 p.m., Felix Kuehling wrote: Am 2021-08-19 um 10:56 a.m. schrieb Philip Yang: Restore retry fault or prefetch range, or restore svm range after eviction to map range to GPU with correct read or write access permission. Range

Re: [PATCH v2 02/14] drm/arm/hdlcd: Convert to Linux IRQ interfaces

On Tue, Aug 03, 2021 at 11:06:52AM +0200, Thomas Zimmermann wrote: > Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's > IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers > don't benefit from using it. > > DRM IRQ callbacks are now being called directly or inlined.

[pull] amdgpu, amdkfd, radeon drm-next-5.15

Hi Dave, Daniel, Updates for 5.15. Mainly bug fixes and cleanups. The following changes since commit 554594567b1fa3da74f88ec7b2dc83d000c58e98: drm/display: fix possible null-pointer dereference in dcn10_set_clock() (2021-08-11 17:19:54 -0400) are available in the Git repository at: https

[PATCH v2 1/2] drm/amdkfd: check access permisson to restore retry fault

Check range access permission to restore GPU retry fault, if GPU retry fault on address which belongs to VMA, and VMA has no read or write permission requested by GPU, failed to restore the address. The vm fault event will pass back to user space. Signed-off-by: Philip Yang --- drivers/gpu/drm/a

[PATCH v2 2/2] drm/amdkfd: map SVM range with correct access permission

Restore retry fault or prefetch range, or restore svm range after eviction to map range to GPU with correct read or write access permission. Range may includes multiple VMAs, update GPU page table with offset of prange, number of pages for each VMA according VMA access permission. Signed-off-by:

[PATCH] drm/amdkfd: CWSR with sw scheduler on Aldebaran and Arcturus

Program trap handler settings to enable CWSR with software scheduler on Aldebaran and Arcturus. Signed-off-by: Mukul Joshi --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9

Re: [PATCH 1/3] drm/amdkfd: Allocate SDMA engines more fairly

Am 2021-08-20 um 1:32 a.m. schrieb Joseph Greathouse: > Give every process at most one queue from each SDMA engine. > Previously, we allocated all SDMA engines and queues on a first- > come-first-serve basis. This meant that it was possible for two > processes racing on their allocation requests to

Re: [PATCH v2 1/2] drm/amdkfd: check access permisson to restore retry fault

Am 2021-08-20 um 2:31 p.m. schrieb Philip Yang: > Check range access permission to restore GPU retry fault, if GPU retry > fault on address which belongs to VMA, and VMA has no read or write > permission requested by GPU, failed to restore the address. The vm fault > event will pass back to user sp

[PATCH 00/10] DC Patches Aug 23, 2021

This DC patchset brings improvements in multiple areas. In summary, we highlight: - DC version 3.2.150 - FW promotion 0.0.80 - Add missing ABM register offsets - Fix in swizzle mode mapping - Emulated sink support for freesync - Improvoments in max target bpp --- Alvin Lee (1): dr

[PATCH 08/10] drm/amd/display: Update swizzle mode enums

From: Alvin Lee [Why] Swizzle mode enum for DC_SW_VAR_R_X was existing, but not mapped correctly. [How] Update mapping and conversion for DC_SW_VAR_R_X. Reviewed-by: XiangBing Foo Reviewed-by: Martin Leung Acked-by: Qingqing Zhuo Signed-off-by: Alvin Lee Cc: sta...@vger.kernel.org --- driv

[PATCH 01/10] drm/amd/display: add missing ABM register offsets

From: Josip Pavic [Why] Some ABM registers don't exist on DCN 3.01, so are missing from its register offset list. However, this list was copied to later versions of DCN that do have these registers. As a result, they're inaccessible from the driver on those DCN versions even though they exist. [

[PATCH 06/10] drm/amd/display: Add emulated sink support for updating FS

From: Aurabindo Pillai [Why] When forced modes are used during certain IGT tests, without a real connector, dc_sink would be null when standard modes are added by the driver. Calling the function to update freesync capabilities at this point will result in an error being printed [How] Use emulat

[PATCH 03/10] drm/amd/display: Set min dcfclk if pipe count is 0

From: Michael Strauss [WHY] Clocks don't get recalculated in 0 stream/0 pipe configs, blocking S0i3 if dcfclk gets high enough [HOW] Create DCN31 copy of DCN30 bandwidth validation func which doesn't entirely skip validation in 0 pipe scenarios Override dcfclk to vlevel 0/min value during valid

[PATCH 07/10] drm/amd/display: Initialize GSP1 SDP header

From: Wyatt Wood [Why + How] Initialize GSP1 SDP header for use in DMCUB FW. Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo Signed-off-by: Wyatt Wood --- .../drm/amd/display/dc/dcn10/dcn10_stream_encoder.c| 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/a

[PATCH 04/10] drm/amd/display: Use max target bpp override option

From: Roman Li [Why] Max target bpp override is an option for working around DSC issues. It is supported on DC level, but was not used in DM. [How] Use actual option value instead of 0. Reviewed-by: Rodrigo Siqueira Acked-by: Qingqing Zhuo Signed-off-by: Roman Li --- drivers/gpu/drm/amd/dis

[PATCH 05/10] drm/amd/display: Limit max DSC target bpp for specific monitors

From: Roman Li [Why] Some monitors exhibit corruption at 16bpp DSC. [How] - Add helpers for patching edid caps. - Use it for limiting DSC target bitrate to 15bpp for known monitors Reviewed-by: Rodrigo Siqueira Acked-by: Qingqing Zhuo Signed-off-by: Roman Li Cc: sta...@vger.kernel.org --- .

[PATCH 02/10] drm/amd/display: Support for DMUB HPD interrupt handling

From: Jude Shih [WHY] To add support for HPD interrupt handling from DMUB. HPD interrupt could be triggered from outbox1 from DMUB [HOW] 1) Use queue_work to handle hpd task from outbox1 2) Add handle_hpd_irq_helper to share interrupt handling code between legacy and DMUB HPD from outbox1 3) A

[PATCH 10/10] drm/amd/display: 3.2.150

From: Aric Cyr This version brings along following fixes: - FW promotion 0.0.80 - Add missing ABM register offsets - Fix in swizzle mode mapping - Emulated sink support for freesync - Improvoments in max target bpp Acked-by: Qingqing Zhuo Signed-off-by: Aric Cyr --- drivers/gpu/drm/amd/displa

[PATCH 09/10] drm/amd/display: [FW Promotion] Release 0.0.80

From: Anthony Koo - Add volatile to avoid incomplete flushing of data in rb Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo Signed-off-by: Anthony Koo --- .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 29 --- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/dri

RE: [PATCH 2/3] drm/amdgpu: Use SDMA1 for buffer movement on Aldebaran

> -Original Message- > From: Christian König > Sent: Friday, August 20, 2021 2:00 AM > To: Greathouse, Joseph ; > amd-gfx@lists.freedesktop.org > Subject: Re: [PATCH 2/3] drm/amdgpu: Use SDMA1 for buffer movement on > Aldebaran > > Am 20.08.21 um 07:32 schrieb Joseph Greathouse: > > Ald

Re: [PATCH] drm/amdkfd: CWSR with sw scheduler on Aldebaran and Arcturus

Reviewed-by: Amber Lin On 8/20/21 3:11 PM, Mukul Joshi wrote: Program trap handler settings to enable CWSR with software scheduler on Aldebaran and Arcturus. Signed-off-by: Mukul Joshi --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd