Re: [PATCH v4 12/17] drm/uAPI: Add "preferred color format" drm property as setting for userspace

2021-07-06 Thread Pekka Paalanen
On Mon, 5 Jul 2021 17:49:42 +0200 Werner Sembach wrote: > Am 01.07.21 um 15:24 schrieb Pekka Paalanen: > > On Thu, 1 Jul 2021 14:50:13 +0200 > > Werner Sembach wrote: > > > >> Am 01.07.21 um 10:07 schrieb Pekka Paalanen: > >> > >>> On Wed, 30 Jun 2021 11:20:18 +0200 > >>> Werner Sembach wro

Re: [PATCH v4 2/2] habanalabs: add support for dma-buf exporter

2021-07-06 Thread Jason Gunthorpe
On Mon, Jul 05, 2021 at 04:03:14PM +0300, Oded Gabbay wrote: > + rc = sg_alloc_table(*sgt, nents, GFP_KERNEL | __GFP_ZERO); > + if (rc) > + goto error_free; If you are not going to include a CPU list then I suggest setting sg_table->orig_nents == 0 And using only the nents wh

Re: Xorg doesn't work anymore after the latest DRM updates

2021-07-06 Thread Christian Zigotzky
Hi Nirmoy, Many thanks for this information. We will test this patch asap. Have a nice day, Christian On 05 July 2021 at 10:26pm, Nirmoy wrote: > Hi Christian, > > > This issue looks similar to the one Mikel Rychliski fixed recently  : https://patchwork.freedesktop.org/patch/440791. Let us kno

RE: [PATCH] SWDEV-291099 - Use a percise function name

2021-07-06 Thread Chen, Jiansong (Simon)
[AMD Official Use Only] Internal ticket number is not appropriate to appear in upstream patch, and percise->precise in the subject? Regards, Jiansong -Original Message- From: amd-gfx On Behalf Of Roy Sun Sent: Monday, July 5, 2021 6:24 PM To: amd-gfx@lists.freedesktop.org Cc: Sun, Roy

[PATCH] drm/amdgpu: Use a precise function name

2021-07-06 Thread Roy Sun
The callback functions are used for SRIOV read/write instead of just for rlcg read/write Signed-off-by: Roy Sun --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h| 4 ++-- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++-- drivers/gpu/drm/amd/amd

Re: [PATCH v4 0/2] Add p2p via dmabuf to habanalabs

2021-07-06 Thread Daniel Vetter
On Mon, Jul 05, 2021 at 04:03:12PM +0300, Oded Gabbay wrote: > Hi, > I'm sending v4 of this patch-set following the long email thread. > I want to thank Jason for reviewing v3 and pointing out the errors, saving > us time later to debug it :) > > I consulted with Christian on how to fix patch 2 (t

Re: [PATCH v4 2/2] habanalabs: add support for dma-buf exporter

2021-07-06 Thread Oded Gabbay
On Mon, Jul 5, 2021 at 7:52 PM Jason Gunthorpe wrote: > > On Mon, Jul 05, 2021 at 04:03:14PM +0300, Oded Gabbay wrote: > > > + rc = sg_alloc_table(*sgt, nents, GFP_KERNEL | __GFP_ZERO); > > + if (rc) > > + goto error_free; > > If you are not going to include a CPU list then I s

Re: [PATCH v4 0/2] Add p2p via dmabuf to habanalabs

2021-07-06 Thread Oded Gabbay
On Tue, Jul 6, 2021 at 11:40 AM Daniel Vetter wrote: > > On Mon, Jul 05, 2021 at 04:03:12PM +0300, Oded Gabbay wrote: > > Hi, > > I'm sending v4 of this patch-set following the long email thread. > > I want to thank Jason for reviewing v3 and pointing out the errors, saving > > us time later to de

Re: [PATCH v4 0/2] Add p2p via dmabuf to habanalabs

2021-07-06 Thread Daniel Vetter
On Tue, Jul 6, 2021 at 12:03 PM Oded Gabbay wrote: > > On Tue, Jul 6, 2021 at 11:40 AM Daniel Vetter wrote: > > > > On Mon, Jul 05, 2021 at 04:03:12PM +0300, Oded Gabbay wrote: > > > Hi, > > > I'm sending v4 of this patch-set following the long email thread. > > > I want to thank Jason for review

[PATCH V2 2/3] drm/amd/pm: update the gpu metrics data retrieving for Sienna Cichlid

2021-07-06 Thread Evan Quan
Due to the structure layout change: "uint32_t ThrottlerStatus" -> " uint8_t ThrottlingPercentage[THROTTLER_COUNT]". Change-Id: I5ea15c1ea5152e480f4e379193c5848bf2b85dd4 Signed-off-by: Evan Quan -- V1->V2: - update the way for handling the new Metrics structure(Lijo) --- .../amd/pm/swsmu/smu11

[PATCH V2 1/3] drm/amd/pm: new SmuMetrics data structure for Sienna Cichlid

2021-07-06 Thread Evan Quan
Due to the structure layout change: "uint32_t ThrottlerStatus" -> " uint8_t ThrottlingPercentage[THROTTLER_COUNT]". Change-Id: Ia62195857c5b377e8c95f76de0ec08e8674f04da Signed-off-by: Evan Quan --- .../pm/inc/smu11_driver_if_sienna_cichlid.h | 63 ++- 1 file changed, 62 insert

[PATCH V2 3/3] drm/amd/pm: bump DRIVER_IF_VERSION for Sienna Cichlid

2021-07-06 Thread Evan Quan
To suppress the annoying warning about version mismatch. Change-Id: I7dae1ef90ea3b09e1b378f96136b6ae61cc90696 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/pm/inc/smu11_driver_if_sienna_cichlid.h | 2 +- drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 +- 2 files changed, 2 in

Re: [PATCH v4 0/2] Add p2p via dmabuf to habanalabs

2021-07-06 Thread Daniel Vetter
On Tue, Jul 6, 2021 at 12:36 PM Daniel Vetter wrote: > On Tue, Jul 6, 2021 at 12:03 PM Oded Gabbay wrote: > > > > On Tue, Jul 6, 2021 at 11:40 AM Daniel Vetter wrote: > > > > > > On Mon, Jul 05, 2021 at 04:03:12PM +0300, Oded Gabbay wrote: > > > > Hi, > > > > I'm sending v4 of this patch-set fol

[PATCH AUTOSEL 5.13 005/189] drm/amd/display: fix HDCP reset sequence on reinitialize

2021-07-06 Thread Sasha Levin
From: Brandon Syu [ Upstream commit 99c248c41c2199bd34232ce8e729d18c4b343b64 ] [why] When setup is called after hdcp has already setup, it would cause to disable HDCP flow won’t execute. [how] Don't clean up hdcp content to be 0. Signed-off-by: Brandon Syu Reviewed-by: Wenjing Liu Acked-by:

[PATCH AUTOSEL 5.13 006/189] drm/amd/display: Revert wait vblank on update dpp clock

2021-07-06 Thread Sasha Levin
From: Lewis Huang [ Upstream commit d5433a9f692f57c814286f8af2746c567ef79fc8 ] [Why] This change only fix dpp clock switch to lower case. New solution later can fix both case, which is "dc: skip program clock when allow seamless boot" [How] This reverts commit "dc: wait vblank when stream enabl

[PATCH AUTOSEL 5.13 007/189] drm/amd/display: Fix BSOD with NULL check

2021-07-06 Thread Sasha Levin
From: Chris Park [ Upstream commit b2d4b9f72fb14c1e6e4f0128964a84539a72d831 ] [Why] CLK mgr is null for server settings. [How] Guard the function with NULL check. Signed-off-by: Chris Park Reviewed-by: Nicholas Kazlauskas Acked-by: Wayne Lin Tested-by: Daniel Wheeler Signed-off-by: Alex De

[PATCH AUTOSEL 5.13 008/189] drm/amd/amdgpu/sriov disable all ip hw status by default

2021-07-06 Thread Sasha Levin
From: Jack Zhang [ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ] Disable all ip's hw status to false before any hw_init. Only set it to true until its hw_init is executed. The old 5.9 branch has this change but somehow the 5.11 kernrel does not have this fix. Without this change,

[PATCH AUTOSEL 5.13 014/189] drm/amd/display: fix potential gpu reset deadlock

2021-07-06 Thread Sasha Levin
From: Roman Li [ Upstream commit cf8b92a75646735136053ce51107bfa8cfc23191 ] [Why] In gpu reset dc_lock acquired in dm_suspend(). Asynchronously handle_hpd_rx_irq can also be called through amdgpu_dm_irq_suspend->flush_work, which also tries to acquire dc_lock. That causes a deadlock. [How] Chec

[PATCH AUTOSEL 5.13 015/189] drm/amdgpu: change the default timeout for kernel compute queues

2021-07-06 Thread Sasha Levin
From: Alex Deucher [ Upstream commit 67387dfe0f6630f2d4f412ce77debec23a49db7a ] Change to 60s. This matches what we already do in virtualization. Infinite timeout can lead to deadlocks in the kernel. Reviewed-by: Christian König Acked-by: Daniel Vetter Signed-off-by: Alex Deucher Signed-off

[PATCH AUTOSEL 5.13 016/189] drm/amd/display: Fix clock table filling logic

2021-07-06 Thread Sasha Levin
From: Ilya Bakoulin [ Upstream commit c31bef1cb1203b26f901a511a3246204cfaf8a57 ] [Why] Currently, the code that fills the clock table can miss filling information about some of the higher voltage states advertised by the SMU. This, in turn, may cause some of the higher pixel clock modes (e.g. 8k

[PATCH AUTOSEL 5.13 017/189] drm/amd/display: fix use_max_lb flag for 420 pixel formats

2021-07-06 Thread Sasha Levin
From: Dmytro Laktyushkin [ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ] Right now the flag simply selects memory config 0 when flag is true however 420 modes benefit more from memory config 3. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Aric Cyr Acked-by: Stylon Wang Tested-

[PATCH AUTOSEL 5.13 037/189] drm/amdgpu/display: restore the backlight on modeset (v2)

2021-07-06 Thread Sasha Levin
From: Alex Deucher [ Upstream commit 7230362c78d441020a47d7d5ca81f8a3d07bd9f0 ] To stay consistent with the user's setting. v2: rebase on multi-eDP support Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1337 Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher Signed-off-by: Sasha L

[PATCH AUTOSEL 5.13 042/189] drm/amd/pm: fix return value in aldebaran_set_mp1_state()

2021-07-06 Thread Sasha Levin
From: Feifei Xu [ Upstream commit 5051cb794ac5d92154e186d87cdc12cba613f4f6 ] For default cases,we should return 0. Otherwise resume will abort because of the wrong return value. Signed-off-by: Feifei Xu Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- driv

[PATCH AUTOSEL 5.13 050/189] drm/amd/display: fix odm scaling

2021-07-06 Thread Sasha Levin
From: Dmytro Laktyushkin [ Upstream commit 6566cae7aef30da8833f1fa0eb854baf33b96676 ] There are two issues with scaling calculations, odm recout calculation and matching viewport to actual recout. This change fixes both issues. Odm recout calculation via special casing and viewport matching iss

[PATCH AUTOSEL 5.13 051/189] drm/amdgpu/swsmu/aldebaran: fix check in is_dpm_running

2021-07-06 Thread Sasha Levin
From: Alex Deucher [ Upstream commit dd1d82c04e111b5a864638ede8965db2fe6d8653 ] If smu_cmn_get_enabled_mask() fails, return false to be consistent with other asics. Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher Cc: Lee Jones Reviewed-by: Lee Jones Signed-off-by: Sasha Levin --- driv

[PATCH AUTOSEL 5.13 067/189] drm/amdgpu: fix sdma firmware version error in sriov

2021-07-06 Thread Sasha Levin
From: Kevin Wang [ Upstream commit 2b8f731849800e3948763ccaff31cceac526789b ] Re-adjust the function return order to avoid empty sdma version in the sriov environment. (read amdgpu_firmware_info) Signed-off-by: Kevin Wang Reviewed-by: Stanley.Yang Signed-off-by: Alex Deucher Signed-off-by: S

[PATCH AUTOSEL 5.13 066/189] drm/amdgpu: fix metadata_size for ubo ioctl queries

2021-07-06 Thread Sasha Levin
From: Shiwu Zhang [ Upstream commit eba98523724be7ad3539f2c975de1527e0c99dd6 ] Although the kfd_ioctl_get_dmabuf_info() still fail it will indicate the caller right metadat_size useful for the same kfd ioctl next time. Signed-off-by: Shiwu Zhang Reviewed-by: Nirmoy Das Signed-off-by: Alex Deu

[PATCH AUTOSEL 5.13 068/189] drm/amd/display: Avoid HDCP over-read and corruption

2021-07-06 Thread Sasha Levin
From: Kees Cook [ Upstream commit 06888d571b513cbfc0b41949948def6cb81021b2 ] Instead of reading the desired 5 bytes of the actual target field, the code was reading 8. This could result in a corrupted value if the trailing 3 bytes were non-zero, so instead use an appropriately sized and zero-ini

[PATCH AUTOSEL 5.13 069/189] drm/amdgpu: remove unsafe optimization to drop preamble ib

2021-07-06 Thread Sasha Levin
From: Jiansong Chen [ Upstream commit 7d9c70d23550eb86a1bec1954ccaa8d6ec3a3328 ] Take the situation with gfxoff, the optimization may cause corrupt CE ram contents. In addition emit_cntxcntl callback has similar optimization which firmware can handle properly even for power feature. Signed-off-

[PATCH AUTOSEL 5.13 088/189] drm/amd/display: Fix DCN 3.01 DSCCLK validation

2021-07-06 Thread Sasha Levin
From: Nikola Cornij [ Upstream commit 346cf627fb27c0fea63a041cedbaa4f31784e504 ] [why] DSCCLK validation is not necessary because DSCCLK is derrived from DISPCLK, therefore if DISPCLK validation passes, DSCCLK is valid, too. Doing DSCLK validation in addition to DISPCLK leads to modes being wron

[PATCH AUTOSEL 5.13 089/189] drm/amd/display: Revert "Fix clock table filling logic"

2021-07-06 Thread Sasha Levin
From: Ilya Bakoulin [ Upstream commit ae88357c7966ec2a52cb1e70fd42f74a40c9dfcb ] [Why] This change was found to break some high-refresh modes. Reverting to unblock mainline. Signed-off-by: Ilya Bakoulin Reviewed-by: Sung Lee Acked-by: Stylon Wang Tested-by: Daniel Wheeler Signed-off-by: Ale

[PATCH AUTOSEL 5.13 090/189] drm/amd/display: Update scaling settings on modeset

2021-07-06 Thread Sasha Levin
From: Roman Li [ Upstream commit c521fc316d12fb9ea7b7680e301d673bceda922e ] [Why] We update scaling settings when scaling mode has been changed. However when changing mode from native resolution the scaling mode previously set gets ignored. [How] Perform scaling settings update on modeset. Sig

[PATCH AUTOSEL 5.13 092/189] drm/amd/display: Set DISPCLK_MAX_ERRDET_CYCLES to 7

2021-07-06 Thread Sasha Levin
From: Wesley Chalmers [ Upstream commit 3577e1678772ce3ede92af3a75b44a4b76f9b4ad ] [WHY] DISPCLK_MAX_ERRDET_CYCLES must be 7 to prevent connection loss when changing DENTIST_DISPCLK_WDIVIDER from 126 to 127 and back. Signed-off-by: Wesley Chalmers Reviewed-by: Dmytro Laktyushkin Acked-by: Sty

[PATCH AUTOSEL 5.13 091/189] drm/amd/display: Release MST resources on switch from MST to SST

2021-07-06 Thread Sasha Levin
From: Vladimir Stempen [ Upstream commit 3f8518b60c10aa96f3efa38a967a0b4eb9211ac0 ] [why] When OS overrides training link training parameters for MST device to SST mode, MST resources are not released and leak of the resource may result crash and incorrect MST discovery during following hot plug

[PATCH AUTOSEL 5.13 093/189] drm/amd/display: Fix off-by-one error in DML

2021-07-06 Thread Sasha Levin
From: Wesley Chalmers [ Upstream commit e4e3678260e9734f6f41b4325aac0b171833a618 ] [WHY] For DCN30 and later, there is no data in DML arrays indexed by state at index num_states. Signed-off-by: Wesley Chalmers Reviewed-by: Dmytro Laktyushkin Acked-by: Stylon Wang Tested-by: Daniel Wheeler S

[PATCH AUTOSEL 5.13 094/189] drm/amd/display: Fix crash during MPO + ODM combine mode recalculation

2021-07-06 Thread Sasha Levin
From: Aric Cyr [ Upstream commit 665f28507a2a3d8d72ed9afa9a2b9b17fd43add1 ] [Why] When calculating recout width for an MPO plane on a mode that's using ODM combine, driver can calculate a negative value, resulting in a crash. [How] For negative widths, use zero such that validation will prune t

[PATCH AUTOSEL 5.13 098/189] drm/amdkfd: use allowed domain for vmbo validation

2021-07-06 Thread Sasha Levin
From: Nirmoy Das [ Upstream commit bc05716d4fdd065013633602c5960a2bf1511b9c ] Fixes handling when page tables are in system memory. v3: remove struct amdgpu_vm_parser. v2: remove unwanted variable. change amdgpu_amdkfd_validate instead of amdgpu_amdkfd_bo_validate. Signed-off-by: Nirmoy Da

[PATCH AUTOSEL 5.13 103/189] drm/amd/display: Verify Gamma & Degamma LUT sizes in amdgpu_dm_atomic_check

2021-07-06 Thread Sasha Levin
From: Mark Yacoub [ Upstream commit 03fc4cf45d30533d54f0f4ebc02aacfa12f52ce2 ] For each CRTC state, check the size of Gamma and Degamma LUTs so unexpected and larger sizes wouldn't slip through. TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes v2: fix assignments in if clauses, Mark's email.

[PATCH AUTOSEL 5.13 112/189] drm/amd/display: Cover edge-case when changing DISPCLK WDIVIDER

2021-07-06 Thread Sasha Levin
From: Wesley Chalmers [ Upstream commit 78ebca321999699f30ea19029726d1a3908b395f ] [WHY] When changing the DISPCLK_WDIVIDER value from 126 to 127, the change in clock rate is too great for the FIFOs to handle. This can cause visible corruption during clock change. HW has handed down this regist

[PATCH AUTOSEL 5.13 113/189] drm/amdgpu/gfx9: fix the doorbell missing when in CGPG issue.

2021-07-06 Thread Sasha Levin
From: Yifan Zhang [ Upstream commit 631003101c516ea29a74aee59666708857b9a805 ] If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue. Signed-off-by: Yifan Zhang Reviewed-by: Felix Kuehling Reviewed-by: Alex Deuche

[PATCH AUTOSEL 5.13 114/189] drm/amdkfd: Fix circular lock in nocpsch path

2021-07-06 Thread Sasha Levin
From: Amber Lin [ Upstream commit a7b2451d31cfa2e8aeccf3b35612ce33f02371fc ] Calling free_mqd inside of destroy_queue_nocpsch_locked can cause a circular lock. destroy_queue_nocpsch_locked is called under a DQM lock, which is taken in MMU notifiers, potentially in FS reclaim context. Taking anot

[PATCH AUTOSEL 5.13 111/189] drm/amdkfd: fix circular locking on get_wave_state

2021-07-06 Thread Sasha Levin
From: Jonathan Kim [ Upstream commit 63f6e01237257e7226efc5087f3f0b525d320f54 ] get_wave_state acquires the mmap_lock on copy_to_user but so do mmu_notifiers. mmu_notifiers allows dqm locking so do get_wave_state outside the dqm_lock to prevent circular locking. v2: squash in unused variable r

[PATCH AUTOSEL 5.13 128/189] drm/amdgpu: fix bad address translation for sienna_cichlid

2021-07-06 Thread Sasha Levin
From: "Stanley.Yang" [ Upstream commit 6ec598cc9dfbf40433e94a2ed1a622e3ef80268b ] Signed-off-by: Stanley.Yang Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 5 + drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 2

[PATCH AUTOSEL 5.13 129/189] drm/amdkfd: Walk through list with dqm lock hold

2021-07-06 Thread Sasha Levin
From: xinhui pan [ Upstream commit 56f221b6389e7ab99c30bbf01c71998ae92fc584 ] To avoid any list corruption. Signed-off-by: xinhui pan Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- .../drm/amd/amdkfd/kfd_device_queue_manager.c | 22 ++

[PATCH AUTOSEL 5.13 147/189] drm/amd/display: Fix edp_bootup_bl_level initialization issue

2021-07-06 Thread Sasha Levin
From: Logush Oliver [ Upstream commit eeb90e26ed05dd44553d557057bf35f08f853af8 ] [why] Updating the file to fix the missing line Signed-off-by: Logush Oliver Reviewed-by: Charlene Liu Acked-by: Bindu Ramamurthy Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levi

[PATCH AUTOSEL 5.13 146/189] Revert "drm/amdgpu/gfx9: fix the doorbell missing when in CGPG issue."

2021-07-06 Thread Sasha Levin
From: Yifan Zhang [ Upstream commit 962f2f1ae273399e357a3192d5413ca57f9b4885 ] This reverts commit 631003101c516ea29a74aee59666708857b9a805. Reason for revert: side effect of enlarging CP_MEC_DOORBELL_RANGE may cause some APUs fail to enter gfxoff in certain user cases. Signed-off-by: Yifan Zh

[PATCH AUTOSEL 5.12 005/160] drm/amd/display: fix HDCP reset sequence on reinitialize

2021-07-06 Thread Sasha Levin
From: Brandon Syu [ Upstream commit 99c248c41c2199bd34232ce8e729d18c4b343b64 ] [why] When setup is called after hdcp has already setup, it would cause to disable HDCP flow won’t execute. [how] Don't clean up hdcp content to be 0. Signed-off-by: Brandon Syu Reviewed-by: Wenjing Liu Acked-by:

[PATCH AUTOSEL 5.12 006/160] drm/amd/amdgpu/sriov disable all ip hw status by default

2021-07-06 Thread Sasha Levin
From: Jack Zhang [ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ] Disable all ip's hw status to false before any hw_init. Only set it to true until its hw_init is executed. The old 5.9 branch has this change but somehow the 5.11 kernrel does not have this fix. Without this change,

[PATCH AUTOSEL 5.12 011/160] drm/amd/display: fix potential gpu reset deadlock

2021-07-06 Thread Sasha Levin
From: Roman Li [ Upstream commit cf8b92a75646735136053ce51107bfa8cfc23191 ] [Why] In gpu reset dc_lock acquired in dm_suspend(). Asynchronously handle_hpd_rx_irq can also be called through amdgpu_dm_irq_suspend->flush_work, which also tries to acquire dc_lock. That causes a deadlock. [How] Chec

[PATCH AUTOSEL 5.12 012/160] drm/amdgpu: change the default timeout for kernel compute queues

2021-07-06 Thread Sasha Levin
From: Alex Deucher [ Upstream commit 67387dfe0f6630f2d4f412ce77debec23a49db7a ] Change to 60s. This matches what we already do in virtualization. Infinite timeout can lead to deadlocks in the kernel. Reviewed-by: Christian König Acked-by: Daniel Vetter Signed-off-by: Alex Deucher Signed-off

[PATCH AUTOSEL 5.12 013/160] drm/amd/display: fix use_max_lb flag for 420 pixel formats

2021-07-06 Thread Sasha Levin
From: Dmytro Laktyushkin [ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ] Right now the flag simply selects memory config 0 when flag is true however 420 modes benefit more from memory config 3. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Aric Cyr Acked-by: Stylon Wang Tested-

[PATCH AUTOSEL 5.12 041/160] drm/amd/display: fix odm scaling

2021-07-06 Thread Sasha Levin
From: Dmytro Laktyushkin [ Upstream commit 6566cae7aef30da8833f1fa0eb854baf33b96676 ] There are two issues with scaling calculations, odm recout calculation and matching viewport to actual recout. This change fixes both issues. Odm recout calculation via special casing and viewport matching iss

[PATCH AUTOSEL 5.12 057/160] drm/amdgpu: remove unsafe optimization to drop preamble ib

2021-07-06 Thread Sasha Levin
From: Jiansong Chen [ Upstream commit 7d9c70d23550eb86a1bec1954ccaa8d6ec3a3328 ] Take the situation with gfxoff, the optimization may cause corrupt CE ram contents. In addition emit_cntxcntl callback has similar optimization which firmware can handle properly even for power feature. Signed-off-

[PATCH AUTOSEL 5.12 056/160] drm/amd/display: Avoid HDCP over-read and corruption

2021-07-06 Thread Sasha Levin
From: Kees Cook [ Upstream commit 06888d571b513cbfc0b41949948def6cb81021b2 ] Instead of reading the desired 5 bytes of the actual target field, the code was reading 8. This could result in a corrupted value if the trailing 3 bytes were non-zero, so instead use an appropriately sized and zero-ini

[PATCH AUTOSEL 5.12 055/160] drm/amdgpu: fix sdma firmware version error in sriov

2021-07-06 Thread Sasha Levin
From: Kevin Wang [ Upstream commit 2b8f731849800e3948763ccaff31cceac526789b ] Re-adjust the function return order to avoid empty sdma version in the sriov environment. (read amdgpu_firmware_info) Signed-off-by: Kevin Wang Reviewed-by: Stanley.Yang Signed-off-by: Alex Deucher Signed-off-by: S

[PATCH AUTOSEL 5.12 075/160] drm/amd/display: Fix DCN 3.01 DSCCLK validation

2021-07-06 Thread Sasha Levin
From: Nikola Cornij [ Upstream commit 346cf627fb27c0fea63a041cedbaa4f31784e504 ] [why] DSCCLK validation is not necessary because DSCCLK is derrived from DISPCLK, therefore if DISPCLK validation passes, DSCCLK is valid, too. Doing DSCLK validation in addition to DISPCLK leads to modes being wron

[PATCH AUTOSEL 5.12 076/160] drm/amd/display: Update scaling settings on modeset

2021-07-06 Thread Sasha Levin
From: Roman Li [ Upstream commit c521fc316d12fb9ea7b7680e301d673bceda922e ] [Why] We update scaling settings when scaling mode has been changed. However when changing mode from native resolution the scaling mode previously set gets ignored. [How] Perform scaling settings update on modeset. Sig

[PATCH AUTOSEL 5.12 078/160] drm/amd/display: Set DISPCLK_MAX_ERRDET_CYCLES to 7

2021-07-06 Thread Sasha Levin
From: Wesley Chalmers [ Upstream commit 3577e1678772ce3ede92af3a75b44a4b76f9b4ad ] [WHY] DISPCLK_MAX_ERRDET_CYCLES must be 7 to prevent connection loss when changing DENTIST_DISPCLK_WDIVIDER from 126 to 127 and back. Signed-off-by: Wesley Chalmers Reviewed-by: Dmytro Laktyushkin Acked-by: Sty

[PATCH AUTOSEL 5.12 079/160] drm/amd/display: Fix off-by-one error in DML

2021-07-06 Thread Sasha Levin
From: Wesley Chalmers [ Upstream commit e4e3678260e9734f6f41b4325aac0b171833a618 ] [WHY] For DCN30 and later, there is no data in DML arrays indexed by state at index num_states. Signed-off-by: Wesley Chalmers Reviewed-by: Dmytro Laktyushkin Acked-by: Stylon Wang Tested-by: Daniel Wheeler S

[PATCH AUTOSEL 5.12 080/160] drm/amd/display: Fix crash during MPO + ODM combine mode recalculation

2021-07-06 Thread Sasha Levin
From: Aric Cyr [ Upstream commit 665f28507a2a3d8d72ed9afa9a2b9b17fd43add1 ] [Why] When calculating recout width for an MPO plane on a mode that's using ODM combine, driver can calculate a negative value, resulting in a crash. [How] For negative widths, use zero such that validation will prune t

[PATCH AUTOSEL 5.12 077/160] drm/amd/display: Release MST resources on switch from MST to SST

2021-07-06 Thread Sasha Levin
From: Vladimir Stempen [ Upstream commit 3f8518b60c10aa96f3efa38a967a0b4eb9211ac0 ] [why] When OS overrides training link training parameters for MST device to SST mode, MST resources are not released and leak of the resource may result crash and incorrect MST discovery during following hot plug

[PATCH AUTOSEL 5.12 084/160] drm/amdkfd: use allowed domain for vmbo validation

2021-07-06 Thread Sasha Levin
From: Nirmoy Das [ Upstream commit bc05716d4fdd065013633602c5960a2bf1511b9c ] Fixes handling when page tables are in system memory. v3: remove struct amdgpu_vm_parser. v2: remove unwanted variable. change amdgpu_amdkfd_validate instead of amdgpu_amdkfd_bo_validate. Signed-off-by: Nirmoy Da

[PATCH AUTOSEL 5.12 088/160] drm/amd/display: Verify Gamma & Degamma LUT sizes in amdgpu_dm_atomic_check

2021-07-06 Thread Sasha Levin
From: Mark Yacoub [ Upstream commit 03fc4cf45d30533d54f0f4ebc02aacfa12f52ce2 ] For each CRTC state, check the size of Gamma and Degamma LUTs so unexpected and larger sizes wouldn't slip through. TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes v2: fix assignments in if clauses, Mark's email.

[PATCH AUTOSEL 5.12 095/160] drm/amdkfd: fix circular locking on get_wave_state

2021-07-06 Thread Sasha Levin
From: Jonathan Kim [ Upstream commit 63f6e01237257e7226efc5087f3f0b525d320f54 ] get_wave_state acquires the mmap_lock on copy_to_user but so do mmu_notifiers. mmu_notifiers allows dqm locking so do get_wave_state outside the dqm_lock to prevent circular locking. v2: squash in unused variable r

[PATCH AUTOSEL 5.12 096/160] drm/amdkfd: Fix circular lock in nocpsch path

2021-07-06 Thread Sasha Levin
From: Amber Lin [ Upstream commit a7b2451d31cfa2e8aeccf3b35612ce33f02371fc ] Calling free_mqd inside of destroy_queue_nocpsch_locked can cause a circular lock. destroy_queue_nocpsch_locked is called under a DQM lock, which is taken in MMU notifiers, potentially in FS reclaim context. Taking anot

[PATCH AUTOSEL 5.12 108/160] drm/amdkfd: Walk through list with dqm lock hold

2021-07-06 Thread Sasha Levin
From: xinhui pan [ Upstream commit 56f221b6389e7ab99c30bbf01c71998ae92fc584 ] To avoid any list corruption. Signed-off-by: xinhui pan Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- .../drm/amd/amdkfd/kfd_device_queue_manager.c | 22 ++

[PATCH AUTOSEL 5.12 107/160] drm/amdgpu: fix bad address translation for sienna_cichlid

2021-07-06 Thread Sasha Levin
From: "Stanley.Yang" [ Upstream commit 6ec598cc9dfbf40433e94a2ed1a622e3ef80268b ] Signed-off-by: Stanley.Yang Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 5 + drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 2

[PATCH AUTOSEL 5.12 119/160] drm/amd/display: Fix edp_bootup_bl_level initialization issue

2021-07-06 Thread Sasha Levin
From: Logush Oliver [ Upstream commit eeb90e26ed05dd44553d557057bf35f08f853af8 ] [why] Updating the file to fix the missing line Signed-off-by: Logush Oliver Reviewed-by: Charlene Liu Acked-by: Bindu Ramamurthy Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levi

[PATCH AUTOSEL 5.10 005/137] drm/amd/display: fix HDCP reset sequence on reinitialize

2021-07-06 Thread Sasha Levin
From: Brandon Syu [ Upstream commit 99c248c41c2199bd34232ce8e729d18c4b343b64 ] [why] When setup is called after hdcp has already setup, it would cause to disable HDCP flow won’t execute. [how] Don't clean up hdcp content to be 0. Signed-off-by: Brandon Syu Reviewed-by: Wenjing Liu Acked-by:

[PATCH AUTOSEL 5.10 006/137] drm/amd/amdgpu/sriov disable all ip hw status by default

2021-07-06 Thread Sasha Levin
From: Jack Zhang [ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ] Disable all ip's hw status to false before any hw_init. Only set it to true until its hw_init is executed. The old 5.9 branch has this change but somehow the 5.11 kernrel does not have this fix. Without this change,

[PATCH AUTOSEL 5.10 010/137] drm/amd/display: fix use_max_lb flag for 420 pixel formats

2021-07-06 Thread Sasha Levin
From: Dmytro Laktyushkin [ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ] Right now the flag simply selects memory config 0 when flag is true however 420 modes benefit more from memory config 3. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Aric Cyr Acked-by: Stylon Wang Tested-

[PATCH AUTOSEL 5.10 050/137] drm/amd/display: Avoid HDCP over-read and corruption

2021-07-06 Thread Sasha Levin
From: Kees Cook [ Upstream commit 06888d571b513cbfc0b41949948def6cb81021b2 ] Instead of reading the desired 5 bytes of the actual target field, the code was reading 8. This could result in a corrupted value if the trailing 3 bytes were non-zero, so instead use an appropriately sized and zero-ini

[PATCH AUTOSEL 5.10 051/137] drm/amdgpu: remove unsafe optimization to drop preamble ib

2021-07-06 Thread Sasha Levin
From: Jiansong Chen [ Upstream commit 7d9c70d23550eb86a1bec1954ccaa8d6ec3a3328 ] Take the situation with gfxoff, the optimization may cause corrupt CE ram contents. In addition emit_cntxcntl callback has similar optimization which firmware can handle properly even for power feature. Signed-off-

[PATCH AUTOSEL 5.10 067/137] drm/amd/display: Fix DCN 3.01 DSCCLK validation

2021-07-06 Thread Sasha Levin
From: Nikola Cornij [ Upstream commit 346cf627fb27c0fea63a041cedbaa4f31784e504 ] [why] DSCCLK validation is not necessary because DSCCLK is derrived from DISPCLK, therefore if DISPCLK validation passes, DSCCLK is valid, too. Doing DSCLK validation in addition to DISPCLK leads to modes being wron

[PATCH AUTOSEL 5.10 068/137] drm/amd/display: Update scaling settings on modeset

2021-07-06 Thread Sasha Levin
From: Roman Li [ Upstream commit c521fc316d12fb9ea7b7680e301d673bceda922e ] [Why] We update scaling settings when scaling mode has been changed. However when changing mode from native resolution the scaling mode previously set gets ignored. [How] Perform scaling settings update on modeset. Sig

[PATCH AUTOSEL 5.10 069/137] drm/amd/display: Release MST resources on switch from MST to SST

2021-07-06 Thread Sasha Levin
From: Vladimir Stempen [ Upstream commit 3f8518b60c10aa96f3efa38a967a0b4eb9211ac0 ] [why] When OS overrides training link training parameters for MST device to SST mode, MST resources are not released and leak of the resource may result crash and incorrect MST discovery during following hot plug

[PATCH AUTOSEL 5.10 070/137] drm/amd/display: Set DISPCLK_MAX_ERRDET_CYCLES to 7

2021-07-06 Thread Sasha Levin
From: Wesley Chalmers [ Upstream commit 3577e1678772ce3ede92af3a75b44a4b76f9b4ad ] [WHY] DISPCLK_MAX_ERRDET_CYCLES must be 7 to prevent connection loss when changing DENTIST_DISPCLK_WDIVIDER from 126 to 127 and back. Signed-off-by: Wesley Chalmers Reviewed-by: Dmytro Laktyushkin Acked-by: Sty

[PATCH AUTOSEL 5.10 075/137] drm/amdkfd: use allowed domain for vmbo validation

2021-07-06 Thread Sasha Levin
From: Nirmoy Das [ Upstream commit bc05716d4fdd065013633602c5960a2bf1511b9c ] Fixes handling when page tables are in system memory. v3: remove struct amdgpu_vm_parser. v2: remove unwanted variable. change amdgpu_amdkfd_validate instead of amdgpu_amdkfd_bo_validate. Signed-off-by: Nirmoy Da

[PATCH AUTOSEL 5.10 071/137] drm/amd/display: Fix off-by-one error in DML

2021-07-06 Thread Sasha Levin
From: Wesley Chalmers [ Upstream commit e4e3678260e9734f6f41b4325aac0b171833a618 ] [WHY] For DCN30 and later, there is no data in DML arrays indexed by state at index num_states. Signed-off-by: Wesley Chalmers Reviewed-by: Dmytro Laktyushkin Acked-by: Stylon Wang Tested-by: Daniel Wheeler S

[PATCH AUTOSEL 5.10 079/137] drm/amd/display: Verify Gamma & Degamma LUT sizes in amdgpu_dm_atomic_check

2021-07-06 Thread Sasha Levin
From: Mark Yacoub [ Upstream commit 03fc4cf45d30533d54f0f4ebc02aacfa12f52ce2 ] For each CRTC state, check the size of Gamma and Degamma LUTs so unexpected and larger sizes wouldn't slip through. TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes v2: fix assignments in if clauses, Mark's email.

[PATCH AUTOSEL 5.10 085/137] drm/amdkfd: fix circular locking on get_wave_state

2021-07-06 Thread Sasha Levin
From: Jonathan Kim [ Upstream commit 63f6e01237257e7226efc5087f3f0b525d320f54 ] get_wave_state acquires the mmap_lock on copy_to_user but so do mmu_notifiers. mmu_notifiers allows dqm locking so do get_wave_state outside the dqm_lock to prevent circular locking. v2: squash in unused variable r

[PATCH AUTOSEL 5.10 086/137] drm/amdkfd: Fix circular lock in nocpsch path

2021-07-06 Thread Sasha Levin
From: Amber Lin [ Upstream commit a7b2451d31cfa2e8aeccf3b35612ce33f02371fc ] Calling free_mqd inside of destroy_queue_nocpsch_locked can cause a circular lock. destroy_queue_nocpsch_locked is called under a DQM lock, which is taken in MMU notifiers, potentially in FS reclaim context. Taking anot

[PATCH AUTOSEL 5.10 095/137] drm/amdgpu: fix bad address translation for sienna_cichlid

2021-07-06 Thread Sasha Levin
From: "Stanley.Yang" [ Upstream commit 6ec598cc9dfbf40433e94a2ed1a622e3ef80268b ] Signed-off-by: Stanley.Yang Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 5 + drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 2

[PATCH AUTOSEL 5.10 096/137] drm/amdkfd: Walk through list with dqm lock hold

2021-07-06 Thread Sasha Levin
From: xinhui pan [ Upstream commit 56f221b6389e7ab99c30bbf01c71998ae92fc584 ] To avoid any list corruption. Signed-off-by: xinhui pan Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- .../drm/amd/amdkfd/kfd_device_queue_manager.c | 22 ++

[PATCH AUTOSEL 5.4 04/74] drm/amd/amdgpu/sriov disable all ip hw status by default

2021-07-06 Thread Sasha Levin
From: Jack Zhang [ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ] Disable all ip's hw status to false before any hw_init. Only set it to true until its hw_init is executed. The old 5.9 branch has this change but somehow the 5.11 kernrel does not have this fix. Without this change,

[PATCH AUTOSEL 5.4 07/74] drm/amd/display: fix use_max_lb flag for 420 pixel formats

2021-07-06 Thread Sasha Levin
From: Dmytro Laktyushkin [ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ] Right now the flag simply selects memory config 0 when flag is true however 420 modes benefit more from memory config 3. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Aric Cyr Acked-by: Stylon Wang Tested-

[PATCH AUTOSEL 5.4 35/74] drm/amd/display: Update scaling settings on modeset

2021-07-06 Thread Sasha Levin
From: Roman Li [ Upstream commit c521fc316d12fb9ea7b7680e301d673bceda922e ] [Why] We update scaling settings when scaling mode has been changed. However when changing mode from native resolution the scaling mode previously set gets ignored. [How] Perform scaling settings update on modeset. Sig

[PATCH AUTOSEL 5.4 36/74] drm/amd/display: Release MST resources on switch from MST to SST

2021-07-06 Thread Sasha Levin
From: Vladimir Stempen [ Upstream commit 3f8518b60c10aa96f3efa38a967a0b4eb9211ac0 ] [why] When OS overrides training link training parameters for MST device to SST mode, MST resources are not released and leak of the resource may result crash and incorrect MST discovery during following hot plug

[PATCH AUTOSEL 5.4 38/74] drm/amdkfd: use allowed domain for vmbo validation

2021-07-06 Thread Sasha Levin
From: Nirmoy Das [ Upstream commit bc05716d4fdd065013633602c5960a2bf1511b9c ] Fixes handling when page tables are in system memory. v3: remove struct amdgpu_vm_parser. v2: remove unwanted variable. change amdgpu_amdkfd_validate instead of amdgpu_amdkfd_bo_validate. Signed-off-by: Nirmoy Da

[PATCH AUTOSEL 5.4 42/74] drm/amd/display: Verify Gamma & Degamma LUT sizes in amdgpu_dm_atomic_check

2021-07-06 Thread Sasha Levin
From: Mark Yacoub [ Upstream commit 03fc4cf45d30533d54f0f4ebc02aacfa12f52ce2 ] For each CRTC state, check the size of Gamma and Degamma LUTs so unexpected and larger sizes wouldn't slip through. TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes v2: fix assignments in if clauses, Mark's email.

[PATCH AUTOSEL 5.4 37/74] drm/amd/display: Set DISPCLK_MAX_ERRDET_CYCLES to 7

2021-07-06 Thread Sasha Levin
From: Wesley Chalmers [ Upstream commit 3577e1678772ce3ede92af3a75b44a4b76f9b4ad ] [WHY] DISPCLK_MAX_ERRDET_CYCLES must be 7 to prevent connection loss when changing DENTIST_DISPCLK_WDIVIDER from 126 to 127 and back. Signed-off-by: Wesley Chalmers Reviewed-by: Dmytro Laktyushkin Acked-by: Sty

[PATCH AUTOSEL 5.4 51/74] drm/amdkfd: Walk through list with dqm lock hold

2021-07-06 Thread Sasha Levin
From: xinhui pan [ Upstream commit 56f221b6389e7ab99c30bbf01c71998ae92fc584 ] To avoid any list corruption. Signed-off-by: xinhui pan Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- .../drm/amd/amdkfd/kfd_device_queue_manager.c | 22 ++

[PATCH AUTOSEL 4.19 04/55] drm/amd/amdgpu/sriov disable all ip hw status by default

2021-07-06 Thread Sasha Levin
From: Jack Zhang [ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ] Disable all ip's hw status to false before any hw_init. Only set it to true until its hw_init is executed. The old 5.9 branch has this change but somehow the 5.11 kernrel does not have this fix. Without this change,

[PATCH AUTOSEL 4.19 06/55] drm/amd/display: fix use_max_lb flag for 420 pixel formats

2021-07-06 Thread Sasha Levin
From: Dmytro Laktyushkin [ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ] Right now the flag simply selects memory config 0 when flag is true however 420 modes benefit more from memory config 3. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Aric Cyr Acked-by: Stylon Wang Tested-

[PATCH AUTOSEL 4.14 04/45] drm/amd/amdgpu/sriov disable all ip hw status by default

2021-07-06 Thread Sasha Levin
From: Jack Zhang [ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ] Disable all ip's hw status to false before any hw_init. Only set it to true until its hw_init is executed. The old 5.9 branch has this change but somehow the 5.11 kernrel does not have this fix. Without this change,

RE: [PATCH] drm/amdgpu: SRIOV flr_work should take write_lock

2021-07-06 Thread Liu, Monk
[AMD Official Use Only] Reviewed-by: Mon Liu Thanks -- Monk Liu | Cloud-GPU Core team -- -Original Message- From: Jingwen Chen Sent: Thursday, July 1, 2021 6:13 PM To: amd-gfx@lists.freedesktop.org Cc: L

Re: [PATCH v4 0/2] Add p2p via dmabuf to habanalabs

2021-07-06 Thread Daniel Vetter
On Tue, Jul 6, 2021 at 12:47 PM Daniel Vetter wrote: > On Tue, Jul 6, 2021 at 12:36 PM Daniel Vetter wrote: > > On Tue, Jul 6, 2021 at 12:03 PM Oded Gabbay wrote: > > > > > > On Tue, Jul 6, 2021 at 11:40 AM Daniel Vetter wrote: > > > > > > > > On Mon, Jul 05, 2021 at 04:03:12PM +0300, Oded Gabb

[PATCH] drm/amdgpu: Correct the irq numbers for virtual ctrc

2021-07-06 Thread Emily Deng
The irq number should be decided by num_crtc, and the num_crtc could change by parameter. Signed-off-by: Emily Deng --- drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amd

Re: [Linaro-mm-sig] [PATCH v4 0/2] Add p2p via dmabuf to habanalabs

2021-07-06 Thread Daniel Vetter
On Tue, Jul 06, 2021 at 02:21:10PM +0200, Christoph Hellwig wrote: > On Tue, Jul 06, 2021 at 10:40:37AM +0200, Daniel Vetter wrote: > > > Greg, I hope this will be good enough for you to merge this code. > > > > So we're officially going to use dri-devel for technical details review > > and then G

RE: [PATCH] drm/amdgpu: Correct the irq numbers for virtual ctrc

2021-07-06 Thread Deng, Emily
[AMD Official Use Only] Hi Nirmoy, Thanks, already send out another patch with updating the commit. Best wishes Emily Deng >-Original Message- >From: Das, Nirmoy >Sent: Friday, July 2, 2021 5:03 PM >To: Deng, Emily ; amd-gfx@lists.freedesktop.org >Cc: Zhao, Victor >Subject: Re: [PA

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