Replace use of struct drm_format_name_buf with %p4cc for printing
4CC formats.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/tiny/simpledrm.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/tiny/simpledrm.c b/drivers/gpu/drm/tiny/simpledrm.c
index
This is a cleanup patchset to remove drm_format_name_buf et al. There
are two instances in drivers that need to be replaced with the %4cc
printk format modifier. Patch 3 was left over back from an earlier
patchset. [1] Patch 4 removes struct drm_format_name_buf.
I built-tested with drm-tip. The pa
From: Sakari Ailus
The %p4cc printk format modifier was recently added to print fourcc codes,
replacing drm_get_format_name(). The function is no longer needed, so
remove it.
Signed-off-by: Sakari Ailus
Reviewed-by: Petr Mladek
Reviewed-by: Andy Shevchenko
---
drivers/gpu/drm/drm_fourcc.c |
The structure is unused. Remove it.
Signed-off-by: Thomas Zimmermann
---
include/drm/drm_fourcc.h | 8
1 file changed, 8 deletions(-)
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index 3ea17b8a79d3..3b138d4ae67e 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/dr
Replace use of struct drm_format_name_buf with %p4cc for printing
4CC formats.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/dr
Am 16.05.21 um 14:13 schrieb Thomas Zimmermann:
Replace use of struct drm_format_name_buf with %p4cc for printing
4CC formats.
Signed-off-by: Thomas Zimmermann
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 7 ++-
1 file changed, 2 insertions(+), 5 delet
The optimization is safe for old GPUs and can help performance.
Signed-off-by: Jiansong Chen
Change-Id: Id3b1250f1fe46dddbe8498894fb97e9753b7cafe
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 6 ++
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 6 ++
2 files changed, 12 insertions(+)
diff --git
Introduce an RFC 4122 compliant UUID for the GPUs derived
from the unique GPU serial number (from Vega10) on gpus.
Where this serial number is not available, use a compliant
random UUID.
For virtualization, the unique ID is passed by the host driver
in the PF2VF structure.
Signed-off-by: Jiawei G
On Fri, May 14, 2021 at 10:13:55PM +0800, Alex Deucher wrote:
> On Fri, May 14, 2021 at 4:20 AM wrote:
> >
> > From: changzhu
> >
> > From: Changfeng
> >
> > There is problem with 3DCGCG firmware and it will cause compute test
> > hang on picasso/raven1. It needs to disable 3DCGCG in driver to a
[AMD Public Use]
Metrics table carries dynamic state information of the ASIC. There are other
pp_* nodes which carry static information about min/max and levels supported
and that is a one-time query. Why there is a need to put everything in metrics
data?
Thanks,
Lijo
-Original Message---
Well NAK, as discussed checking the global flag is more flexible since
it will still enable the preamble drop when gfxoff is disabled.
Christian.
Am 17.05.21 um 06:39 schrieb Jiansong Chen:
The optimization is safe for old GPUs and can help performance.
Signed-off-by: Jiansong Chen
Change-Id
[AMD Official Use Only]
Doesn't current solution always enable the optimization in a safe and more
clear way?
1. for gfx8/9/10 we use load_ce_ram in context_control to control the
optimization.
2. for gfx6/7, we directly drop the preamble ib.
Regards,
Jiansong
-Original Message-
From:
Am 17.05.21 um 07:54 schrieb Jiawei Gu:
Introduce an RFC 4122 compliant UUID for the GPUs derived
from the unique GPU serial number (from Vega10) on gpus.
Where this serial number is not available, use a compliant
random UUID.
For virtualization, the unique ID is passed by the host driver
in the
Am 17.05.21 um 08:51 schrieb Chen, Jiansong (Simon):
[AMD Official Use Only]
Doesn't current solution always enable the optimization in a safe and more
clear way?
No, we also need this for gfx8 where gfxoff is currently not implemented.
Additional to that we mix common frontend handling int
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