My pleasure!
At 2021-04-09 04:17:36, "Alex Deucher" wrote:
>Applied. Thanks!
>
>Alex
>
>On Wed, Apr 7, 2021 at 2:23 AM wrote:
>>
>> From: Yingjie Wang
>>
>> In radeon_dp_mst_detect(), We should check whether or not @connector
>> has been unregistered from userspace. If the connector is unregist
Hi Mikhail,
thanks a lot for pointing this out.
Turned out that this is a known issue, but I've forgot to push the fix
to drm-misc-fixes and just queued it up for the next release.
Please re-test drm-misc-fixes and let's hope there is another -rc before
the final 5.12 kernel.
Thanks,
Chris
Add interface to get the mm clock, temperature and memory load
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 50 +
include/uapi/drm/amdgpu_drm.h | 12 ++
2 files changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/d
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 del
Am 12.04.21 um 14:57 schrieb Roy Sun:
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amd
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Eric Huang
Sent: Friday, April 9, 2021 4:05 PM
To: amd-gfx@lists.freedesktop.org
Cc: Huang, JinHuiEric ; Greathouse, Joseph
Subject: [PATCH 1/2] drm/a
[AMD Public Use]
Hi all,
This week this patchset was tested on a HP Envy 360, with Ryzen 5 4500U, on the
following display types (via usb-c to dp/dvi/hdmi/vga):
4k 60z, 1440p 144hz, 1680*1050 60hz, internal eDP 1080p 60hz
Tested on a Sapphire Pulse RX5700XT on the following display types (via D
Like Arcturus, this isn't available on Aldebaran, so remove it
accordingly
Signed-off-by: Kent Russell
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 204e
On Mon, Apr 12, 2021 at 12:01 PM Kent Russell wrote:
>
> Like Arcturus, this isn't available on Aldebaran, so remove it
> accordingly
>
> Signed-off-by: Kent Russell
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
From: Qingqing Zhuo
[ Upstream commit df7232c4c676be29f1cf45058ec156c1183539ff ]
[Why]
DCN3 is not reusing DCN1 mask_sh_list, causing
SURFACE_FLIP_INT_MASK missing in the mapping.
[How]
Add the corresponding entry to DCN3 list.
Signed-off-by: Qingqing Zhuo
Reviewed-by: Nicholas Kazlauskas
Ac
On 2021-04-10 1:34 p.m., Christian König wrote:
Hi Andrey,
Am 09.04.21 um 20:18 schrieb Andrey Grodzovsky:
[SNIP]
If we use a list and a flag called 'emit_allowed' under a lock such
that in amdgpu_fence_emit we lock the list, check the flag and if
true add the new HW fence to list and proc
Am 12.04.21 um 19:27 schrieb Andrey Grodzovsky:
On 2021-04-10 1:34 p.m., Christian König wrote:
Hi Andrey,
Am 09.04.21 um 20:18 schrieb Andrey Grodzovsky:
[SNIP]
If we use a list and a flag called 'emit_allowed' under a lock
such that in amdgpu_fence_emit we lock the list, check the flag
On 2021-04-12 1:44 p.m., Christian König wrote:
Am 12.04.21 um 19:27 schrieb Andrey Grodzovsky:
On 2021-04-10 1:34 p.m., Christian König wrote:
Hi Andrey,
Am 09.04.21 um 20:18 schrieb Andrey Grodzovsky:
[SNIP]
If we use a list and a flag called 'emit_allowed' under a lock
such that in am
Am 12.04.21 um 20:01 schrieb Andrey Grodzovsky:
On 2021-04-12 1:44 p.m., Christian König wrote:
Am 12.04.21 um 19:27 schrieb Andrey Grodzovsky:
On 2021-04-10 1:34 p.m., Christian König wrote:
Hi Andrey,
Am 09.04.21 um 20:18 schrieb Andrey Grodzovsky:
[SNIP]
If we use a list and a flag c
On 2021-04-12 2:05 p.m., Christian König wrote:
Am 12.04.21 um 20:01 schrieb Andrey Grodzovsky:
On 2021-04-12 1:44 p.m., Christian König wrote:
Am 12.04.21 um 19:27 schrieb Andrey Grodzovsky:
On 2021-04-10 1:34 p.m., Christian König wrote:
Hi Andrey,
Am 09.04.21 um 20:18 schrieb Andrey G
Am 12.04.21 um 20:18 schrieb Andrey Grodzovsky:
On 2021-04-12 2:05 p.m., Christian König wrote:
Am 12.04.21 um 20:01 schrieb Andrey Grodzovsky:
On 2021-04-12 1:44 p.m., Christian König wrote:
Am 12.04.21 um 19:27 schrieb Andrey Grodzovsky:
On 2021-04-10 1:34 p.m., Christian König wrote:
[AMD Public Use]
Reviewed-by: Harish Kasiviswanathan
From: amd-gfx On Behalf Of Lazar, Lijo
Sent: Friday, April 9, 2021 10:53 AM
To: amd-gfx@lists.freedesktop.org
Cc: Xu, Feifei ; Wang, Kevin(Yang) ;
Feng, Kenneth ; Zhang, Hawking
Subject: [PATCH] drm/amd/pm: Show updated clocks on aldebaran
On 2021-04-12 2:23 p.m., Christian König wrote:
Am 12.04.21 um 20:18 schrieb Andrey Grodzovsky:
On 2021-04-12 2:05 p.m., Christian König wrote:
Am 12.04.21 um 20:01 schrieb Andrey Grodzovsky:
On 2021-04-12 1:44 p.m., Christian König wrote:
Am 12.04.21 um 19:27 schrieb Andrey Grodzovsky:
Am 12.04.21 um 21:12 schrieb Andrey Grodzovsky:
[SNIP]
So what's the right approach ? How we guarantee that when running
amdgpu_fence_driver_force_completion we will signal all the HW
fences and not racing against some more fences insertion into that
array ?
Well I would still say the be
On 2021-04-12 3:18 p.m., Christian König wrote:
Am 12.04.21 um 21:12 schrieb Andrey Grodzovsky:
[SNIP]
So what's the right approach ? How we guarantee that when running
amdgpu_fence_driver_force_completion we will signal all the HW
fences and not racing against some more fences insertion in
[AMD Public Use]
> -Original Message-
> From: Tuikov, Luben
> Sent: Sunday, April 11, 2021 9:15 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Tuikov, Luben ; Deucher, Alexander
> ; Clements, John
> ; Zhang, Hawking
> Subject: [PATCH] drm/amdgpu: Fix checking return result of retire page
>
Video demonstration: https://youtu.be/3nkvUeB0GSw
How looks kernel traces.
1.
[ 7315.156460] amdgpu :0b:00.0: amdgpu: [mmhub] page fault
(src_id:0 ring:0 vmid:6 pasid:32779, for process obs pid 23963 thread
obs:cs0 pid 23977)
[ 7315.156490] amdgpu :0b:00.0: amdgpu: in page starting at
a
Hi Dave, Daniel,
Same PR as last week plus a few accumulated fixes, rebased on drm-next
to resolve the dependencies between ttm and scheduler with changes in amdgpu.
The following changes since commit c103b850721e4a79ff9578f131888129c37a4679:
Merge tag 'drm-misc-next-2021-04-09' of
git://anon
Extend current implementation of SG_TABLE construction method to
allow exportation of sub-buffers of a VRAM BO. This capability will
enable logical partitioning of a VRAM BO into multiple non-overlapping
sub-buffers. One example of this use case is to partition a VRAM BO
into two sub-buffers, one f
It curious why ffmpeg does not cause such issues.
For example such command not cause kernel panic:
$ ffmpeg -f x11grab -framerate 60 -video_size 3840x2160 -i :0.0 -vf
'format=nv12,hwupload' -vaapi_device /dev/dri/renderD128 -vcodec
h264_vaapi output3.mp4
What command are you using to see the iss
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Kevin Wang
Best Regards,
Kevin
From: amd-gfx on behalf of Kent Russell
Sent: Tuesday, April 13, 2021 12:01 AM
To: amd-gfx@lists.freedesktop.org
Cc: Russell, Kent
Subject: [PATCH] drm/amdgpu:
On 2021-04-12 2:23 p.m., Christian König wrote:
Am 12.04.21 um 20:18 schrieb Andrey Grodzovsky:
On 2021-04-12 2:05 p.m., Christian König wrote:
Am 12.04.21 um 20:01 schrieb Andrey Grodzovsky:
On 2021-04-12 1:44 p.m., Christian König wrote:
Am 12.04.21 um 19:27 schrieb Andrey Grodzovsky:
Add emit mem sync callback for sdma_v5_2
Signed-off-by: Jinzhou Su
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 28 ++
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
index 93f826a7d3f0..b1a
On Tue, Apr 13, 2021 at 02:23:00PM +0800, Su, Jinzhou (Joe) wrote:
> Add emit mem sync callback for sdma_v5_2
I suggest to describe the problem you encountered for this change, most of
persons would like to know how.
With that fixed, patch is Reviewed-by: Huang Rui
>
> Signed-off-by: Jinzhou
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