[PATCH] drm/amdgpu: Enable VCN/JPEG CG on aldebaran

[AMD Public Use] Enable clockgating for VCN and JPEG blocks on aldebaran Signed-off-by: Lijo Lazar lijo.la...@amd.com Reviewed-by: Hawking Zhang hawking.zh...@amd.com --- drivers/gpu/drm/amd/amdgpu/soc15.c | 4 ++-- 1 file changed, 2 inserti

[PATCH Review 1/1] drm/amdgpu: fix send ras disable cmd when asic not support ras

cause: It is necessary to send ras disable command to ras-ta to program GB_EDC_MODE to "BYPASS" mode during gfx block ras later init, because the ras capability is disable read from vbios for vega20 gaming, but the ras context is released during ras init process,

Re: [PATCH v8] drm/amd/amdgpu implement tdr advanced mode

Hi Jack, the scheduler changes become to invasive. You should split that patch up into two. The first one to make the scheduler changes and the second one using them in amdgpu. Christian. Am 11.03.21 um 16:37 schrieb Jack Zhang: [Why] Previous tdr design treats the first job in job_timeout

[PATCH 1/1] drm/amdgpu: wrap kiq ring ops with kiq spinlock

KIQ ring is being operated by kfd as well as amdgpu. KFD is using kiq lock, we should the same from amdgpu side as well. Signed-off-by: Nirmoy Das --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

Re: [PATCH 1/1] drm/amdgpu: wrap kiq ring ops with kiq spinlock

Am 12.03.21 um 10:49 schrieb Nirmoy Das: KIQ ring is being operated by kfd as well as amdgpu. KFD is using kiq lock, we should the same from amdgpu side as well. Ah, now I knew which functions you mean. This is not strictly necessary because that stuff is only called during bootup and not late

Re: [PATCH 1/1] drm/amdgpu: wrap kiq ring ops with kiq spinlock

On 3/12/21 10:52 AM, Christian König wrote: Am 12.03.21 um 10:49 schrieb Nirmoy Das: KIQ ring is being operated by kfd as well as amdgpu. KFD is using kiq lock, we should the same from amdgpu side as well. Ah, now I knew which functions you mean. This is not strictly necessary because that s

Re: [PATCH 1/1] drm/amdgpu: wrap kiq ring ops with kiq spinlock

Am 12.03.21 um 11:24 schrieb Nirmoy: On 3/12/21 10:52 AM, Christian König wrote: Am 12.03.21 um 10:49 schrieb Nirmoy Das: KIQ ring is being operated by kfd as well as amdgpu. KFD is using kiq lock, we should the same from amdgpu side as well. Ah, now I knew which functions you mean. This i

Re: [PATCH 1/8] drm/amdgpu: new resource cursor

Any more comments on this set here or otherwise I'm going to push it with just Oaks ack. Thanks, Christian. Am 08.03.21 um 14:40 schrieb Christian König: Allows to walk over the drm_mm nodes in a TTM resource object. Signed-off-by: Christian König Acked-by: Oak Zeng Tested-by: Nirmoy Das -

RE: [PATCH 1/8] drm/amdgpu: new resource cursor

[AMD Public Use] Hi Christian, Reviewed the changes, it looks good to me. Reviewed-by: Arunpravin Thanks, Arun -Original Message- From: Christian König Sent: Friday, March 12, 2021 4:22 PM To: Paneer Selvam, Arunpravin ; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 1/8] drm/amdg

Re: [PATCH 1/8] drm/amdgpu: new resource cursor

Thanks! Going to push that stuff now. Christian. Am 12.03.21 um 12:11 schrieb Paneer Selvam, Arunpravin: [AMD Public Use] Hi Christian, Reviewed the changes, it looks good to me. Reviewed-by: Arunpravin Thanks, Arun -Original Message- From: Christian König Sent: Friday, March 12, 2

Re: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration

Thanks for the comments. This light sbr solution could be applied to other asic as well. In swsmu code, It will check whether the function pointer set_light_sbr is valid before real call the function. So for other asics if the smu apply the same change, just add the ppt function pointer and we w

[PATCH][next] drm/amd/pm: Fix spelling mistake "disble" -> "disable"

From: Colin Ian King There is a spelling mistake in an assert message. Fix it. Signed-off-by: Colin Ian King --- drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/driver

RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration

[AMD Public Use] We want to keep ppt_funcs minimal. Adding everything to ppt_funcs and keeping as NULL is not the right way. Please keep the code to arcturus. Thanks, Lijo From: Liu, Shaoyun Sent: Friday, March 12, 2021 7:21 PM To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org Subject: Re: [PATC

RE: slow boot with 7fef431be9c9 ("mm/page_alloc: place pages to tail in __free_pages_core()")

[AMD Public Use] > -Original Message- > From: David Hildenbrand > Sent: Thursday, March 11, 2021 10:03 AM > To: Deucher, Alexander ; linux- > ker...@vger.kernel.org; amd-gfx list ; > Andrew Morton > Cc: Huang, Ray ; Koenig, Christian > ; Liang, Liang (Leo) ; > Mike Rapoport ; Rafael J. W

[PATCH] drm/amdgpu: update ecc query support for arcturus

arcturus and sienna_cichlid share the same version of umc_info interface (umc_info v33). arcturus uses umc_config to indicate ECC capability, while sienna_cichlid uses umc_config1 to indicate ECC capability. driver needs to check either umc_config or umc_config1 to decide ECC capability for ASICs t

RE: [PATCH] drm/amdgpu: update ecc query support for arcturus

[AMD Official Use Only - Internal Distribution Only] This patch looks good to me Reviewed-by: Frank Min -Original Message- From: Hawking Zhang Sent: Friday, March 12, 2021 10:36 PM To: amd-gfx@lists.freedesktop.org; Min, Frank ; Deucher, Alexander Cc: Zhang, Hawking Subject: [PATCH]

Re: [PATCH] drm/amdgpu: Enable VCN/JPEG CG on aldebaran

[AMD Public Use] Acked-by: Alex Deucher From: amd-gfx on behalf of Lazar, Lijo Sent: Friday, March 12, 2021 3:52 AM To: amd-gfx@lists.freedesktop.org Cc: Xu, Feifei ; Zhang, Hawking Subject: [PATCH] drm/amdgpu: Enable VCN/JPEG CG on aldebaran [AMD Public Us

Re: [PATCH v2] drm/scheduler re-insert Bailing job to avoid memleak

On 2021-03-12 1:50 a.m., Jack Zhang wrote: re-insert Bailing jobs to avoid memory leak. Usually we put a v2:"Blha blha blha" here to explain what was modified in v2 Also - since you make changes to another driver you should add their maintainer and mailing list probably (use ./scripts/get_m

RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration

[AMD Public Use] I don't like to add this set_light_sbr into ppt_funcs either , but please check current swsmu code structure , there is no asic specific swsmu late init function and there is no direct routine form amdgpu_smu.c to smu_v11_0.c either . It requires smu common code ->ppt_fu

RE: slow boot with 7fef431be9c9 ("mm/page_alloc: place pages to tail in __free_pages_core()")

[AMD Public Use] > -Original Message- > From: David Hildenbrand > Sent: Friday, March 12, 2021 9:12 AM > To: Deucher, Alexander ; linux- > ker...@vger.kernel.org; amd-gfx list ; > Andrew Morton > Cc: Huang, Ray ; Koenig, Christian > ; Liang, Liang (Leo) ; > Mike Rapoport ; Rafael J. Wyso

Re: slow boot with 7fef431be9c9 ("mm/page_alloc: place pages to tail in __free_pages_core()")

On 12.03.21 15:06, Deucher, Alexander wrote: [AMD Public Use] -Original Message- From: David Hildenbrand Sent: Thursday, March 11, 2021 10:03 AM To: Deucher, Alexander ; linux- ker...@vger.kernel.org; amd-gfx list ; Andrew Morton Cc: Huang, Ray ; Koenig, Christian ; Liang, Liang (Leo)

Re: slow boot with 7fef431be9c9 ("mm/page_alloc: place pages to tail in __free_pages_core()")

8G (with some carve out for the integrated GPU). [0.044181] Memory: 6858688K/7200304K available (14345K kernel code, 9659K rwdata, 4980K rodata, 2484K init, 12292K bss, 341360K reserved, 0K cma-reserved) Nothing particularly special about these systems that I am aware of. I'll see if we ca

RE: slow boot with 7fef431be9c9 ("mm/page_alloc: place pages to tail in __free_pages_core()")

[AMD Public Use] > -Original Message- > From: David Hildenbrand > Sent: Friday, March 12, 2021 10:48 AM > To: Deucher, Alexander ; linux- > ker...@vger.kernel.org; amd-gfx list ; > Andrew Morton ; Liang, Liang (Leo) > > Cc: Huang, Ray ; Koenig, Christian > ; Mike Rapoport ; > Rafael J. W

Re: [PATCH]] drm/amdgpu/gfx9: add gfxoff quirk

On Thu, 11 Mar 2021 at 21:00, Daniel Gomez wrote: > On Thu, 11 Mar 2021 at 17:10, Alex Deucher wrote: > > > > On Thu, Mar 11, 2021 at 10:02 AM Alexandre Desnoyers > wrote: > > > > > > On Thu, Mar 11, 2021 at 2:49 PM Daniel Gomez wrote: > > > > > > > > On Thu, 11 Mar 2021 at 10:09, Daniel Gomez

Re: slow boot with 7fef431be9c9 ("mm/page_alloc: place pages to tail in __free_pages_core()")

On 12.03.21 17:19, Liang, Liang (Leo) wrote: [AMD Public Use] Dmesg attached. So, looks like the "real" slowdown starts once the buddy is up and running (no surprise). [0.044035] Memory: 6856724K/7200304K available (14345K kernel code, 9699K rwdata, 5276K rodata, 2628K init, 12104K b

RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration

[AMD Public Use] Looks like this can be handled during post_init. It will be called as smu_post_init() happening during late_init part of smu block. You can check vangogh or navi examples on how to add your implementation. Thanks, Lijo From: Liu, Shaoyun Sent: Friday, March 12, 2021 8:57 PM T

[PATCH 1/1] drm/amdgpu: wrap kiq ring ops with kiq spinlock

KIQ ring is being operated by kfd as well as amdgpu. KFD is using kiq lock, we should the same from amdgpu side as well. Signed-off-by: Nirmoy Das --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/

RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration

[AMD Public Use] Hi , Lijo For now we only enable this light sbr feature for SMU on XGMI + passthrough for Arcturus since this is the use case our customer is required and we only verified in this configuration . I feel it's more reasonable to keep the logic of enable/disable in amdgpu sid

RE: amdgpu, WARNING: CPU: 12 PID: 389 at arch/x86/kernel/fpu/core.c:129 kernel_fpu_begin_mask+0xd5/0x100

[AMD Public Use] > -Original Message- > From: Borislav Petkov > Sent: Friday, March 12, 2021 1:15 PM > To: amd-gfx@lists.freedesktop.org > Cc: Wentland, Harry ; Li, Sun peng (Leo) > ; Deucher, Alexander > ; Koenig, Christian > ; lkml ; x86-ml > > Subject: amdgpu, WARNING: CPU: 12 PID: 38

amdgpu, WARNING: CPU: 12 PID: 389 at arch/x86/kernel/fpu/core.c:129 kernel_fpu_begin_mask+0xd5/0x100

Hi folks, I get the below on -rc2+tip/master. I added printks to your FPU macros: --- diff --git a/drivers/gpu/drm/amd/display/dc/os_types.h b/drivers/gpu/drm/amd/display/dc/os_types.h index 126c2f3a4dd3..49629dc03f99 100644 --- a/drivers/gpu/drm/amd/display/dc/os_types.h +++ b/drivers/gpu/drm/a

Re: amdgpu, WARNING: CPU: 12 PID: 389 at arch/x86/kernel/fpu/core.c:129 kernel_fpu_begin_mask+0xd5/0x100

On Fri, Mar 12, 2021 at 06:20:25PM +, Deucher, Alexander wrote: > Should be fixed with these patches: > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=15e8b95d5f7509e0b09289be8c422c459c9f0412 > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/com

[PATCH 1/2] drm/amd/pm: add a new sysfs entries for default power limit

Driver doesn't keep the default bootup power limit and expose it to user. As requested, we add it in driver. Signed-off-by: Eric Huang --- drivers/gpu/drm/amd/pm/amdgpu_pm.c| 43 ++- drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 2 + drivers/gpu/drm/amd/pm/inc/smu_

[PATCH 2/2] drm/amd/pm: fix incorrect default power limit in powerplay

There is no difference betweeen max and default to get power limit in powerplay, adding a new parameter in the funciton fixes it. Signed-off-by: Eric Huang --- drivers/gpu/drm/amd/include/kgd_pp_interface.h | 3 ++- drivers/gpu/drm/amd/pm/amdgpu_pm.c | 12 drivers/g

[PATCH 2/2] drm/amdgpu: Introduce new SETUP_TMR interface

This new interface passes both virtual and physical address to PSP. It is backword compatible with old interface. Signed-off-by: Oak Zeng --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 13 ++--- drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 11 ++- 2 files changed, 20 insertions(+), 4

[PATCH 1/2] Revert "drm/amdgpu: workaround the TMR MC address issue (v2)"

This reverts commit 34a33d4683cba7ba63c894132efb1998c0217631. Signed-off-by: Oak Zeng --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 9 - drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 10 -- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 21 ++--- drivers/gpu/drm/amd/am

[PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration

This is to fix the commit dda9bbb26c7 where it only enable the light SMU on normal device init. This feature actually need to be enabled after ASIC been reset as well. Signed-off-by: shaoyunl Change-Id: Ie7ee02cd3ccdab3522aad9a02f681963e211ed44 --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9

Re: [PATCH] drm/amdgpu: Mark mmhub_v1_7_setup_vm_pt_regs() as static

[AMD Official Use Only - Internal Distribution Only] Thank you Joarder for the fix. But this has already been fixed in our Alex's drm-next branch. Regards, Oak On 2021-03-12, 5:19 PM, "Souptick Joarder" wrote: Kernel test robot throws below warning -> drivers/gpu/drm/amd/amdgpu/mm

[PATCH 2/2] drm/amdkfd: Fix resource cursor initialization

Make sure the cur->size doesn't exceed cur->remaining. Otherwise the first call to amdgpu_res_next will trigger the BUG_ON in that function. Fixes: 3af0a018a728 ("drm/amdgpu: new resource cursor") CC: Christian König Signed-off-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor

[PATCH 1/2] drm/amdkfd: Fix recursive lock warnings

memalloc_nofs_save/restore are no longer sufficient to prevent recursive lock warnings when holding locks that can be taken in MMU notifiers. Use memalloc_noreclaim_save/restore instead. Fixes: f920e413ff9c ("mm: track mmu notifiers in fs_reclaim_acquire/release") Signed-off-by: Felix Kuehling --

[PATCH 0/2] Two bugs found while rebasing my HMM branch

Felix Kuehling (2): drm/amdkfd: Fix recursive lock warnings drm/amdkfd: Fix resource cursor initialization drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) -- 2.30.2 __

RE: slow boot with 7fef431be9c9 ("mm/page_alloc: place pages to tail in __free_pages_core()")

[AMD Public Use] Hi David, Which benchmark tool you prefer? Memtest86+ or else? BRs, Leo -Original Message- From: David Hildenbrand Sent: Saturday, March 13, 2021 12:47 AM To: Liang, Liang (Leo) ; Deucher, Alexander ; linux-ker...@vger.kernel.org; amd-gfx list ; Andrew Morton Cc: Hu