[AMD Official Use Only - Internal Distribution Only]
Hi Harry,
Checked Lee Starnes's patch. It does not fix the issue but does preserve the
tradition of assigning the number of probed modes to aconnector->num_modes,
which appears elsewhere in AMD code. I observed in some cases the memory leak
[AMD Official Use Only - Internal Distribution Only]
Submitting patch to add UMC into IP discovery mapping.
Thank you,
John Clements
0001-drm-amdgpu-add-UMC-to-ip-discovery-map.patch
Description: 0001-drm-amdgpu-add-UMC-to-ip-discovery-map.patch
___
a
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
From: Clements, John
Sent: Wednesday, November 11, 2020 16:54
To: amd-gfx@lists.freedesktop.org; Zhang, Hawking
Subject: [PATCH] drm/amdgpu: add UMC to ip discovery map
[AMD Official Use Only - Internal Distribution Only]
Submitti
Hi
Am 10.11.20 um 16:27 schrieb Ruhl, Michael J:
>
>
>> -Original Message-
>> From: Thomas Zimmermann
>> Sent: Tuesday, November 10, 2020 8:37 AM
>> To: bske...@redhat.com; airl...@linux.ie; dan...@ffwll.ch; Ruhl, Michael J
>> ; christian.koe...@amd.com
>> Cc: nouv...@lists.freedesktop.
Hi, Thomas:
Thomas Zimmermann 於 2020年11月9日 週一 下午6:32寫道:
>
> Fixes a build failure with mediatek.
>
> This change was supposed to be part of commit 49a3f51dfeee ("drm/gem:
> Use struct dma_buf_map in GEM vmap ops and convert GEM backends"), but
> mediatek was forgotten.
Acked-by: Chun-Kuang Hu
On 11/10/20 12:59 PM, Greg KH wrote:
On Tue, Nov 10, 2020 at 12:54:21PM -0500, Andrey Grodzovsky wrote:
Hi, back to this after a long context switch for some higher priority stuff.
So here I was able eventually to drop all this code and this change here
https://nam11.safelinks.protection.out
On Wed, Nov 11, 2020 at 10:13:13AM -0500, Andrey Grodzovsky wrote:
>
> On 11/10/20 12:59 PM, Greg KH wrote:
> > On Tue, Nov 10, 2020 at 12:54:21PM -0500, Andrey Grodzovsky wrote:
> > > Hi, back to this after a long context switch for some higher priority
> > > stuff.
> > >
> > > So here I was ab
On 11/11/20 10:34 AM, Greg KH wrote:
On Wed, Nov 11, 2020 at 10:13:13AM -0500, Andrey Grodzovsky wrote:
On 11/10/20 12:59 PM, Greg KH wrote:
On Tue, Nov 10, 2020 at 12:54:21PM -0500, Andrey Grodzovsky wrote:
Hi, back to this after a long context switch for some higher priority stuff.
So here
On Wed, Nov 11, 2020 at 10:45:53AM -0500, Andrey Grodzovsky wrote:
>
> On 11/11/20 10:34 AM, Greg KH wrote:
> > On Wed, Nov 11, 2020 at 10:13:13AM -0500, Andrey Grodzovsky wrote:
> > > On 11/10/20 12:59 PM, Greg KH wrote:
> > > > On Tue, Nov 10, 2020 at 12:54:21PM -0500, Andrey Grodzovsky wrote:
>
[AMD Official Use Only - Internal Distribution Only]
Series is:
Reviewed-by: Alex Deucher
From: Du, Xiaojian
Sent: Tuesday, November 10, 2020 10:04 PM
To: amd-gfx@lists.freedesktop.org
Cc: Huang, Ray ; Huang, Shimmer ;
Quan, Evan ; Deucher, Alexander ;
Du, Xia
>-Original Message-
>From: Thomas Zimmermann
>Sent: Wednesday, November 11, 2020 7:08 AM
>To: Ruhl, Michael J ; bske...@redhat.com;
>airl...@linux.ie; dan...@ffwll.ch; christian.koe...@amd.com
>Cc: nouv...@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>Maarten Lankhorst ; Maxime
On 11/11/20 11:06 AM, Greg KH wrote:
On Wed, Nov 11, 2020 at 10:45:53AM -0500, Andrey Grodzovsky wrote:
On 11/11/20 10:34 AM, Greg KH wrote:
On Wed, Nov 11, 2020 at 10:13:13AM -0500, Andrey Grodzovsky wrote:
On 11/10/20 12:59 PM, Greg KH wrote:
On Tue, Nov 10, 2020 at 12:54:21PM -0500, Andre
[AMD Official Use Only - Internal Distribution Only]
Are there any other IP mappings that are missing? Maybe just add them all to
avoid problems if there are other IPs we need to access in the future.
Alex
From: amd-gfx on behalf of Clements,
John
Sent: Wedn
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/si.c:4186:6: warning: no previous prototype for
‘si_vram_gtt_location’ [-Wmissing-prototypes]
4186 | void si_vram_gtt_location(struct radeon_device *rdev,
| ^~~~
drivers/gpu/drm/radeon/si.c:5186:6: warning
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/ni.c:1733:5: warning: no previous prototype for
‘cayman_gpu_check_soft_reset’ [-Wmissing-prototypes]
1733 | u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev)
| ^~~
Cc: Alex Deucher
Cc: "
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/si_dpm.c:3802:4: warning: no previous prototype for
‘si_get_ddr3_mclk_frequency_ratio’ [-Wmissing-prototypes]
3802 | u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
| ^~~~
drivers/gpu/drm
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/si.c:3768:5: warning: no previous prototype for
‘si_gpu_check_soft_reset’ [-Wmissing-prototypes]
3768 | u32 si_gpu_check_soft_reset(struct radeon_device *rdev)
| ^~~
Cc: Alex Deucher
Cc: "Christian Kö
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/si.c:1570:5: warning: no previous prototype for
‘si_mc_load_microcode’ [-Wmissing-prototypes]
Cc: Alex Deucher
Cc: "Christian König"
Cc: David Airlie
Cc: Daniel Vetter
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lis
This set is part of a larger effort attempting to clean-up W=1
kernel builds, which are currently overwhelmingly riddled with
niggly little warnings.
This finishes cleaning up Radeon. AMD next!
Lee Jones (19):
drm/radeon/evergreen_dma: Move 'evergreen_gpu_check_soft_reset()'s
prototype to
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/vce_v1_0.c:102:6: warning: no previous prototype for
‘vce_v1_0_enable_mgcg’ [-Wmissing-prototypes]
102 | void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable)
| ^~~~
Cc: Alex Deucher
Cc: "Chr
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/atombios_encoders.c:2721:1: warning: no previous
prototype for ‘radeon_add_atom_encoder’ [-Wmissing-prototypes]
2721 | radeon_add_atom_encoder(struct drm_device *dev,
| ^~~
Cc: Alex Deucher
Cc: "Chris
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/vce_v2_0.c:111:6: warning: no previous prototype for
‘vce_v2_0_enable_mgcg’ [-Wmissing-prototypes]
111 | void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable)
| ^~~~
Cc: Alex Deucher
Cc: "Chr
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/si.c:5678:5: warning: no previous prototype for
‘si_get_csb_size’ [-Wmissing-prototypes]
5678 | u32 si_get_csb_size(struct radeon_device *rdev)
| ^~~
drivers/gpu/drm/radeon/si.c:5710:6: warning: no previous pr
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/cik.c:4845:5: warning: no previous prototype for
‘cik_gpu_check_soft_reset’ [-Wmissing-prototypes]
4845 | u32 cik_gpu_check_soft_reset(struct radeon_device *rdev)
| ^~~~
Cc: Alex Deucher
Cc: "Christia
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/atombios_encoders.c:186:6: warning: no previous
prototype for ‘radeon_atom_backlight_init’ [-Wmissing-prototypes]
186 | void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
| ^~
C
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/cik.c:6413:6: warning: no previous prototype for
‘cik_init_cp_pg_table’ [-Wmissing-prototypes]
6413 | void cik_init_cp_pg_table(struct radeon_device *rdev)
| ^~~~
drivers/gpu/drm/radeon/cik.c:6670:5: warni
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/evergreen.c:3825:5: warning: no previous prototype for
‘evergreen_gpu_check_soft_reset’ [-Wmissing-prototypes]
3825 | u32 evergreen_gpu_check_soft_reset(struct radeon_device *rdev)
| ^~
Cc: Ale
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/rv770_dpm.c:62:30: warning: no previous prototype for
‘evergreen_get_pi’ [-Wmissing-prototypes]
62 | struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev)
| ^~~~
Cc: Alex Deucher
Cc: "Chri
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/cik_sdma.c:331:6: warning: no previous prototype for
‘cik_sdma_enable’ [-Wmissing-prototypes]
331 | void cik_sdma_enable(struct radeon_device *rdev, bool enable)
| ^~~
drivers/gpu/drm/radeon/cik_sdma.c:528:5:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/evergreen.c:4380:5: warning: no previous prototype for
‘evergreen_rlc_resume’ [-Wmissing-prototypes]
4380 | int evergreen_rlc_resume(struct radeon_device *rdev)
| ^~~~
Cc: Alex Deucher
Cc: "Christian Köni
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/r600_cs.c:2343:5: warning: no previous prototype for
‘r600_dma_cs_next_reloc’ [-Wmissing-prototypes]
2343 | int r600_dma_cs_next_reloc(struct radeon_cs_parser *p,
| ^~
Cc: Alex Deucher
Cc: "Christian
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/cik.c:1868:5: warning: no previous prototype for
‘ci_mc_load_microcode’ [-Wmissing-prototypes]
1868 | int ci_mc_load_microcode(struct radeon_device *rdev)
| ^~~~
drivers/gpu/drm/radeon/cik.c:5847:6: warnin
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/dce6_afmt.c:32:5: warning: no previous prototype for
‘dce6_endpoint_rreg’ [-Wmissing-prototypes]
32 | u32 dce6_endpoint_rreg(struct radeon_device *rdev,
| ^~
drivers/gpu/drm/radeon/dce6_afmt.c:46:6: warnin
This allows us to enable dec software ring feature on VCN.
The default is 0 for all asics, and it is only valid for
asics with vcn3.0 and above.
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 8
Add vcn software ring decode ring test and decode ib test.
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 138 ++--
1 file changed, 132 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b
Add macro, structure and function prototype to
support dec vcn software ring.
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
b/
Support software ring share memory with vcn firmware.
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 35 +++
1 file changed, 31 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers
Add dec software ring vm functions to support.
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 100 +-
1 file changed, 98 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/dr
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 2b0a2b93994b..74cbaf212698 100644
--- a/drivers/gpu/drm/amd/amd
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 03e88dbf92be..edd2d6bd1d86 100644
--- a/drivers/gpu/drm
Add vcn software ring decode ring test and decode ib test.
v2: clear compilation warning.
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 135 ++--
1 file changed, 129 insertions(+), 6 deletions(-)
diff --git a/drivers/gp
On Thu, 12 Nov 2020 at 02:27, Ruhl, Michael J wrote:
>
> >-Original Message-
> >From: Thomas Zimmermann
> >Sent: Wednesday, November 11, 2020 7:08 AM
> >To: Ruhl, Michael J ; bske...@redhat.com;
> >airl...@linux.ie; dan...@ffwll.ch; christian.koe...@amd.com
> >Cc: nouv...@lists.freedeskto
On 6/22/20 5:48 AM, Daniel Vetter wrote:
On Sun, Jun 21, 2020 at 02:03:04AM -0400, Andrey Grodzovsky wrote:
Some of the stuff in amdgpu_device_fini such as HW interrupts
disable and pending fences finilization must be done right away on
pci_remove while most of the stuff which relates to finil
[AMD Public Use]
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Tuesday, November 3, 2020 7:29 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH 2/8] drm/amdgpu: drop leading zeros from the gmc9 fault address
The address space is only 48bit, not 64bit. And the VM
[AMD Public Use]
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Tuesday, November 3, 2020 7:29 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH 3/8] drm/amdgpu: cleanup gmc_v10_0_process_interrupt a bit
Return early in case of a ratelimit and don't print leading
The new amdgpu_gfx_state_change_set() funtion can support set GFX power
change status to D0/D3.
Signed-off-by: Prike Liang
Acked-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 20
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
add amdgpu_acpi_is_s0ix_supported() to check the platform
whether support s0i3.
Signed-off-by: Prike Liang
Reviewed-by: Alex Deucher
Acked-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 14 ++
2 files changed, 16 inser
update amdgpu device suspend sequence for gpu reset during s0i3 enable.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgp
- Need skip the RLC/CP/GFX disable for let GFXOFF enter during suspend period.
- For s0i3 suspend only need suspend DCE and each IP interrupt.
- Before VBIOS POSTed check and atom HW INT need set the GPU power status change
to D0 in the resume period, otherwise the HW will be mess up and see the
The gfx_state_change_set() funtion can support set GFX power
change status to D0/D3.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 3 +++
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 2 ++
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 ++
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