The power/performance control strategy is specific for vcn use case.
Then this can optimize the power/performance when the workload is on vcn.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers
[AMD Public Use]
Submitting patch to resolve ASD fw loading issue on ASIC with ta header v2
Thank you,
John Clements
0001-drm-amdgpu-resolved-ASD-loading-issue-on-sienna.patch
Description: 0001-drm-amdgpu-resolved-ASD-loading-issue-on-sienna.patch
___
On Mon, Nov 02, 2020 at 09:48:25PM +0100, Christian König wrote:
> Am 03.11.20 um 07:53 schrieb Greg KH:
> > On Mon, Nov 02, 2020 at 09:06:21PM +0100, Christian König wrote:
> > > Am 02.11.20 um 20:43 schrieb Alex Deucher:
> > > > On Mon, Nov 2, 2020 at 1:42 PM Deepak R Varma
> > > > wrote:
> > >
On Mon, Nov 02, 2020 at 09:06:21PM +0100, Christian König wrote:
> Am 02.11.20 um 20:43 schrieb Alex Deucher:
> > On Mon, Nov 2, 2020 at 1:42 PM Deepak R Varma wrote:
> > > Initializing global variable to 0 or NULL is not necessary and should
> > > be avoided. Issue reported by checkpatch script a
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
From: Clements, John
Sent: Tuesday, November 3, 2020 16:09
To: amd-gfx list ; Zhang, Hawking
Subject: [PATCH] drm/amdgpu: resolved ASD loading issue on sienna
[AMD Public Use]
Submitting patch to resolve ASD fw loading issue on A
On Mon, Nov 2, 2020 at 9:39 PM Kenny Ho wrote:
>
> Thanks for the reply.
pls don't top post.
> Cgroup awareness is desired because the intent
> is to use this for resource management as well (potentially along with
> other cgroup controlled resources.) I will dig into bpf_lsm and learn
> more a
On Mon, Nov 02, 2020 at 05:33:14PM -0500, Alex Deucher wrote:
> On Thu, Oct 29, 2020 at 6:14 PM Nathan Chancellor
> wrote:
> >
> > On Fri, Oct 16, 2020 at 12:50:04PM -0400, Alex Deucher wrote:
> > > Avoids confusion in configurations.
> > >
> > > Signed-off-by: Alex Deucher
> >
> > This patch cau
From: Greg KH
> Sent: 02 November 2020 20:11
>
> On Mon, Nov 02, 2020 at 02:43:45PM -0500, Alex Deucher wrote:
> > On Mon, Nov 2, 2020 at 1:42 PM Deepak R Varma wrote:
> > >
> > > Initializing global variable to 0 or NULL is not necessary and should
> > > be avoided. Issue reported by checkpatch
On Mon, Nov 02, 2020 at 02:23:02PM -0500, Kenny Ho wrote:
> Adding a few more emails from get_maintainer.pl and bumping this
> thread since there hasn't been any comments so far. Is this too
> crazy? Am I missing something fundamental?
sorry for delay. Missed it earlier. Feel free to ping the ma
comment inline.
From: amd-gfx on behalf of Kenneth Feng
Sent: Tuesday, November 3, 2020 4:07 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth
Subject: [PATCH] drm/amd/amdgpu: specify the power strategy for vcn use
The power/performance control strategy
GFXOFF has been supported by PMFW, enable it directly in driver for
dimgrey_cavefish.
Signed-off-by: Tao Zhou
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/
Am 03.11.20 um 08:53 schrieb Greg KH:
On Mon, Nov 02, 2020 at 09:48:25PM +0100, Christian König wrote:
Am 03.11.20 um 07:53 schrieb Greg KH:
On Mon, Nov 02, 2020 at 09:06:21PM +0100, Christian König wrote:
Am 02.11.20 um 20:43 schrieb Alex Deucher:
On Mon, Nov 2, 2020 at 1:42 PM Deepak R Varm
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Zhou1, Tao
Sent: Tuesday, November 3, 2020 16:20
To: Chen, Jiansong (Simon) ; Gui, Jack
; Zhang, Hawking ;
amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao
Subject: [PATCH] drm/amdgpu: enable GFXOFF fo
GEM's vmap and vunmap interfaces now wrap memory pointers in struct
dma_buf_map.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Tested-by: Sam Ravnborg
---
drivers/gpu/drm/drm_client.c | 18 +++---
drivers/gpu/drm/drm_gem.c | 26 +-
drive
Kernel DRM clients now store their framebuffer address in an instance
of struct dma_buf_map. Depending on the buffer's location, the address
refers to system or I/O memory.
Callers of drm_client_buffer_vmap() receive a copy of the value in
the call's supplied arguments. It can be accessed and modi
The parameters map and is_iomem are always of the same value. Removed them
to prepares the function for conversion to struct dma_buf_map.
v4:
* don't check for !kmap->virtual; will always be false
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Reviewed-by: Christian König
The function drm_gem_cma_prime_vunmap() is empty. Remove it before
changing the interface to use struct drm_buf_map.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Christian König
Tested-by: Sam Ravnborg
---
drivers/gpu/drm/drm_gem_cma_helper.c | 17 -
drivers/gpu/drm/vc4/vc4_bo
DRM's fbdev console uses regular load and store operations to update
framebuffer memory. The bochs driver on sparc64 requires the use of
I/O-specific load and store operations. We have a workaround, but need
a long-term solution to the problem.
This patchset changes GEM's vmap/vunmap interfaces to
The function etnaviv_gem_prime_vunmap() is empty. Remove it before
changing the interface to use struct drm_buf_map.
Signed-off-by: Thomas Zimmermann
Acked-by: Christian König
Tested-by: Sam Ravnborg
---
drivers/gpu/drm/etnaviv/etnaviv_drv.h | 1 -
drivers/gpu/drm/etnaviv/etnaviv_gem.c
The functions exynos_drm_gem_prime_{vmap,vunmap}() are empty. Remove
them before changing the interface to use struct drm_buf_map. As a side
effect of removing drm_gem_prime_vmap(), the error code changes from
ENOMEM to EOPNOTSUPP.
Signed-off-by: Thomas Zimmermann
Acked-by: Christian König
Teste
This patch replaces the vmap/vunmap's use of raw pointers in GEM object
functions with instances of struct dma_buf_map. GEM backends are
converted as well. For most of them, this simply changes the returned type.
TTM-based drivers now return information about the location of the memory,
either sys
The new functions ttm_bo_{vmap,vunmap}() map and unmap a TTM BO in kernel
address space. The mapping's address is returned as struct dma_buf_map.
Each function is a simplified version of TTM's existing kmap code. Both
functions respect the memory's location ani/or writecombine flags.
On top TTM's
At least sparc64 requires I/O-specific access to framebuffers. This
patch updates the fbdev console accordingly.
For drivers with direct access to the framebuffer memory, the callback
functions in struct fb_ops test for the type of memory and call the rsp
fb_sys_ of fb_cfb_ functions. Read and wri
To do framebuffer updates, one needs memcpy from system memory and a
pointer-increment function. Add both interfaces with documentation.
v5:
* include to build on sparc64 (Sam)
Signed-off-by: Thomas Zimmermann
Reviewed-by: Sam Ravnborg
Tested-by: Sam Ravnborg
---
include/linux/dma-bu
Am 02.11.20 um 20:58 schrieb Christian König:
Am 02.11.20 um 19:59 schrieb Felix Kuehling:
Am 2020-11-02 um 1:53 p.m. schrieb Alex Deucher:
On Mon, Nov 2, 2020 at 6:34 AM Christian König
wrote:
Seems like we won't get the hardware IH1/2 rings on Vega20 working.
Signed-off-by: Christian König
The address space is only 48bit, not 64bit. And the VMHUBs work with
sign extended addresses.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/
Seems like we won't get the hardware IH1/2 rings on Vega20 working.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 407c6093
Add a soft IH ring implementation similar to the hardware IH1/2.
This can be used if the hardware delegation of interrupts to IH1/2
doesn't work for some reason.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c | 29
drivers/gpu/drm/amd/amdgpu/amdg
Return early in case of a ratelimit and don't print leading zeros for
the address.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 38 ++
1 file changed, 20 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/
Looks like we can't enabled the IH1/IH2 feature for Vega20, make sure
retry faults are handled on a separate ring anyway.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 31 ---
1 file changed, 23 insertions(+), 8 deletions(-)
diff --git a/driv
Same as gmc9, basically filter the fault, reroute or handle it.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.
The value is inclusive, not exclusive.
Signed-off-by: Christian König
Reviewed-by: Felix Kuehling
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/a
Felix pointed out that we need this for Navi as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index 837769fcb35b..ce0a02a4
That should be harmless and we can fix that up. Does everything work as
expected other than the error message?
Alex
From: Yin, Tianci (Rico)
Sent: Monday, November 2, 2020 9:51 PM
To: Alex Deucher ; Deucher, Alexander
Cc: Zhang, Hawking ; amd-gfx@lists.freede
On 2020-11-02 5:28 p.m., Alex Deucher wrote:
Add proper FP_START/END handling and adjust Makefiles per
previous asics.
Signed-off-by: Alex Deucher
Reviewed-by: Harry Wentland
Harry
---
.../gpu/drm/amd/display/dc/clk_mgr/Makefile | 13
.../drm/amd/display/dc/dcn30/dcn30_resource.
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Kevin Wang
Sent: Tuesday, November 3, 2020 12:54 AM
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Kevin(Yang) ; Feng, Kenneth
Subject: [PATCH] drm/amdgpu: update module paramter doc of amdgpu_dpm
the vega20
[AMD Public Use]
> -Original Message-
> From: Greg KH
> Sent: Tuesday, November 3, 2020 1:53 AM
> To: Koenig, Christian
> Cc: Alex Deucher ; Deepak R Varma
> ; David Airlie ; LKML ker...@vger.kernel.org>; Maling list - DRI developers de...@lists.freedesktop.org>; Melissa Wen ;
> amd-gf
Am 2020-10-08 um 1:15 p.m. schrieb Gang Ba:
> Determine FRAMEBUFFER_PUBLIC/PRIVATE only based host-accessibility,
> not peer-accesssibility
>
> Signed-off-by: Gang Ba
Reviewed-by: Felix Kuehling
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 20 +++-
> 1 file changed, 7
On Tue, Nov 03, 2020 at 02:50:40PM +, Deucher, Alexander wrote:
> [AMD Public Use]
>
> > -Original Message-
> > From: Greg KH
> > Sent: Tuesday, November 3, 2020 1:53 AM
> > To: Koenig, Christian
> > Cc: Alex Deucher ; Deepak R Varma
> > ; David Airlie ; LKML > ker...@vger.kernel.or
Am 2020-11-03 um 8:58 a.m. schrieb Christian König:
> Add a soft IH ring implementation similar to the hardware IH1/2.
>
> This can be used if the hardware delegation of interrupts to IH1/2
> doesn't work for some reason.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/amdgp
Am 03.11.20 um 17:00 schrieb Felix Kuehling:
Am 2020-11-03 um 8:58 a.m. schrieb Christian König:
Add a soft IH ring implementation similar to the hardware IH1/2.
This can be used if the hardware delegation of interrupts to IH1/2
doesn't work for some reason.
Signed-off-by: Christian König
---
Please review.
Thanks,
Marek
From 7689a66cab63ea9adbfcd4c58d9b271b5df08297 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?=
Date: Tue, 3 Nov 2020 11:05:25 -0500
Subject: [PATCH] drm/amdgpu: set LDS_CONFIG=0x20 on Navy Flounder to fix a GPU
hang
MIME-Version: 1.0
Content-Type: t
This patch limits the ref_div_max value to 100, during the
calculation of PLL feedback reference divider. With current
value (128), the produced fb_ref_div value generates unstable
output at particular frequencies. Radeon driver limits this
value at 100.
On Oland, when we try to setup mode 2048x12
On 2020-11-02 5:28 p.m., Alex Deucher wrote:
Add proper FP_START/END handling and adjust Makefiles per
previous asics.
Signed-off-by: Alex Deucher
Reviewed-by: Nicholas Kazlauskas
Regards,
Nicholas Kazlauskas
---
.../gpu/drm/amd/display/dc/clk_mgr/Makefile | 13
.../drm/amd/disp
Updated patch.
Thanks,
Marek
On Tue, Nov 3, 2020 at 11:10 AM Marek Olšák wrote:
> Please review.
>
> Thanks,
> Marek
>
From c90a4b6a170dbeb1d2912612d842d2a8a7476eed Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?=
Date: Tue, 3 Nov 2020 11:05:25 -0500
Subject: [PATCH] drm/amdg
Add proper FP_START/END handling and adjust Makefiles per
previous asics.
v2: fix up harder.
Reviewed-by: Harry Wentland (v1)
Reviewed-by: Nicholas Kazlauskas (v1)
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/clk_mgr/Makefile | 13
.../display/dc/clk_mgr/dcn30/dcn30_clk_m
On Mon, Nov 2, 2020 at 8:01 PM Nathan Chancellor
wrote:
>
> On Mon, Nov 02, 2020 at 05:33:14PM -0500, Alex Deucher wrote:
> > On Thu, Oct 29, 2020 at 6:14 PM Nathan Chancellor
> > wrote:
> > >
> > > On Fri, Oct 16, 2020 at 12:50:04PM -0400, Alex Deucher wrote:
> > > > Avoids confusion in configur
Acked-by: Alex Deucher
On Tue, Nov 3, 2020 at 12:18 PM Marek Olšák wrote:
>
> Updated patch.
>
> Thanks,
> Marek
>
> On Tue, Nov 3, 2020 at 11:10 AM Marek Olšák wrote:
>>
>> Please review.
>>
>> Thanks,
>> Marek
>
> ___
> amd-gfx mailing list
> amd-gf
On Tue, Nov 3, 2020 at 12:43 AM Alexei Starovoitov
wrote:
> On Mon, Nov 2, 2020 at 9:39 PM Kenny Ho wrote:
> pls don't top post.
My apology.
> > Cgroup awareness is desired because the intent
> > is to use this for resource management as well (potentially along with
> > other cgroup controlled r
Am 2020-11-02 um 10:10 p.m. schrieb Ramesh Errabolu:
> [Why]
> Allow user to know number of compute units (CU) that are in use at any
> given moment.
>
> [How]
> Remove the keyword static for the method kgd_gfx_v9_get_cu_occupancy
>
> Signed-off-by: Ramesh Errabolu
Reviewed-by: Felix Kuehling
Hi folks.
I observed hard reproductible the set of bugs.
It always started as
1) kworker/u64:2: page allocation failure: order:5,
mode:0x40dc0(GFP_KERNEL|__GFP_COMP|__GFP_ZERO),
nodemask=(null),cpuset=/,mems_allowed=0
Continious as:
2) WARNING: CPU: 21 PID: 806649 at
drivers/gpu/drm/amd/amdgpu/../d
On Tue, Nov 03, 2020 at 12:41:27PM -0500, Alex Deucher wrote:
> On Mon, Nov 2, 2020 at 8:01 PM Nathan Chancellor
> wrote:
> >
> > On Mon, Nov 02, 2020 at 05:33:14PM -0500, Alex Deucher wrote:
> > > On Thu, Oct 29, 2020 at 6:14 PM Nathan Chancellor
> > > wrote:
> > > >
> > > > On Fri, Oct 16, 2020
On Tue, Nov 03, 2020 at 02:19:22PM -0500, Kenny Ho wrote:
> On Tue, Nov 3, 2020 at 12:43 AM Alexei Starovoitov
> wrote:
> > On Mon, Nov 2, 2020 at 9:39 PM Kenny Ho wrote:
> > pls don't top post.
> My apology.
>
> > > Cgroup awareness is desired because the intent
> > > is to use this for resourc
Add proper FP_START/END handling and adjust Makefiles per
previous asics.
v2: fix up harder.
v3: fix clkmgr Makefile for dcn30
Reviewed-by: Harry Wentland (v1)
Reviewed-by: Nicholas Kazlauskas (v1)
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/clk_mgr/Makefile | 26 +++
...
On Tue, Nov 3, 2020 at 1:27 PM Nathan Chancellor
wrote:
>
> On Tue, Nov 03, 2020 at 12:41:27PM -0500, Alex Deucher wrote:
> > On Mon, Nov 2, 2020 at 8:01 PM Nathan Chancellor
> > wrote:
> > >
> > > On Mon, Nov 02, 2020 at 05:33:14PM -0500, Alex Deucher wrote:
> > > > On Thu, Oct 29, 2020 at 6:14
Use the per device drm driver feature flags rather than the
global one. This way we can make the drm driver struct const.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/am
On 2020-11-03 4:54 p.m., Alex Deucher wrote:
> Use the per device drm driver feature flags rather than the
> global one. This way we can make the drm driver struct const.
>
> Signed-off-by: Alex Deucher
Reviewed-by: Luben Tuikov
Yeah, that's a good change.
Regards,
Luben
> ---
> drivers/gp
On Tue, Nov 3, 2020 at 4:04 PM Alexei Starovoitov
wrote:
>
> On Tue, Nov 03, 2020 at 02:19:22PM -0500, Kenny Ho wrote:
> > On Tue, Nov 3, 2020 at 12:43 AM Alexei Starovoitov
> > wrote:
> > > On Mon, Nov 2, 2020 at 9:39 PM Kenny Ho wrote:
>
> Sounds like either bpf_lsm needs to be made aware of c
Add proper FP_START/END handling and adjust Makefiles per
previous asics.
v2: fix up harder.
v3: fix clkmgr Makefile for dcn30
v4: fix old gcc handling is only required for x86
Reviewed-by: Harry Wentland (v1)
Reviewed-by: Nicholas Kazlauskas (v1)
Signed-off-by: Alex Deucher
---
.../gpu/drm/a
On Tue, Nov 03, 2020 at 04:36:05PM -0500, Alex Deucher wrote:
> On Tue, Nov 3, 2020 at 1:27 PM Nathan Chancellor
> wrote:
> >
> > On Tue, Nov 03, 2020 at 12:41:27PM -0500, Alex Deucher wrote:
> > > On Mon, Nov 2, 2020 at 8:01 PM Nathan Chancellor
> > > wrote:
> > > >
> > > > On Mon, Nov 02, 2020
On Tue, Nov 3, 2020 at 5:44 PM Nathan Chancellor
wrote:
>
> On Tue, Nov 03, 2020 at 04:36:05PM -0500, Alex Deucher wrote:
> > On Tue, Nov 3, 2020 at 1:27 PM Nathan Chancellor
> > wrote:
> > >
> > > On Tue, Nov 03, 2020 at 12:41:27PM -0500, Alex Deucher wrote:
> > > > On Mon, Nov 2, 2020 at 8:01 P
From: Roman Li
[Why]
The change for correct asic type check
caused a psr regression due to incorrect
chip family id for Raven.
[How]
Use correct family id.
Signed-off-by: Roman Li
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
For kernel 5.10, this function was called twice due to what looks
like a mis-merge.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/
Reviewed-by: Alex Deucher
From: roman...@amd.com
Sent: Tuesday, November 3, 2020 6:12 PM
To: amd-gfx@lists.freedesktop.org ; Deucher,
Alexander ; Quan, Evan ;
Siqueira, Rodrigo ; Pillai, Aurabindo
Cc: Li, Roman
Subject: [PATCH] drm/amd/display: fix psr panel
On Tue, Nov 03, 2020 at 05:57:47PM -0500, Kenny Ho wrote:
> On Tue, Nov 3, 2020 at 4:04 PM Alexei Starovoitov
> wrote:
> >
> > On Tue, Nov 03, 2020 at 02:19:22PM -0500, Kenny Ho wrote:
> > > On Tue, Nov 3, 2020 at 12:43 AM Alexei Starovoitov
> > > wrote:
> > > > On Mon, Nov 2, 2020 at 9:39 PM Ken
On Tue, Nov 03, 2020 at 06:10:39PM -0500, Alex Deucher wrote:
> Add proper FP_START/END handling and adjust Makefiles per
> previous asics.
>
> v2: fix up harder.
> v3: fix clkmgr Makefile for dcn30
> v4: fix old gcc handling is only required for x86
>
> Reviewed-by: Harry Wentland (v1)
> Review
[AMD Official Use Only - Internal Distribution Only]
Hi Alex,
Where is the other place the smu_set_default_dpm_table get called?
smu_late_init()?
If yes, you probably need to leave the one from smu_smc_hw_setup but drop
another one from smu_late_init().
BR
Evan
-Original Message-
From:
On Tue, Nov 3, 2020 at 8:12 PM Quan, Evan wrote:
>
> [AMD Official Use Only - Internal Distribution Only]
>
> Hi Alex,
>
> Where is the other place the smu_set_default_dpm_table get called?
> smu_late_init()?
> If yes, you probably need to leave the one from smu_smc_hw_setup but drop
> another o
On Tue, Nov 03, 2020 at 06:12:14PM -0500, Alex Deucher wrote:
> Whoops, missed those last time. Ok, 4th time's the charm.
>
> Alex
This one looks good to me, I replied with a tag on the main patch
thread.
Cheers,
Nathan
___
amd-gfx mailing list
amd-gf
[AMD Official Use Only - Internal Distribution Only]
OK. That will be fine then.
Reviewed-by: Evan Quan
-Original Message-
From: Alex Deucher
Sent: Wednesday, November 4, 2020 9:19 AM
To: Quan, Evan
Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
Subject: Re: [PATCH] drm/amdgpu
From: Alex Deucher
Use the per device drm driver feature flags rather than the
global one. This way we can make the drm driver struct const.
Signed-off-by: Alex Deucher
Reviewed-by: Luben Tuikov
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletio
Make the definition of struct drm_driver
a constant, to follow the latest developments
in the DRM layer.
Signed-off-by: Luben Tuikov
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 32 +
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 25 +--
2 files changed, 29 i
Hi Daniel,
These two patches follow up your latest
DRM work to make definitions of struct drm_driver
in DRM low-level drivers, constant, in amdgpu.
This set doesn't descend from my previous patch
"drm/amdgpu: Convert to using devm_drm_dev_alloc() (v2)",
since our branch doesn't have it, and I can
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index e57153d1fa24..a33b1cc50008 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index e57153d1fa24..a33b1cc50008 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Kenneth Feng
Best Regards
Kenneth
-Original Message-
From: amd-gfx On Behalf Of Kevin Wang
Sent: Wednesday, November 4, 2020 1:06 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
; Wang, Kevin(Y
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Kenneth Feng
Best Regards
Kenneth
-Original Message-
From: amd-gfx On Behalf Of Kevin Wang
Sent: Wednesday, November 4, 2020 1:06 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
; Wang, Kevin(Y
add missing clock gating informations in amdgpu_pm_info
1. AMD_CG_SUPPORT_VCN_MGCG
2. AMD_CG_SUPPORT_HDP_DS
3. AMD_CG_SUPPORT_HDP_SD
4. AMD_CG_SUPPORT_IH_CG
5. AMD_CG_SUPPORT_JPEG_MGCG
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 5 +
1 file changed, 5 insertions(+)
di
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