[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Kenneth Feng
在 2020/7/24 下午5:39,“Gao, Likun” 写入:
From: Likun Gao
Update sienna_cichlid driver if header and related files.
Support new smu metrics for pre & postDS frequency.
Signed-off-by: Likun Gao
Cha
On Sat, 25 Jul 2020 03:03:52 +
Mazin Rezk wrote:
> > Am 24.07.20 um 19:33 schrieb Kees Cook:
> >
> > > There was a fix to disable the async path for this driver that
> > > worked around the bug too, yes? That seems like a safer and more
> > > focused change that doesn't revert the SLUB defe
On Friday, July 24, 2020 5:19 PM, Paul Menzel wrote:
> Dear Kees,
>
> Am 24.07.20 um 19:33 schrieb Kees Cook:
>
> > On Fri, Jul 24, 2020 at 09:45:18AM +0200, Paul Menzel wrote:
> >
> > > Am 24.07.20 um 00:32 schrieb Kees Cook:
> > >
> > > > On Thu, Jul 23, 2020 at 09:10:15PM +, Mazin Rezk wro
On Saturday, July 25, 2020 12:59 AM, Duncan <1i5t5.dun...@cox.net> wrote:
> On Sat, 25 Jul 2020 03:03:52 +
> Mazin Rezk mn...@protonmail.com wrote:
>
> > > Am 24.07.20 um 19:33 schrieb Kees Cook:
> > >
> > > > There was a fix to disable the async path for this driver that
> > > > worked around
Event bitmask is a 64-bit mask with only 1 bit set. Sending this
event bitmask in KFD SMI event message is both wasteful of memory
and potentially limiting to only 64 events. Instead send event
index in SMI event message.
Signed-off-by: Mukul Joshi
Suggested-by: Felix Kuehling
---
drivers/gpu/d
instead "mutex" with "sensor_lock" on smu_read_sensor().
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 4 ++--
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 2 --
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 2 --
drivers/gpu/drm/amd/powerplay/
1. allow asic to handle sensor type by itself.
2. if not, use smu common sensor to handle it.
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
b/driver
[AMD Public Use]
Submitting patch to add support for RAS GECC umc 8.7 error reporting and query
Thank you,
John Clements
0001-drm-amdgpu-add-support-for-umc-8.7-ras-functions.patch
Description: 0001-drm-amdgpu-add-support-for-umc-8.7-ras-functions.patch
_
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
From: Clements, John
Sent: Monday, July 27, 2020 11:15
To: amd-gfx list ; Zhang, Hawking
Subject: [PATCH] drm/amdgpu: add support for umc 8.7 ras functions
[AMD Public Use]
Submitting patch to add support for RAS GECC umc 8.7 err
[AMD Official Use Only - Internal Distribution Only]
It's OK to drop sensor_lock. But please keep smu->mutex in smu_read_sensor.
All top APIs from amdgpu_smu.c come with smu->mutex to avoid potential race
issue.
-Original Message-
From: amd-gfx On Behalf Of Kevin Wang
Sent: Monday, July
[AMD Official Use Only - Internal Distribution Only]
yes, i know what you want to say.
the "smu->mutex" as a global lock in smu driver, and it seems that the lock
grain size is a little big.
and it's better to rename it, eg: smu->api_lock, ...
Best Regards,
Kevin
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Kenneth Feng
-Original Message-
From: Wang, Kevin(Yang)
Sent: Monday, July 27, 2020 11:05 AM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Wang, Kevin(Yang)
Subject: [PATCH 1/2] drm/amd/swsmu: allow asic to h
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