[PATCH] drm/amdgpu/powerplay: Modify SMC message name for setting power profile mode

I consulted Cai Land(chuntian@amd.com), he told me corresponding smc message name to fSMC_MSG_SetWorkloadMask() is "PPSMC_MSG_ActiveProcessNotify" in firmware code of Renoir. Strange though it may seem, but it's a fact. Signed-off-by: chen gong --- drivers/gpu/drm/amd/powerplay/renoir_ppt.c

Re: [PATCH] drm/amdgpu: use ARRAY_SIZE() to add amdgpu debugfs files

Am 13.07.20 um 07:59 schrieb Xiaojie Yuan: to easily add new debugfs file w/o changing the hardcoded list count. In general a good idea, but I would rather like to see amdgpu_debugfs_add_files() completely removed and debugfs_create_file() used directly instead. Christian. Signed-off-by:

Re: [PATCH v2] drm/amdgpu: fix system hang issue during GPU reset

Dear Dennis, Am 10.07.20 um 10:39 schrieb Li, Dennis: I used our internal tool to make GPU hang and do stress test. Interesting. I want to have such a tool. ;-) So you noticed it during testing with that tool, and not by somebody experiencing this in production? In kernel, when GPU hang,

Re: [Mesa-dev] [XDC 2020] Virtual conference + Call for Proposals extended 2 weeks more

On 7/3/20 4:41 PM, Samuel Iglesias Gonsálvez wrote: > Hi, > > In the last meeting, X.Org Foundation board has decided that XDC 2020 > will be a virtual conference, given the uncertain COVID-19 situation in > Europe by September, including the possibility of a second wave, > outbreaks and travel res

Re: [PATCH] drm/amdgpu: use ARRAY_SIZE() to add amdgpu debugfs files

[AMD Official Use Only - Internal Distribution Only] Hi Chris, This was observed when I was trying to add a new debugfs file. Some similar occurrences using ARRAY_SIZE() are: - amdgpu_kms.c :: amdgpu_firmware_info_list - amdgpu_pm.c :: amdgpu_debugfs_pm_info - amdgpu_ttm.c :: amdgpu_ttm_debugfs_

[PATCH] drm/amdgpu: don't ignore the return from thermal_init

The current hw_init code for si_dpm ignores the return value of the function attempting to initialize the thermal controller, which in turn sets the dpm_enabled status wrongly to true in hw_init, which should be actually false. This patch: - Adds the return value check for thermal controller initi

Re: [PATCH] drm/amdgpu: use ARRAY_SIZE() to add amdgpu debugfs files

Am 13.07.20 um 15:34 schrieb Yuan, Xiaojie: [AMD Official Use Only - Internal Distribution Only] Hi Chris, This was observed when I was trying to add a new debugfs file. In this case please add the new file using debugfs_create_file() directly and don't touch this old code. Some similar

Re: [PATCH] drm/amdgpu/powerplay: Modify SMC message name for setting power profile mode

On Mon, Jul 13, 2020 at 4:34 AM chen gong wrote: > > I consulted Cai Land(chuntian@amd.com), he told me corresponding smc > message name to fSMC_MSG_SetWorkloadMask() is > "PPSMC_MSG_ActiveProcessNotify" in firmware code of Renoir. > > Strange though it may seem, but it's a fact. Weird. Acked

Re: [PATCH 02/16] drm/amd/powerplay: implement a common set dpm table API for smu V11

On Fri, Jul 10, 2020 at 12:48 AM Evan Quan wrote: > > Maximum the code sharing around smu V11. > > Change-Id: Ice0a874f3f70457f1012ca566f9f784ff3e9cd94 > Signed-off-by: Evan Quan Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 4 ++ > drivers/gpu/drm/amd/pow

Re: [PATCH 03/16] drm/amd/powerplay: update Arcturus default dpm table setting

On Fri, Jul 10, 2020 at 12:48 AM Evan Quan wrote: > > Preparing for coming code sharing around performance level > setting. > > Change-Id: Iaa77af7a272121503f09ad5fbfbe9dff2d2597b1 > Signed-off-by: Evan Quan Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 297

Re: [PATCH 12/16] drm/amd/powerplay: drop Sienna Cichlid specific set_soft_freq_limited_range

On Fri, Jul 10, 2020 at 12:48 AM Evan Quan wrote: > > Use the common smu_v11_0_set_soft_freq_limited_range. > > Change-Id: I9f8772880b324ce9e741291751bb1b8ff4c36ea3 > Signed-off-by: Evan Quan Reviewed-by: Alex Deucher > --- > .../drm/amd/powerplay/sienna_cichlid_ppt.c| 20 ++--

[PATCH 2/2] drm/amd/display: Allow for vblank enabled with no active planes

[Why] CRC capture doesn't work when the active plane count is 0 since we currently tie both vblank and pageflip interrupts to active_plane_count greater than 0. [How] The frontend is what generates the vblank interrupts while the backend is what generates pageflip interrupts. Both have a requireme

[PATCH 1/2] drm/amd/display: Add missing DCN30 registers and fields for OTG_CRC_CNTL2

[Why] When enabling the debugfs for CRC capture we hit assertions caused by register address and field masks and shifts missing. [How] We want these registers programmed, so add in the SRI/SF entries for this register. Cc: Bhawanpreet Lakha Signed-off-by: Nicholas Kazlauskas --- drivers/gpu/dr

Re: [PATCH 1/2] drm/amd/display: Add missing DCN30 registers and fields for OTG_CRC_CNTL2

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Bhawanpreet Lakha From: Nicholas Kazlauskas Sent: July 13, 2020 11:39 AM To: amd-gfx@lists.freedesktop.org Cc: Kazlauskas, Nicholas ; Lakha, Bhawanpreet Subject: [PATCH 1/2] drm/amd/display: Add

Re: [PATCH 01/25] dma-fence: basic lockdep annotations

Hi Christian, On Wed, Jul 08, 2020 at 04:57:21PM +0200, Christian König wrote: > Could we merge this controlled by a separate config option? > > This way we could have the checks upstream without having to fix all the > stuff before we do this? Discussions died out a bit, do you consider this a

Re: [PATCH 2/2] drm/amd/display: Allow for vblank enabled with no active planes

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Bhawanpreet Lakha From: Nicholas Kazlauskas Sent: July 13, 2020 11:39 AM To: amd-gfx@lists.freedesktop.org Cc: Kazlauskas, Nicholas ; Lakha, Bhawanpreet Subject: [PATCH 2/2] drm/amd/display: All

Re: [PATCH 01/25] dma-fence: basic lockdep annotations

Am 13.07.20 um 18:26 schrieb Daniel Vetter: Hi Christian, On Wed, Jul 08, 2020 at 04:57:21PM +0200, Christian König wrote: Could we merge this controlled by a separate config option? This way we could have the checks upstream without having to fix all the stuff before we do this? Discussions

Re: [PATCH] drm/amdgpu: don't ignore the return from thermal_init

On Mon, Jul 13, 2020 at 9:48 AM Shashank Sharma wrote: > > The current hw_init code for si_dpm ignores the return value of the > function attempting to initialize the thermal controller, which in > turn sets the dpm_enabled status wrongly to true in hw_init, which > should be actually false. > > T

Re: [PATCH 01/25] dma-fence: basic lockdep annotations

On Tue, 14 Jul 2020 at 02:39, Christian König wrote: > > Am 13.07.20 um 18:26 schrieb Daniel Vetter: > > Hi Christian, > > > > On Wed, Jul 08, 2020 at 04:57:21PM +0200, Christian König wrote: > >> Could we merge this controlled by a separate config option? > >> > >> This way we could have the chec

Failed to find memory space for buffer eviction

I'm running into this problem with the KFD EvictionTest. The log snippet below looks like it ran out of GTT space for the eviction of a 64MB buffer. But then it dumps the used and free space and shows plenty of free space. As I understand it, the per-page breakdown of used and free space shown by

[PATCH 2/4] drm/amdgpu: RAS emergency restart logic refine

If we are in RAS triggered situation and BACO isn't support, emergency restart is needed, and this code is only needed for some specific cases(vega20 with given smu fw version). After we add smu mode1 reset for sienna cichlid, we need to share AMD_RESET_METHOD_MODE1 with psp mode1 reset, so in amd

[PATCH 3/4] drm/amdgpu: enable mode1 reset

For sienna cichlid, add mode1 reset path for sGPU. v2: hiding MP0/MP1 mode1 reset under AMD_RESET_METHOD_MODE1 v3: split emergency restart logic to a new patch Signed-off-by: Likun Gao Signed-off-by: Wenhui Sheng --- drivers/gpu/drm/amd/amdgpu/nv.c | 19 --- drive

[PATCH 4/4] drm/amdgpu: add module parameter choose reset mode

Default value is auto, doesn't change original reset method logic. v2: change to use parameter reset_method v3: add warn msg if specified mode isn't supported Signed-off-by: Likun Gao Signed-off-by: Wenhui Sheng --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdg

[PATCH 1/4] drm/amd/powerplay: add SMU mode1 reset

>From PM FW 58.26.0 for sienna cichlid, SMU mode1 reset is support, driver sends PPSMC_MSG_Mode1Reset message to PM FW could trigger this reset. v2: add mode1 reset dpm interface v3: change maro name Signed-off-by: Likun Gao Signed-off-by: Wenhui Sheng --- drivers/gpu/drm/amd/amdgpu/amdgpu_dpm

RE: [PATCH] drm/amdgpu/powerplay: Modify SMC message name for setting power profile mode

[AMD Official Use Only - Internal Distribution Only] That's true. Reviewed-by: Evan Quan -Original Message- From: amd-gfx On Behalf Of chen gong Sent: Monday, July 13, 2020 4:34 PM To: amd-gfx@lists.freedesktop.org Cc: Gong, Curry Subject: [PATCH] drm/amdgpu/powerplay: Modify SMC messa

[PATCH 1/5] drm/amd/sriov skip jped ip block and close pgcg flags

For SIENNA_CICHLID SRIOV, jpeg and pgcp is not supported. Signed-off-by: Jack Zhang --- drivers/gpu/drm/amd/amdgpu/nv.c | 12 ++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index a7cfe3ac7cb6..7f34a2f2

[PATCH 2/5] drm/amdgpu: optimize rlcg write for gfx_v10

For gfx10 boards, except for nv12, other boards take mmio write rather than rlcg write --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 26 +++--- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx

[PATCH 4/5] drm/amd/sriov porting sriov cap to vcn3.0

1.In early_init and for sriov, hardcode harvest_config=0, enc_num=1 2.sw_init/fini alloc & free mm_table for sriov doorbell setting for sriov 3.hw_init/fini Under sriov, add start_sriov to config mmsch Skip ring_test to avoid mmio in VF, but need to initialize wptr for vcn rings. 4.Imp

[PATCH 3/5] drm/amd/sriov add mmsch_v3 interface

For VCN3.0 SRIOV, Guest driver needs to communicate with mmsch to set the World Switch for MM appropriately. This patch add the interface for mmsch_v3.0. Signed-off-by: Jack Zhang --- drivers/gpu/drm/amd/amdgpu/mmsch_v3_0.h | 130 1 file changed, 130 insertions(+) creat

[PATCH 5/5] drm/amd/sriov skip vcn powergating and dec_ring_test

1.Skip decode_ring test in VF, because VCN in SRIOV does not support direct register read/write. 2.Skip powergating configuration in hw fini because VCN3.0 SRIOV doesn't support powergating. Signed-off-by: Jack Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 drivers/gpu/drm/amd/amd

[PATCH 1/1] drm/amdkfd: Add IPC API

This allows exporting and importing buffers. The API generates handles that can be used with the HIP IPC API, i.e. big numbers rather than file descriptors. Signed-off-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h| 5 + .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 5

[PATCH 0/1] Upstreaming the KFD IPC API

This API is used by MPI/UCX for efficiently sharing VRAM between MPI ranks on the same node. It has been part of the ROCm DKMS branch for a long time. This code is refactored to be less invasive for upstreaming. As a result struct kfd_bo and the associated interval tree is not needed upstream. The

Re: [PATCH 1/1] drm/amdkfd: Add IPC API

On Tue, 14 Jul 2020 at 13:14, Felix Kuehling wrote: > > This allows exporting and importing buffers. The API generates handles > that can be used with the HIP IPC API, i.e. big numbers rather than > file descriptors. First up why? I get the how. > + * @share_handle is a 128 bit random number gen

Re: [PATCH 1/1] drm/amdkfd: Add IPC API

Am 2020-07-13 um 11:28 p.m. schrieb Dave Airlie: > On Tue, 14 Jul 2020 at 13:14, Felix Kuehling wrote: >> This allows exporting and importing buffers. The API generates handles >> that can be used with the HIP IPC API, i.e. big numbers rather than >> file descriptors. > First up why? I get the how

[PATCH UMR] Fix off-by-one error for decoding sdma linear write packet

COUNT in linear write packet represents dword number - 1 Before fix: navi10.sdma0.ring[ 0] == 0x0002.w. OPCODE: [WRITE], SUB-OPCODE: [0], LINEAR_WRITE navi10.sdma0.ring[ 1] == 0x00400a60... |---+ WORD [1]: DST_ADDR_LO: 0x00400a60 navi10.sdma0.ring[ 2] == 0x... |---+

Re: [PATCH 1/1] drm/amdkfd: Add IPC API

On Tue, 14 Jul 2020 at 14:09, Felix Kuehling wrote: > > Am 2020-07-13 um 11:28 p.m. schrieb Dave Airlie: > > On Tue, 14 Jul 2020 at 13:14, Felix Kuehling wrote: > >> This allows exporting and importing buffers. The API generates handles > >> that can be used with the HIP IPC API, i.e. big numbers

RE: [PATCH 3/5] drm/amd/sriov add mmsch_v3 interface

[AMD Official Use Only - Internal Distribution Only] Hi, Jack, Please see the following comments. Best Regards Dennis Li -Original Message- From: amd-gfx On Behalf Of Jack Zhang Sent: Tuesday, July 14, 2020 10:47 AM To: amd-gfx@lists.freedesktop.org Cc: Zhang, Jack (Jian) ; Liu, L

[PATCH] drm/amdkfd: fix kernel-doc and cleanup

- fix some styling issues - fixes for kernel-doc type Signed-off-by: Rajneesh Bhardwaj --- drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 61 +++ 1 file changed, 25 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd

RE: [PATCH 1/1] drm/amdkfd: Add IPC API

[AMD Official Use Only - Internal Distribution Only] Hi, Felix, amdgpu_gem_prime_export has different define in the old driver. I added some comment in the below codes. Best Regards Dennis Li -Original Message- From: amd-gfx On Behalf Of Felix Kuehling Sent: Tuesday, July 14, 20

RE: [PATCH 4/4] drm/amdgpu: add module parameter choose reset mode

[AMD Public Use] Patch #4 + else if (amdgpu_reset_method != -1) + dev_warn(adev->dev, "Specified reset:%d isn't supported, using AUTO instead.\n", + amdgpu_reset_method); I would suggest explicitly specify the reset_method enum that is not sup

RE: [PATCH 13/16] drm/amd/powerplay: apply gfxoff disablement/enablement for all SMU11 ASICs

[AMD Official Use Only - Internal Distribution Only] Hi Alex, Can I have a RB for this patch also? BR Evan -Original Message- From: Quan, Evan Sent: Monday, July 13, 2020 11:45 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: RE: [PATCH 13/16] drm/amd/powerplay: appl

Re: [PATCH 1/1] drm/amdkfd: Add IPC API

Am 2020-07-14 um 1:05 a.m. schrieb Li, Dennis: > [AMD Official Use Only - Internal Distribution Only] > > Hi, Felix, > amdgpu_gem_prime_export has different define in the old driver. I added > some comment in the below codes. > > Best Regards > Dennis Li > -Original Message- > From: