Hello Wyatt Wood,
This is a semi-automatic email about new static checker warnings.
The patch 4dc079787b23: "drm/amd/display: Use dmub fw to lock pipe,
cursor, dig" from May 27, 2020, leads to the following Smatch
complaint:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:4091
dc
When the GPU is in reset, accessing the hw is unreliable and could
interfere with the reset. Return an error in those cases.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
Adding a delay between writing to UVD control register and reading from it.
This is to allow the HW to process the write command.
Signed-off-by: Alex Jivin
Suggested-By: Luben Tukov
---
drivers/gpu/drm/amd/amdgpu/si.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd
From: Wyatt Wood
[Why]
Debug flags are not set by default.
[How]
Set debug flags to 0
Signed-off-by: Wyatt Wood
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/d
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Fixes in Freesync, DCN20, and others;
* Enhancements in DC;
* Improvements in PSR, link processing, and others.
-
Anthony Koo (3):
drm/amd/display: [FW Promotion] Release 1.0.20
drm/amd/displa
From: Jing Zhou
[Why]
Register key for AE or QA do regression test. New edid status for
check.
[How]
Add register key edid_read_retry_times.
Add new edid status EDID_FALL_BACK.
Signed-off-by: Jing Zhou
Reviewed-by: Charlene Liu
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h
From: Jaehyun Chung
[Why]
In cases where refresh range is slightly below 10, FreeSync is not
active or supported. Need to round values before checking refresh range
in order to have FreeSync supported in these cases.
[How]
Remove redundant values and round values before checking valid refresh ra
From: Dmytro Laktyushkin
In case of certain display configurations we want to allow max detile
buffer utilization by using 4 to 1 mpc combine
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Eryk Brol
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 24 -
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display/
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display/
From: jinlong zhang
[Why]
For special DP convert VGA dongle, core_link_read_dpcd for
DP_DOWNSTREAM_PORT_0 always return fail, then dongle_type will be set to
DISPLAY_DONGLE_NONE, which will cause desktop resolution abnormal.
[How]
If dpcd for DP_DOWNSTREAM_PORT_0 read fail, skip set dongle_type
From: Yongqiang Sun
[Why]
SMU may return error code to driver, but driver only check if response
is OK.
[How]
Check SMU response instead of reg_wait, assert in case of reponse isn't
OK.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Eryk Brol
---
.../dc/clk_mgr/dcn10/rv1_clk
From: Anthony Koo
[Header Changes]
- Add command for notification of active streams to DMUB
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 01ef2a3c1f3c..90cc3abe2
From: Joshua Aberback
[Why]
We want to keep the same buffer allocated for use during multiple
hardware initializations.
[How]
- allocate gpu memory buffer on clock manager construct
- free gpu memory buffer on clock manager destruct
Signed-off-by: Joshua Aberback
Reviewed-by: Jun Lei
Acked-
On Fri, Jun 26, 2020 at 12:19 PM Eryk Brol wrote:
>
> From: Yongqiang Sun
>
> [Why]
> SMU may return error code to driver, but driver only check if response
> is OK.
>
> [How]
> Check SMU response instead of reg_wait, assert in case of reponse isn't
> OK.
Will you ever get concurrent calls to th
Am 26.06.20 um 18:12 schrieb Alex Jivin:
Adding a delay between writing to UVD control register and reading from it.
This is to allow the HW to process the write command.
Signed-off-by: Alex Jivin
Suggested-By: Luben Tukov
---
drivers/gpu/drm/amd/amdgpu/si.c | 6 ++
1 file changed, 6 in
On 2020-06-26 12:48 p.m., Alex Deucher wrote:
On Fri, Jun 26, 2020 at 12:19 PM Eryk Brol wrote:
From: Yongqiang Sun
[Why]
SMU may return error code to driver, but driver only check if response
is OK.
[How]
Check SMU response instead of reg_wait, assert in case of reponse isn't
OK.
Will yo
Hi Dave, Daniel,
First pull for 5.9. Big feature here is initial support for a new GPU,
sienna cichlid.
The following changes since commit 9ca1f474cea0edc14a1d7ec933e5472c0ff115d3:
Merge tag 'amd-drm-next-5.8-2020-05-27' of
git://people.freedesktop.org/~agd5f/linux into drm-next (2020-05-28
From: Bhanuprakash Modem
v3:
* Rebase (Manasi)
v2:
* Rebase (Manasi)
As both VRR min and max are already part of drm_display_info,
drm can expose this VRR range for each connector.
Hence this logic should move to core DRM.
This reverts commit 727962f030c23422a01e8b22d0f463815fb15ec4.
Signed-o
The correct way to implement the fops->poll callback uses EPOLL* macros.
For reference see also:
commit a9a08845e9ac ("vfs: do bulk POLL* -> EPOLL* replacement")
commit 7a163b2195cd ("unify {de,}mangle_poll(), get rid of kernel-side POLL...")
Reported-by: kernel test robot
Fixes: 73b753a11ae9 ("
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