[PATCH 2/9] drm/amd/powerplay: some cosmetic fixes

To make code more clean and readable by moving ASIC specific code to its own file, more code sharing and dropping unused code. Change-Id: I6b299f9e98c7678b48281cbed9beb17b644bb4cc Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 213 - drivers/gpu/drm

[PATCH 1/9] drm/amd/powerplay: drop unnecessary CHIP_ARCTURUS guard

These APIs internally guard they will not break ARCTURUS. Change-Id: Ib6775c1c8c5211ea45db6c3fb604a8279411ab37 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 38 +--- drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 8 ++--- 2 files changed, 20 inserti

[PATCH 3/9] drm/amd/powerplay: centralize all buffer allocation in sw_init phase

To fit common design. And this can simplify the buffer deallocation. Change-Id: Iee682e76aadb5f34861d69d5794ced44f0a78789 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 330 ++--- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 105 --- 2 files changed

[PATCH 8/9] drm/amd/powerplay: drop unnecessary dynamic buffer allocation

Since the structure comes with only several bytes. Change-Id: Ie9df0db543fdd4cf5b963a286ef40dee03c436bf Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 --- drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 2 +- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 1

[PATCH 6/9] drm/amd/powerplay: clean up the overdrive settings

Eliminate the buffer allocation and drop the unnecessary overdrive table uploading. Change-Id: I8ba5383a330e6d5355cea219147500c1b4a43f47 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 2 +- .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h| 2 +- drivers/gpu/drm/amd/

[PATCH 9/9] drm/amd/powerplay: add firmware cleanup on sw_fini

To avoid possible memory leak. Change-Id: I4740eac7fc2c6e934ec8f503e5a98057f0902f4a Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 2 ++ drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 1 + drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 1 + drivers/gpu/drm/amd/

[PATCH 5/9] drm/amd/powerplay: clean up the APIs for pptable setup

Combine and simplify the logics for setup pptable. Change-Id: I062f15eab586050593afd960432c4c70fbdd5d41 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 17 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 66 - .../gpu/drm/amd/powerplay/inc/amdgpu_smu

[PATCH 4/9] drm/amd/powerplay: clean up the APIs for bootup clocks

Combine and simplify the logics for retrieving bootup clocks. Change-Id: Ifca28c454f3769dece0cc705ba054ff34db0ab60 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 4 - drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 1 - .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h

[PATCH 7/9] drm/amd/powerplay: clean up the SMU hw setup operations

Postpone some operations which are not must for hw setup to late_init. Thus, code sharing is possible between hw_init/fini and suspend/resume. Also this makes code more clean and readable. Change-Id: Id3996fd9e2dbf2ff59d8a6032cc5f6730db1295c Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/power

[PATCH] drm/amd/powerplay: use existed smu_dpm_set* interfaces to implement powergate functions

Abstract powergate_vcn/jpeg functions, using smu_dpm_set* to implement it. Signed-off-by: Huang Rui Reviewed-by: Kevin Wang --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 16 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 2 -- drivers/gpu/drm/amd/powerplay/renoir_ppt.

Re: Current drm-tip doesn’t build with gcc10 - error in amdgpu_amdkfd_gpuvm.c

On Sun, May 31, 2020 at 9:46 AM Yurii Kolesnykov wrote: > > Originally reported by jghodd[1] in linux-drm-tip-git AUR package [2], also > reported on drm/amd on Freedesktop GitLab [3]. > > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c: In function > ‘amdgpu_amdkfd_gpuvm_free_memory_of_gpu’:

[PATCH 2/2] drm/amdgpu: Add unique_id and serial_number for Arcturus

Add support for unique_id and serial_number, as these are now the same value, and will be for future ASICs as well. Signed-off-by: Kent Russell Change-Id: I3b036a38b19cd84025399b0706b2dad9b7aff713 --- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 2 +- drivers/gpu/drm/amd/powerplay/amdgpu_smu

[PATCH 1/2] drm/amdgpu: Add ReadSerial defines for Arcturus

Add the ReadSerial definitions for Arcturus to the arcturus_ppsmc.h header for use with unique_id Unrevert: Supported in SMU 54.23, update values to match SMU spec Signed-off-by: Kent Russell Reviewed-by: Alex Deucher Change-Id: I9a70368ea65b898b3c26f0d57dc088f21dab9c53 --- drivers/gpu/drm/amd

Re: [PATCH 2/2] drm/amdgpu: Add unique_id and serial_number for Arcturus

On Mon, Jun 1, 2020 at 1:28 PM Kent Russell wrote: > > Add support for unique_id and serial_number, as these are now > the same value, and will be for future ASICs as well. > > Signed-off-by: Kent Russell > Change-Id: I3b036a38b19cd84025399b0706b2dad9b7aff713 > --- > drivers/gpu/drm/amd/amdgpu/a

RE: [PATCH 2/2] drm/amdgpu: Add unique_id and serial_number for Arcturus

[AMD Public Use] > -Original Message- > From: Alex Deucher > Sent: Monday, June 1, 2020 1:35 PM > To: Russell, Kent > Cc: amd-gfx list > Subject: Re: [PATCH 2/2] drm/amdgpu: Add unique_id and serial_number for > Arcturus > > On Mon, Jun 1, 2020 at 1:28 PM Kent Russell wrote: > > > >

[PATCH 013/207] drm/amdgpu: initialize IP offset for sienna_cichlid (v2)

From: Likun Gao Add IP offset headers and state. V2: squash in updates (Alex) Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/Makefile |2 +- drivers/gpu/drm/amd/amdgpu/nv.c |3 + drivers/gpu/drm/

[PATCH 015/207] drm/amdgpu: add support on mmhub for sienna_cichlid

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 71 - 1 file changed, 57 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/dr

[PATCH 011/207] drm/amdgpu/gfx10: add clockgating support for sienna_cichlid

From: Likun Gao Same as navi10. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c inde

[PATCH 009/207] drm/amdgpu/gfx10: add support for sienna_cichlid firmware

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index df2

[PATCH 000/207] Add Support for Sienna Cichlid

Sienna Cichlid is a GPU from AMD. This patch set adds support for it including power management, display, kfd, interrupts, gfx, multi-media, etc. The new register headers are really big so I haven't sent them to the list. You can view the new patches including the register headers on the followi

[PATCH 007/207] drm/amdgpu: set fw load type for sienna_cichlid

From: Likun Gao Same as Navi1x. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uco

[PATCH 008/207] drm/amdgpu: set asic family and ip blocks for sienna_cichlid

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 2a2

[PATCH 017/207] drm/amdgpu: add gmc ip block for sienna_cichlid

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 49 +++--- drivers/gpu/drm/amd/amdgpu/nv.c| 1 + 2 files changed, 37 insertions(+), 13 deletions(-) diff --git a/drivers/g

[PATCH 019/207] drm/amdgpu: add gfx ip block for sienna_cichlid (v3)

From: Likun Gao Add support for GC 10.3. v2: Squash in gb_addr_config fix (Alex) v3: Add num_pkrs support (Alex) Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 15 +

[PATCH 014/207] drm/amdgpu/soc15: add common ip block for sienna_cichlid

From: Likun Gao Add common ip block for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c

[PATCH 006/207] drm/amdgpu: add sienna_cichlid gpu info firmware v2

From: Likun Gao gpu info fw contains chip specific parameters. v2: fix fw_name Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/

[PATCH 016/207] drm/amdgpu: add support gfxhub for sienna_cichlid (v3)

From: Likun Gao GFX10.3 is used for sienna_cichlid. v2: squash in BANK_SELECT and FRAGMENT_SIZE fixes (Alex) v3: squash in smallk update (Alex) Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/

[PATCH 012/207] drm/amdgpu/soc15: add support for sienna_cichlid

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nv.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index fd3b9e21a5bd..642d18e70860 1006

[PATCH 020/207] drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2)

From: Likun Gao Add irq src headers for additional SDMA blocks. v2: Add missing licenses (Alex) Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- .../include/ivsrcid/sdma2/irqsrcs_sdma2_5_0.h | 45 +++ .../include/ivsrcid/sdma3/irqsrcs_sdma3

[PATCH 005/207] drm/amdgpu: add sienna_cichlid asic type

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 + include/drm/amd_asic_type.h| 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/

[PATCH 010/207] drm/amdgpu/gmc10: add sienna_cichlid support

From: Likun Gao Same as navi10. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c i

[PATCH 021/207] drm/amdgpu: add sdma ip block for sienna_cichlid (v5)

From: Likun Gao Sienna_Cichlid have 4 sdma controllers. v2: add missing license to sdma_common.h (Alex) v3: rebase (Alex) v4: squash in policy fix (Alex) v4: squash in fw_name fix Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/

[PATCH 043/207] drm/amd/powerplay: enable PPT and TDC for sienna_cichlid

From: Likun Gao Enable PPT and TDC for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.

[PATCH 052/207] drm/amdgpu: add gmc cg support for sienna_cichlid

From: Likun Gao Add gmc clockgating support for sienna_cichlid. The athub version used for sienna_cichlid is v2.1. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 11 +-- drivers/gpu/drm/amd/amdgpu/mmhub_v2

[PATCH 042/207] drm/amd/powerplay: support to get power index for sienna_cichlid

From: Likun Gao Add function to get smu power index for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- .../drm/amd/powerplay/sienna_cichlid_ppt.c| 21 +++ .../drm/amd/powerplay/sienna_cichlid_ppt.h| 6 ++ 2 file

[PATCH 023/207] drm/amdgpu/gfx10: change register configure for sienna_cichlid

From: Likun Gao Update sienna_cichlid register configuration for sienna_cichlid to match the update of header files. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 369 +++-- 1 file changed, 278

[PATCH 035/207] drm/amd/powerplay: Enable SOCCLK ULV for sienna_cichlid

From: Likun Gao Enable FW DSTATE for sienna_cichlid. Enable DF CSTATE for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/dr

[PATCH 045/207] drm/amdgpu: skip ASD fw load for sienna_cichlid

From: Likun Gao Skip ASD FW load for sienna_cichlid currently. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +- drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 8 +--- 2 files changed, 6 insertions(+), 4 deletio

[PATCH 018/207] drm/amdgpu: add ih ip block for sienna_cichlid

From: Likun Gao Update IH handling for sienna_cichlid Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 21 + drivers/gpu/drm/amd/amdgpu/nv.c| 1 + 2 files changed, 18 insertions(+), 4 del

[PATCH 026/207] drm/amd/powerplay: add support to set performance level for sienna_cichlid

From: Likun Gao Support for performance level set for sienna_cichlid. Set standard performance level not fully support, will set to auto performance level. Set peak performance level not fully support, will do nothing with it. Force clk level only support for 2 level for fine grained DPM. Signed

[PATCH 050/207] drm/amdgpu: Use variable instead of constant for sdma doorbell range

From: Yong Zhao Signed-off-by: Yong Zhao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index 82145572e5a3..52206050adb

[PATCH 022/207] drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 4 ++-- drivers/gpu/drm/amd/include/soc15_ih_clientid.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/a

[PATCH 044/207] drm/amdgpu/powerplay: add smu block for sienna_cichlid

From: Likun Gao Add SMU block for sienna_cichlid with psp load type. Signed-off-by: Likun Gao Reviewed-by: Jack Xiao --- drivers/gpu/drm/amd/amdgpu/nv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index 1b17fca98fef.

[PATCH 037/207] drm/amd/powerplay: support pcie value set and update for sienna_cichlid

From: Likun Gao Add support to set default pcie parameters for sienna_cichlid. Add support to update pcie parameters for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- .../drm/amd/powerplay/sienna_cichlid_ppt.c| 42 +++

[PATCH 040/207] drm/amd/powerplay: enable GFX SS for sienna_cichlid

From: Likun Gao Enable Graphics Clock (GFXCLK) Spread Spectrum for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/pow

[PATCH 047/207] drm/amdgpu: skip for reroute ih for sienna_cichlid psp ring init currently

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Jack Xiao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c index 3

[PATCH 056/207] drm/amdgpu: add the ring type definition of MES

From: Jack Xiao Add a new ring type definition. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgp

[PATCH 029/207] drm/amd/powerplay: enable Ultra Low Voltage for sienna_cichlid

From: Likun Gao Support Ultra Low Voltage for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cich

[PATCH 053/207] drm/amdgpu: add psp block load condition for sienna_cichlid

From: Likun Gao Enable PSP block for firmware loading and other security setup only when amdgpu use PSP load type to load ucode. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++- 1 file changed, 2 insertions(+), 1 del

[PATCH 049/207] drm/amdgpu: update SDMA 5.2 microcode init

From: Likun Gao Removed loading duplicate instances of SDMA FW for Sienna_Cichlid, As sienna_cichlid only use a single image for all instances. Signed-off-by: Likun Gao Reviewed-by: John Clements Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 99 ++--

[PATCH 030/207] drm/amd/powerplay: enable Graphics Clock Deep Sleep for sienna_cichlid

From: Likun Gao Enable Graphics Clock Deep Sleep for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd

[PATCH 033/207] drm/amdgpu/powerplay: set UCLK DPM for sienna_cichlid

From: Likun Gao Enable uclk dpm for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c

[PATCH 024/207] drm/amdgpu: add virtual display support for sienna_cichlid

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index 860c69cccf94..1b17fca98fef 100644 -

[PATCH 046/207] drm/amdgpu/psp: add psp support for sienna_cichlid

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Jack Xiao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 + drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 7 +++ 2 files changed, 8 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers

[PATCH 036/207] drm/amd/powerplay: enable DCEFCLK DPM and DS for sienna_cichlid

From: Likun Gao Enable Display Clocks Dynamic Power Management (DPM) for sienna_cichlid. Enable Display Controller Engine Fabric Clock Deep Sleep for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichli

[PATCH 039/207] drm/amd/powerplay: enable LCLK DPM for sienna_cichlid

From: Likun Gao Enable LCLK DPM for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c

[PATCH 034/207] drm/amd/powerplay: make gfx ds can be configure for sienna_cichlid

From: Likun Gao Make GFX deep sleep can be configure for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/dr

[PATCH 048/207] drm/amdgpu: enable psp ip block for sienna_cichlid

From: Likun Gao Signed-off-by: Likun Gao Reviewed-by: Jack Xiao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index e2d97bcdf328..a4a80aed4b96 100644 --- a/d

[PATCH 027/207] drm/amd/powerplay: set SOCCLK DPM for sienna_cichlid

From: Likun Gao Support for SOCCLK DPM for sienna_cichlid. Use feature mask to control DPM for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 14 +++--- 1 file changed, 11 inserti

[PATCH 055/207] drm/amdgpu: assign the doorbell index to mes ring

From: Jack Xiao MES ring will use the assigned doorbell index for command submission. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++ drivers/gpu/drm/amd/amdgpu/nv.c

[PATCH 054/207] drm/amdgpu: add 2rd VCN instance doorbell support

From: Leo Liu Sienna_Cichlid have 2 VCN instances, using different register for range Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Reviewed-by: James Zhu Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 7 ++- drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

[PATCH 066/207] drm/amdgpu/mes10.1: enable the mes ring during initialization

From: Jack Xiao Enable the mes ring during mes block initialization. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 31 ++ 1 file changed, 31 insertions(+) diff --gi

[PATCH 041/207] drm/amd/powerplay: enable Fan control for sienna_cichlid

From: Likun Gao Support for Advanced Fan Control (AFC+) for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/powerplay/

[PATCH 057/207] drm/amdgpu: avoid dereferencing a NULL pointer

From: Jack Xiao Check if irq_src is NULL to avoid dereferencing a NULL pointer, for MES ring is uneccessary to recieve an interrupt notification. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/

[PATCH 028/207] drm/amd/powerplay: set FCLK DPM for sienna_cichlid

From: Likun Gao Support for FCLK DPM for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/powerpl

[PATCH 025/207] drm/amdgpu/powerplay: add initial swSMU support for sienna_cichlid (v2)

From: Likun Gao SMU11 based similar to navi1x. v2: squash in SMU IF updates Signed-off-by: Likun Gao Reviewed-by: Evan Quan Reviewed-by: Kevin Wang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/Makefile|2 +- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 10

[PATCH 061/207] drm/amdgpu/mes10.1: implement the ring functions of mes specific

From: Jack Xiao Implement mes ring functions and set up them. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 43 ++ 1 file changed, 43 insertions(+) diff --git a/dri

[PATCH 038/207] drm/amd/powerplay: support to print pcie levels for sienna_cichlid

From: Likun Gao Support to print PCIE clk levels for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- .../drm/amd/powerplay/sienna_cichlid_ppt.c| 31 +++ .../drm/amd/powerplay/sienna_cichlid_ppt.h| 3 ++ 2 files chang

[PATCH 051/207] drm/amdgpu: add support for athub v2.1

From: Likun Gao Add athub v2.1 function and support to compile it. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/Makefile | 3 +- drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 100 drivers/gpu/drm/amd

[PATCH 032/207] drm/amdgpu/powerplay: set Thermal control for sienna_cichlid

From: Likun Gao Enable Auto Thermal Throttling for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/p

[PATCH 059/207] drm/amdgpu/mes10.1: allocate the eop buffer

From: Jack Xiao eop buffer will be used for mes queue setup. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 33 ++ 1 file changed, 33 insertions(+) diff --git a/driv

[PATCH 062/207] drm/amdgpu/mes10.1: allocate mqd buffer

From: Jack Xiao Allocate mqd buffer preparing for mes queue setup. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 37 ++ 1 file changed, 37 insertions(+) diff --git

[PATCH 079/207] drm/amdgpu: add mes block to sienna_cichlid

From: Jack Xiao Add mes block support to sienna_cichlid. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers

[PATCH 076/207] drm/amdgpu/psp: convert amdgpu mes ucode type

From: Jack Xiao Convert to psp defined ucode item, so that psp can recognize them. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/dri

[PATCH 067/207] drm/amdgpu/mes10.1: add the mes fw api

From: Jack Xiao Add the definitions of mes commands. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_api_def.h | 405 +++ drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 1 + 2 files c

[PATCH 073/207] drm/amdgpu/mes10.1: add sienna_cichlid mes firmware support

From: Jack Xiao Add sienna_cichlid mes firmware support. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v

[PATCH 065/207] drm/amdgpu/mes10.1: install mes queue via kiq

From: Jack Xiao Install mes queue via kiq. Disable it temporarily until it's workable. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 27 ++ 1 file changed, 27 insert

[PATCH 082/207] drm/amdgpu: add VCN3.0 support for Sienna_Cichlid

From: Leo Liu With basic IP block functions and ring functions Signed-off-by: Leo Liu Reviewed-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/Makefile | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 1 + drivers/gpu/drm/amd/amdgpu/vc

[PATCH 064/207] drm/amdgpu/mes10.1: install mes queue by register programming

From: Jack Xiao Directly writing mes queue registers to set up it. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 62 ++ 1 file changed, 62 insertions(+) diff --git

[PATCH 083/207] drm/amdgpu: add Sienna_Cichlid VCN PG and CG support (v2)

From: Leo Liu This is for static powergating and clockgating v2: fix registers (Alex) Signed-off-by: Leo Liu Reviewed-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 332 ++ 1 file changed, 332 insertions(

[PATCH 063/207] drm/amdgpu/mes10.1: initialize the mqd

From: Jack Xiao Initialize the mqd according to mes ring setup. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 130 + 1 file changed, 130 insertions(+) diff --git a/

[PATCH 058/207] drm/amdgpu/mes: update some mes definitions

From: Jack Xiao Update some mes definitions. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 42 +++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/driv

[PATCH 075/207] drm/amdgpu: upload mes firmware to gpu buffer

From: Jack Xiao Copy mes firmware to gpu buffer. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgp

[PATCH 031/207] drm/amd/powerplay: enable SOC Clock Deep Sleep for sienna_cichlid

From: Likun Gao Enable System On Chip Clock Deep Sleep for sienna_cichlid. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/d

[PATCH 060/207] drm/amdgpu/mes10.1: initialize the software part of mes ring

From: Jack Xiao Do the software initialization on the mes ring. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/d

[PATCH 070/207] drm/amdgpu/mes10.1: implement removing hardware queue

From: Jack Xiao The routine is implemented to generate mes command to remove a specified hardware queue. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 19 ++- 1 file changed

[PATCH 074/207] drm/amdgpu/mes10.1: copy mes fw info into global fw array

From: Jack Xiao Copy mes firmware info into into global fw array, preparing for fw front door loading. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 17 + 1 file changed, 17

[PATCH 071/207] drm/amdgpu/mes10.1: implement querying the scheduler status

From: Jack Xiao The routine is implemented to generate mes command to query the status of hardware scheduler. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 19 +++ 1 file ch

[PATCH 072/207] drm/amdgpu/mes10.1: implement setting hardware resources

From: Jack Xiao The routine is implemented to generate mes command to assign the hardware resources which can be scheduled to mes. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 41 +

[PATCH 086/207] drm/amdgpu: enable VCN3.0 for Sienna_Cichlid

From: Leo Liu By adding VCN HW block to Sienna_Cichlid Signed-off-by: Leo Liu Reviewed-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm

[PATCH 077/207] drm/amdgpu: no need to set up GPU scheduler for mes ring

From: Jack Xiao As mes ring directly submits to hardwared, it's no need to set up GPU scheduler for mes ring. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c |

[PATCH 085/207] drm/amdgpu: add Sienna_Cichlid VCN to the VCN family

From: Leo Liu By adding Sienna_Cichlid VCN firmware Signed-off-by: Leo Liu Reviewed-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

[PATCH 080/207] drm/amdgpu: update the num of queue per pipe for mec on sienna_cichlid

From: Likun Gao The number of queue per pipe for mec on sienna_cichlid should be 4. Signed-off-by: Likun Gao Reviewed-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/d

[PATCH 069/207] drm/amdgpu/mes10.1: implement adding hardware queue

From: Jack Xiao The routine is implemented to generate mes command to install a hardware queue. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 50 +- 1 file changed,

[PATCH 078/207] drm/amdgpu/mes10.1: update mes initialization

From: Jack Xiao Update mes initialization sequence. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 20 +++- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/dri

[PATCH 084/207] drm/amdgpu: enable VCN3.0 PG and CG for Sienna_Cichlid

From: Leo Liu By setting up the flags to the ASIC Signed-off-by: Leo Liu Reviewed-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/dr

[PATCH 068/207] drm/amdgpu/mes10.1: add the helper function for mes command submission

From: Jack Xiao The helper function is used to submit mes command and poll waiting for the command completion. v2: replaced with amdgpu_fence_wait_polling to wait. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd

[PATCH 081/207] drm/amdgpu/mes: correct register offset for sienna_cichlid

From: Likun Gao Correct CP_MES_IC_OP_CNTL register address for sienna_cichlid on mes v10.1. Signed-off-by: Likun Gao Reviewed-by: Jack Xiao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 39 +++--- 1 file changed, 35 insertions(+), 4 deletions(-)

[PATCH 087/207] drm/amdgpu: add JPEG3.0 support for Sienna_Cichlid

From: Leo Liu With basic IP block functions and ring functions Signed-off-by: Leo Liu Reviewed-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/Makefile| 3 +- drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 484 + driver

[PATCH 088/207] drm/amdgpu: add Sienna_Cichlid JPEG PG and CG support

From: Leo Liu This is for static powergating and clockgating Signed-off-by: Leo Liu Reviewed-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 129 + 1 file changed, 129 insertions(+) diff --git a/drivers/g

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