Am 20.12.19 um 07:24 schrieb Alex Sierra:
This can be used directly from amdgpu and amdkfd to invalidate
TLB through pasid.
It supports gmc v7, v8, v9 and v10.
Change-Id: I6563a8eba2e42d1a67fa2547156c20da41d1e490
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 6 ++
Today I got several kernel messages. I do not know how to reproduce this
messages.
I run an AMD Ryzen 5 2600X on a ASUS STRIX RX 5700XT
I added the 4 reports thrown below.
Have a nice day.
Kind regards,
Dominik/
/
1st report:
05.01.20 14:58 [drm] REG_WAIT timeout 1us * 10 trie
>[kevin]:
>for these paris of message, the smu driver should be better to add lock to
>protect bellow case on multi thread case (eg: cat sysfs)
>High A + Low B
>High B + Low A
Hmm, that's what I was trying to avoid to do(add internal lock protections).
As, these should be proper protected/locked
Ping..
> -Original Message-
> From: Quan, Evan
> Sent: Friday, January 3, 2020 5:47 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan
> Subject: [PATCH] drm/amd/powerplay: issue proper hdp flush for table
> transferring
>
> Guard the content consistence between the view of GPU and
Ping..
> -Original Message-
> From: Quan, Evan
> Sent: Friday, January 3, 2020 5:47 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan
> Subject: [PATCH] drm/amd/powerplay: cleanup the interfaces for powergate
> setting through SMU
>
> Provided an unified entry point. And fixed the
[AMD Public Use]
> -原始郵件-
> 寄件者: Lyude Paul
> 寄件日期: Saturday, January 4, 2020 4:35 AM
> 收件者: Lin, Wayne ; dri-
> de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
> 副本: Kazlauskas, Nicholas ; Wentland,
> Harry ; Lipski, Mikita ;
> Zuo, Jerry ; sta...@vger.kernel.org
> 主旨: Re: [
