> Applied. thanks!
>
> Alex
Thanks a lot!
zhong.shiqi
> On Wed, Oct 23, 2019 at 9:35 AM Harry Wentland wrote:
> >
> > On 2019-10-23 4:32 a.m., zhongshiqi wrote:
> > > dc.c:583:null check is needed after using kzalloc function
> > >
> > > Signed-off-by: zhongshiqi
> >
> > Reviewed-by: Harry W
From: Madhuparna Bhowmik
This patch fixes the following warning: Incorrect use of
kernel-doc format: * @atomic_obj
by adding a colon after @atomic_obj.
Signed-off-by: Madhuparna Bhowmik
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +-
1 file changed, 1 insertion(+), 1 d
On Tue, Oct 15, 2019 at 03:12:29PM -0300, Jason Gunthorpe wrote:
> +static void mn_itree_release(struct mmu_notifier_mm *mmn_mm,
> + struct mm_struct *mm)
> +{
> + struct mmu_notifier_range range = {
> + .flags = MMU_NOTIFIER_RANGE_BLOCKABLE,
> +
On Fri, Oct 25, 2019 at 03:40:50PM -0500, KyleMahlkuch wrote:
> From: Kyle Mahlkuch
>
> During kexec some adapters hit an EEH since they are not properly
> shut down in the radeon_pci_shutdown() function. Adding
> radeon_suspend_kms() fixes this issue.
> Enabled only on PPC because this patch cau
From: Jiange Zhao
SRIOV VF doesn't support BACO.
Only PF with BACO capability can do it.
Signed-off-by: Jiange Zhao
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 2
From: Jiange Zhao
in amdgpu_device_ip_reinit_early_sriov, after IH hw_init,
only IH's hw.status is true. Other three IP's hw.status
are re-set to false, even though they have already done
hw_init.
The new way is to do hw_init for each IP in the list,
regardless of hw.status. And set hw.status on
Hi Changfeng,
> So how can we deal with the firmware between mec version(402) and mec
> version(421)?
Well of hand I see only two options: Either print a warning or
completely reject loading the driver.
Completely rejecting loading the driver is probably not a good idea and
the issue is actual
Am 26.10.19 um 00:59 schrieb Tuikov, Luben:
> The GRBM interface is now capable of bursting
> 1-cycle op per register, a WRITE followed by
> another WRITE, or a WRITE followed by a READ--much
> faster than previous muti-cycle per
> completed-transaction interface. This causes a
> problem, whereby s
Am 26.10.19 um 00:41 schrieb Tuikov, Luben:
> Simplify padding calculations.
>
> v2: Comment update and spacing.
>
> Signed-off-by: Luben Tuikov
Reviewed-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 4 ++--
> drive
PSP lost connection when err_event_athub occurs. These cleanup work can be
skipped in BACO reset.
Change-Id: If54a3735edd6ccbb58d40a5f8833392981f8ce37
Signed-off-by: Le Ma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c| 7 +++
drivers
Otherwise next err_event_athub error cannot call gpu reset.
Change-Id: I5cd293f30f23876bf2a1860681bcb50f47713ecd
Signed-off-by: Le Ma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/dr
The err_event_athub error will mess up the buffer and cause UVD resume hang.
Change-Id: If17a2161fb9b1b52eac08de00d2e935191bdbf99
Signed-off-by: Le Ma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amd
From: Le Ma
Change-Id: Ia8a61a4b3bd529f0f691e43e69b299d7d151c0c2
Signed-off-by: Le Ma
---
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index 0db458
We should hold on patch #2 and patch #4 until we have baco based RAS recovery
works since current ras recovery policy is changed by these two patches.
Other than that, the Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Le Ma
Sent: 2
Hi Christian,
Should we also realize the function of gfx_v9_0_wait_reg_mem in gfx10 like gfx9
since gfx10 also realize write/wait command in a single packet after CL#1761300?
Or we can add dummy read in gmc10 by using emit_wait like Luben's way?
BR,
Changfeng.
-Original Message-
From:
On Fri, Oct 25, 2019 at 5:21 PM Zhao, Yong wrote:
>
> Given amdkfd.ko has been merged into amdgpu.ko, this switch is no
> longer useful.
>
> Change-Id: If56b80e086f4ea26f347c70b620b3892afc24ddf
> Signed-off-by: Yong Zhao
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 1 -
> driver
Correct the "_LENTH" mispelling in the AMDGPU_MAX_TIMEOUT_PARAM_LENGTH
constant.
Signed-off-by: Wambui Karuga
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 2 +-
3 files changed, 5 insert
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
Cc: Alex Deucher
Cc: Christian König
Cc: David (ChunMing) Zhou
Cc: amd-gfx@lists.freedesktop.org
Acked-by: Alex Deucher
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c |
ping
On 2019/10/9 14:25, zhengbin wrote:
> zhengbin (3):
> drm/amd/display: Remove set but not used variables
> 'bl_pwm_cntl','pwm_period_cntl'
> drm/amd/display: Remove set but not used variable 'value0'
> drm/amd/display: Remove set but not used variables 'regval','speakers'
>
> drive
Declare `amdgpu_exp_hw_support` as extern in amdgpu.h to address the
following sparse warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:118:5: warning: symbol
'amdgpu_exp_hw_support' was not declared. Should it be static?
Signed-off-by: Wambui Karuga
Suggested-by: Harry Wentland
---
drivers/gpu
This patchset addresses the sparse warning about the
`amdgpu_exp_hw_support` variable and corrects the mispelling of the
word "_LENTH".
Wambui Karuga (2):
drm/amd: declare amdgpu_exp_hw_support in amdgpu.h
drm/amd: correct "_LENTH" mispelling in constant
drivers/gpu/drm/amd/amdgpu/amdgpu.h
Acked-by: Alex Deucher
From: amd-gfx on behalf of
jia...@amd.com
Sent: Monday, October 28, 2019 6:14 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily ; Zhao, Jiange ;
Nieto, David M
Subject: [PATCH] drm/amdgpu/SRIOV: SRIOV VF doesn't support BACO
From: J
Fix sparse warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c:963:6:
warning: symbol 'calculate_integer_scaling' was not declared. Should it be
static?
Reported-by: Hulk Robot
Signed-off-by: YueHaibing
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +-
1 file cha
I think we should implement the write/wait combined command in gfx10.
Did we ever released any firmware which couldn't do this?
Christian.
Am 28.10.2019 13:07 schrieb "Zhu, Changfeng" :
Hi Christian,
Should we also realize the function of gfx_v9_0_wait_reg_mem in gfx10 like gfx9
since gfx10 al
Fix sparse warnings:
drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c:2050:5:
warning: symbol 'arcturus_i2c_eeprom_control_init' was not declared. Should it
be static?
drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c:2068:6:
warning: symbol 'arcturus_i2c_eeprom_control_fini' was not
On Mon, Oct 28, 2019 at 9:36 AM YueHaibing wrote:
>
> Fix sparse warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c:963:6:
> warning: symbol 'calculate_integer_scaling' was not declared. Should it be
> static?
>
> Reported-by: Hulk Robot
> Signed-off-by: YueHaibing
Appli
Hi Zheng,
Harry's previous comment about the superfluous REG_READ()s is still unaddressed.
Once that's fixed, I can give my r-b.
Thanks,
Leo
On 2019-10-28 5:32 a.m., zhengbin (A) wrote:
> ping
>
> On 2019/10/9 14:25, zhengbin wrote:
>> zhengbin (3):
>> drm/amd/display: Remove set but not use
On Mon, Oct 28, 2019 at 8:47 AM Wambui Karuga wrote:
>
> This patchset addresses the sparse warning about the
> `amdgpu_exp_hw_support` variable and corrects the mispelling of the
> word "_LENTH".
>
> Wambui Karuga (2):
> drm/amd: declare amdgpu_exp_hw_support in amdgpu.h
> drm/amd: correct "_
On Mon, Oct 28, 2019 at 9:37 AM YueHaibing wrote:
>
> Fix sparse warnings:
>
> drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c:2050:5:
> warning: symbol 'arcturus_i2c_eeprom_control_init' was not declared. Should
> it be static?
> drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c:206
The DMCUB is the Display MicroController Unit B, a display microcontroller
that is required for Renoir to support realtime display features
(ABM, PSR) and display hardware initialization.
This patch series adds the required firmware loading support in amdgpu
and the DMUB service support for amdgpu
On Fri, Oct 25, 2019 at 4:44 PM KyleMahlkuch
wrote:
>
> From: Kyle Mahlkuch
>
> During kexec some adapters hit an EEH since they are not properly
> shut down in the radeon_pci_shutdown() function. Adding
> radeon_suspend_kms() fixes this issue.
> Enabled only on PPC because this patch causes issu
DMCUB ucode requires secure loading through PSP. This is already
supported in PSP as GFX_FW_TYPE_DMUB, it just needs to be mapped from
AMDGPU_UCODE_ID_DMCUB to GFX_FW_TYPE_DMUB.
DMUB is a shorthand name for DMCUB and can be used interchangeably.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gp
The DMUB service is the interface to the DMCUB.
It's required to support Renoir features so it will be enabled and
compiled automatically when the Renoir display engine is enabled via
CONFIG_DRM_AMD_DC_DCN2_1.
DMUB code will initially be guarded by CONFIG_DRM_AMD_DC_DMUB and later
switched to CON
The interface to the DMCUB won't be through DC itself. DC will instead
call into the DMUB interface introduced with a future change.
The CONFIG_DRM_AMD_DC_DMUB defines will still be used for now but will
be dropped at the end of the series.
Since this define was never configurable in the first pl
[Why]
We need DMCUB on Renoir to support DMCU and PHY initialization.
The DMUB service provides a mechanism to load the DMCUB.
[How]
Include the DMUB service in amdgpu_dm.
Frontdoor loading of the DMCUB firmware needs to happen via PSP. To
pass the firmware to PSP we need to hand it off to the fi
[Why]
Support for DMUB only depends on support for DC. It doesn't use floating
point so we don't need to guard it by any specific DCN revision.
[How]
Drop the guards and cleanup the newlines around each one.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/Kconfig |
From: Yongqiang Sun
[Why]
PSP version format is AB.CD.EF.GH, where CD and GH is the main version.
current psp version check for dmcub loading dmcu check 0x00110029, in
case of some psp version eg: 0x00110227 which main version should be
0x00110027, will result in unexpeceted dmcub loading dmcu FW
DC will use DMUB for command submission and flow control during
initialization.
Register offloading as well as submitting some BIOS commands are part
of the DC internal interface but are guarded behind debug options.
It won't be functional in amdgpu_dm yet since we don't pass the
DMUB service to
[Why]
DC can utilize the DMUB server to send commands to the DMUB but it's
the DM responsibility to pass it the service to use.
[How]
Create the dc_dmub_srv after we finish initializing the dmub_srv.
Cleanup the dc_dmub_srv before destroying the dmub_srv or dc.
Signed-off-by: Nicholas Kazlauskas
The DMCUB is a secondary DMCU (Display MicroController Unit) that has
its own separate firmware. It's required for DMCU support on Renoir.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 11 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 9 +
From: Yongqiang Sun
[Why]
DMCU isn't intiliazed properly by dmcub loading due to dmcub initialize
sequence.
[How]
Change dmcu init sequece to meet dmcub initilize.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
---
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c | 79 +++
The DMCUB firmware version can be read using the AMDGPU_INFO ioctl
or the amdgpu_firmware_info debugfs entry.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 12
include/uapi/drm/amdgpu_drm.h | 3 +++
2 files changed, 15 insertions(+)
dif
From: Mikita Lipski
- Adding encoder atomic check to find vcpi slots for a connector
- Using DRM helper functions to calculate PBN
- Adding connector atomic check to release vcpi slots if connector
loses CRTC
- Calculate PBN and VCPI slots only once during atomic
check and store them on crtc_sta
On 2019/10/28 22:06, Alex Deucher wrote:
> On Mon, Oct 28, 2019 at 9:37 AM YueHaibing wrote:
>>
>> Fix sparse warnings:
>>
>> drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c:2050:5:
>> warning: symbol 'arcturus_i2c_eeprom_control_init' was not declared. Should
>> it be static?
>> driver
Am 26.10.19 um 00:32 schrieb Alex Deucher:
On Fri, Oct 25, 2019 at 8:16 AM Christian König
wrote:
[SNIP]
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 6f0b789a0b49..b319254537b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
Add an DMA-buf export implementation independent of the DRM helpers.
This not only avoids the caching of DMA-buf mappings, but also
allows us to use the new dynamic locking approach.
This is also a prerequisite of unpinned DMA-buf handling.
v2: fix unintended recursion, remove debugging leftover
Instead of relying on the DRM functions just implement our own import
functions. This prepares support for taking care of unpinned DMA-buf.
v2: enable for all exporters, not just amdgpu, fix invalidation
handling, lock reservation object while setting callback
v3: change to new dma_buf attach
Modified according to the comment and pushed. Thanks!
Regards,
Yong
From: Alex Deucher
Sent: Monday, October 28, 2019 8:39 AM
To: Zhao, Yong
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdkfd: Delete unnecessary pr_fmt switch
On Fri, Oct 25, 2019
Series is:
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Christian
König
Sent: Monday, October 28, 2019 11:14 AM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH 2/2] drm/amdgpu: add independent DMA-buf import v9
Instead of relying on the DRM functions
Thanks, as discussed internally I've just pushed those two to
drm-misc-next instead of amd-staging-drm-next.
Christian.
Am 28.10.19 um 16:38 schrieb Deucher, Alexander:
Series is:
Reviewed-by: Alex Deucher
*From:* amd-gf
On 2019-10-24 5:14 p.m., Zhao, Yong wrote:
> The KIQ is on the second MEC and its reservation is covered in the
> latter logic, so no need to reserve its bit twice.
>
> Change-Id: Ieee390953a60c7d43de5a9aec38803f1f583a4a9
> Signed-off-by: Yong Zhao
Reviewed-by: Felix Kuehling
> ---
> drivers
Hello. This is my first time trying to report a bug, I hope I'm in the
right place.
I have a PC with MSI A68HM-E33 V2 motherboard, and AMD A8-7680 CPU with
Radeon R7.
I'm running Debian 9 Stretch, Kernel~4.19.0-0.bpo.6-amd64, using amdgpu
driver, and I get video only on the HDMI output.
xr
On Wed, Oct 23, 2019 at 4:10 AM YueHaibing wrote:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1221:24: warning: variable adev set
> but not used [-Wunused-but-set-variable]
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:488:24: warning: variable adev set
> but not used [-Wunused-but-set-variable]
> d
On Mon, Oct 21, 2019 at 6:23 PM Geert Uytterhoeven
wrote:
>
> There is no need to cast a typed pointer to a void pointer when calling
> a function that accepts the latter. Remove it, as the cast prevents
> further compiler checks.
>
> Signed-off-by: Geert Uytterhoeven
Applied. Thanks!
Alex
>
On Mon, Oct 28, 2019 at 1:21 PM MONSSA wrote:
>
> Hello. This is my first time trying to report a bug, I hope I'm in the
> right place.
>
> I have a PC with MSI A68HM-E33 V2 motherboard, and AMD A8-7680 CPU with
> Radeon R7.
>
> I'm running Debian 9 Stretch, Kernel~4.19.0-0.bpo.6-amd64, using amdg
From: Jason Gunthorpe
gntdev simply wants to monitor a specific VMA for any notifier events,
this can be done straightforwardly using mmu_range_notifier_insert() over
the VMA's VA range.
The notifier should be attached until the original VMA is destroyed.
It is unclear if any of this is even sa
From: Jason Gunthorpe
Only the function calls are stubbed out with static inlines that always
fail. This is the standard way to write a header for an optional component
and makes it easier for drivers that only optionally need HMM_MIRROR.
Reviewed-by: Jérôme Glisse
Signed-off-by: Jason Gunthorp
From: Jason Gunthorpe
This converts one of the two users of mmu_notifiers to use the new API.
The conversion is fairly straightforward, however the existing use of
notifiers here seems to be racey.
Cc: Mike Marciniszyn
Cc: Dennis Dalessandro
Signed-off-by: Jason Gunthorpe
---
drivers/infinib
From: Jason Gunthorpe
The new API is an exact match for the needs of radeon.
For some reason radeon tries to remove overlapping ranges from the
interval tree, but interval trees (and mmu_range_notifier_insert)
support overlapping ranges directly. Simply delete all this code.
Since this driver i
From: Jason Gunthorpe
Remove the hmm_mirror object and use the mmu_range_notifier API instead
for the range, and use the normal mmu_notifier API for the general
invalidation callback.
While here re-organize the pagefault path so the locking pattern is clear.
nouveau is the only driver that uses
From: Jason Gunthorpe
hmm_mirror's handling of ranges does not use a sequence count which
results in this bug:
CPU0 CPU1
hmm_range_wait_until_valid(range)
valid == true
From: Jason Gunthorpe
DMA_SHARED_BUFFER can not be enabled by the user (it represents a library
set in the kernel). The kconfig convention is to use select for such
symbols so they are turned on implicitly when the user enables a kconfig
that needs them.
Otherwise the XEN_GNTDEV_DMABUF kconfig i
From: Jason Gunthorpe
The only two users of this are now converted to use mmu_range_notifier,
delete all the code and update hmm.rst.
Reviewed-by: Jérôme Glisse
Signed-off-by: Jason Gunthorpe
---
Documentation/vm/hmm.rst | 105 ---
include/linux/hmm.h | 183 +-
From: Jason Gunthorpe
Now that we have KERNEL_HEADER_TEST all headers are generally compile
tested, so relying on makefile tricks to avoid compiling code that depends
on CONFIG_MMU_NOTIFIER is more annoying.
Instead follow the usual pattern and provide most of the header with only
the functions
From: Jason Gunthorpe
Replace the internal interval tree based mmu notifier with the new common
mmu_range_notifier_insert() API. This removes a lot of code and fixes a
deadlock that can be triggered in ODP:
zap_page_range()
mmu_notifier_invalidate_range_start()
[..]
ib_umem_notifier_in
From: Jason Gunthorpe
There is no reason to get the invalidate_range_start() callback via an
indirection through hmm_mirror, just register a normal notifier directly.
Cc: Ben Skeggs
Cc: dri-de...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: Ralph Campbell
Signed-off-by: Jason Gu
From: Jason Gunthorpe
find_vma() must be called under the mmap_sem, reorganize this code to
do the vma check after entering the lock.
Further, fix the unlocked use of struct task_struct's mm, instead use
the mm from hmm_mirror which has an active mm_grab. Also the mm_grab
must be converted to a
From: Jason Gunthorpe
Of the 13 users of mmu_notifiers, 8 of them use only
invalidate_range_start/end() and immediately intersect the
mmu_notifier_range with some kind of internal list of VAs. 4 use an
interval tree (i915_gem, radeon_mn, umem_odp, hfi1). 4 use a linked list
of some kind (scif_dm
From: Jason Gunthorpe
Convert the collision-retry lock around hmm_range_fault to use the one now
provided by the mmu_range notifier.
Although this driver does not seem to use the collision retry lock that
hmm provides correctly, it can still be converted over to use the
mmu_range_notifier api in
From: Jason Gunthorpe
8 of the mmu_notifier using drivers (i915_gem, radeon_mn, umem_odp, hfi1,
scif_dma, vhost, gntdev, hmm) drivers are using a common pattern where
they only use invalidate_range_start/end and immediately check the
invalidating range against some driver data structure to tell i
From: Jason Gunthorpe
Remove the interval tree in the driver and rely on the tree maintained by
the mmu_notifier for delivering mmu_notifier invalidation callbacks.
For some reason amdgpu has a very complicated arrangement where it tries
to prevent duplicate entries in the interval_tree, this is
BACO - Bus Active, Chip Off
Used to check whether the device supports BACO. This will
be used to enable runtime pm on devices which support BACO.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4
1 file changed, 4 insertions(+)
diff --git a/
Move reset_method next to reset callback to match the struct layout and
the other definition in this file.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/
BACO - Bus Active, Chip Off
Check the BACO capabilities from the powerplay table.
v2: drop unrelated struct cleanup
Reviewed-by: Evan Quan (v1)
Signed-off-by: Alex Deucher
---
v2: drop unrelated struct cleanup
drivers/gpu/drm/amd/amdgpu/soc15.c | 24
1 file changed,
This patch set enables BACO (Bus Active Chip Off) for
power savings on VI+ asics. Similar to PowerXpress
and Hybrid Graphics (PX/HG) laptops, we can disable GPUs
at runtime when they are not in use is they support
BACO. The runtime pm code in amdgpu was originally
developed for PX/HG laptops, so
BACO - Bus Active, Chip Off
Not supported.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/si.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 29024e64c886..cb682d44737a 100644
BACO - Bus Active, Chip Off
Check the BACO capabilities from the powerplay table.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/cik.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/a
BACO - Bus Active, Chip Off
BOCO - Bus Off, Chip Off
We will take slightly different paths for boco and baco.
v2: fold together two consecutive if clauses
Reviewed-by: Evan Quan (v1)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 47 ++---
1 file
BACO - Bus Active, Chip Off
Check the BACO capabilities from the powerplay table.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu
BACO - Bus Active, Chip Off
This adds the necessary support to the runtime suspend
and resume functions to handle boards that support
baco.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
BACO - Bus Active, Chip Off
BOCO - Bus Off, Chip Off
To better match what we are checking for and to align with
amdgpu_device_supports_baco.
BOCO is used on PowerXpress/Hybrid Graphics systems and BACO
is used on desktop dGPU boards.
v2: fix typo in documentation
Reviewed-by: Evan Quan
Signed-
BACO - Bus Active, Chip Off
To check if a device supports BACO or not. This will be
used in determining when to enable runtime pm.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 15
BACO - Bus Active, Chip Off
Seems to work reliably on VI+.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/a
Only enable the vga_switcheroo logic on systems with the
ATPX ACPI method. This logic is not needed for asics
that are not part of a PX (PowerXpress)/HG (Hybrid Graphics)
platform.
Acked-by: Evan Quan
Signed-off-by: Alex Deucher
---
v2:
- check CONFIG_ACPI
- fix pci ref logic
sound/pci/hda/hd
BACO - Bus Active, Chip Off
Everything is in place now. Not enabled by default yet. You
still have to specify runpm=1.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git
BACO - Bus Active, Chip Off
So we can use it for power savings rather than just reset.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 7 ++-
drivers/gpu/drm/amd/amdgpu/soc15.c| 10 --
drivers/gpu/drm/amd/powerplay
BACO - Bus Active, Chip Off
BOCO - Bus Off, Chip Off
We originally only supported runtime pm on PX/HG
laptops so most of the runtime pm code looks for this.
Add a new flag to check for runtime pm enablement and
use this rather than checking for PX/HG.
Reviewed-by: Evan Quan
Signed-off-by: Alex D
BACO - Bus Active, Chip Off
Check the BACO capabilities from the powerplay table.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vi.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm
Originally we only supported runtime pm on PX/HG laptops
so vga_switcheroo and runtime pm are sort of entangled.
Attempt to logically separate them.
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 ++
1 file changed, 14
BACO - Bus Active, Chip Off
Will be used for runtime pm. Entry will enter the BACO
state (chip off). Exit will exit the BACO state (chip on).
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |
We are able to power down the GPU and audio via the GPU driver
so flag these asics as supporting runtime pm.
Acked-by: Evan Quan
Signed-off-by: Alex Deucher
---
v2:
- split out adding the new pci ids
sound/pci/hda/hda_intel.c | 35 +++
1 file changed, 23 insert
These are needed so we can enable runtime pm in a subsequent
patch.
Signed-off-by: Alex Deucher
---
sound/pci/hda/hda_intel.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index ab6c4e7c468b..a07cc8dca7de 100644
--- a/so
So that we can power down the GPU and audio to save power.
Acked-by: Evan Quan
Signed-off-by: Alex Deucher
---
sound/pci/hda/patch_hdmi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index bea7b0961080..26613733f109 100644
--- a/sou
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Le Ma
Sent: Monday, October 28, 2019 7:31 PM
To: amd-gfx@lists.freedesktop.org
Cc: Ma, Le
Subject: [PATCH 2/4] drm/amdgpu: reset err_event_athub flag if gpu recovery
succeeded
Otherwise next err_event_athub error cannot ca
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Le Ma
Sent: Monday, October 28, 2019 7:31 PM
To: amd-gfx@lists.freedesktop.org
Cc: Ma, Le
Subject: [PATCH 4/4] drm/amdgpu: remove ras global recovery handling from
ras_controller_int handler
From: Le Ma
Change-Id: Ia8a6
On Mon, 28 Oct 2019 22:42:13 +0100,
Alex Deucher wrote:
>
> @@ -35,6 +35,11 @@
> #include
> #include
> #include
> +#ifdef SUPPORT_VGA_SWITCHEROO
> +#ifdef CONFIG_ACPI
> +#include
> +#endif
> +#endif
I don't think we need ifdefs here.
Other than that,
Reviewed-by: Takashi Iwai
thanks,
On Mon, 28 Oct 2019 22:42:14 +0100,
Alex Deucher wrote:
>
> These are needed so we can enable runtime pm in a subsequent
> patch.
>
> Signed-off-by: Alex Deucher
Reviewed-by: Takashi Iwai
thanks,
Takashi
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On Mon, 28 Oct 2019 22:42:15 +0100,
Alex Deucher wrote:
>
> We are able to power down the GPU and audio via the GPU driver
> so flag these asics as supporting runtime pm.
>
> Acked-by: Evan Quan
> Signed-off-by: Alex Deucher
> ---
>
> v2:
> - split out adding the new pci ids
Reviewed-by: Taka
On Mon, 28 Oct 2019 22:42:16 +0100,
Alex Deucher wrote:
>
> So that we can power down the GPU and audio to save power.
>
> Acked-by: Evan Quan
> Signed-off-by: Alex Deucher
Reviewed-by: Takashi Iwai
thanks,
Takashi
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