Reviewed-by: Trigger Huang
Thanks & Best Wishes,
Trigger Huang
-Original Message-
From: amd-gfx On Behalf Of Emily Deng
Sent: Friday, May 31, 2019 2:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily
Subject: [PATCH] drm/amdgpu/sriov: Correct some register program method
For th
Am 29.05.19 um 18:29 schrieb Emil Velikov:
> On 2019/05/29, Koenig, Christian wrote:
>> Am 29.05.19 um 15:03 schrieb Emil Velikov:
>>> On 2019/05/29, Dave Airlie wrote:
On Wed, 29 May 2019 at 02:47, Emil Velikov
wrote:
> On 2019/05/28, Koenig, Christian wrote:
>> Am 28.05.19 um
From: Chengming Gui
add gfxoff_state_changed_by_workload to control gfxoff
when set power_profile_mode
Signed-off-by: Chengming Gui
---
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 1 +
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 31 ---
drivers/gpu/drm/amd/
Use SMU firmware version to indentify the raven1 refresh device and
then load homologous RLC FW.
Change-Id: I7aaa67d8b59cfec03355d9199f7fb2c30ce39856
Signed-off-by: Prike Liang
Suggested-by: Ray Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +++-
drivers/gpu/drm/amd/amdgpu/am
Am 29.05.19 um 20:44 schrieb Alex Deucher:
Split late_init into two functions, one (do_late_init) which
just does the hw init, and late_init which calls do_late_init
and schedules the IB test work. Call do_late_init in
the GPU reset code to run the init code, but not schedule
the IB test code.
On Wed, May 22, 2019 at 4:16 PM Catalin Marinas wrote:
>
> On Mon, May 06, 2019 at 06:31:03PM +0200, Andrey Konovalov wrote:
> > This patch is a part of a series that extends arm64 kernel ABI to allow to
> > pass tagged user pointers (with the top byte set to something else other
> > than 0x00) as
On Thu, May 30, 2019 at 7:15 PM Catalin Marinas wrote:
>
> On Tue, May 28, 2019 at 04:14:45PM +0200, Andrey Konovalov wrote:
> > Thanks for a lot of valuable input! I've read through all the replies
> > and got somewhat lost. What are the changes I need to do to this
> > series?
> >
> > 1. Should
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hello Alex,
Thank you for the update. I will look forward testing that driver on August.
Luya Tshimbalanga
Fedora Design Team
> Hello team, > > Thank for you making mobile Raven Ridge nearly fully
> functional
with the > open source driver for m
ras ta interface header need to be updated to match with latest ta fw updates
Change-Id: I4ccc0dbba820221b5074e2bfc2902819a1e3f4d4
Signed-off-by: Hawking Zhang
Reviewed-by: James Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/ta_ras_if.h | 108 ++---
1
[Why]
DCN_VERSION_1_01 is no longer handled in the dal_hw_translate_init
switch since it was inadvertently dropped in the patch that removed the
unnecessary DCN1_01 guards.
This caused numerous regressions on DCN1_01 when loading the driver.
[How]
Add it back.
Cc: Harry Wentland
Fixes: 97df424f
On Fri, May 31, 2019 at 04:29:10PM +0200, Andrey Konovalov wrote:
> On Thu, May 30, 2019 at 7:15 PM Catalin Marinas
> wrote:
> > On Tue, May 28, 2019 at 04:14:45PM +0200, Andrey Konovalov wrote:
> > > Thanks for a lot of valuable input! I've read through all the replies
> > > and got somewhat los
On Fri, May 31, 2019 at 04:21:48PM +0200, Andrey Konovalov wrote:
> On Wed, May 22, 2019 at 4:16 PM Catalin Marinas
> wrote:
> > On Mon, May 06, 2019 at 06:31:03PM +0200, Andrey Konovalov wrote:
> > > This patch is a part of a series that extends arm64 kernel ABI to allow to
> > > pass tagged use
On Fri, May 31, 2019 at 6:20 PM Catalin Marinas wrote:
>
> On Fri, May 31, 2019 at 04:29:10PM +0200, Andrey Konovalov wrote:
> > On Thu, May 30, 2019 at 7:15 PM Catalin Marinas
> > wrote:
> > > On Tue, May 28, 2019 at 04:14:45PM +0200, Andrey Konovalov wrote:
> > > > Thanks for a lot of valuable
These got added back by subsequent merges accidently.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 --
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 4
2 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_d
Acked-by: Alex Deucher
From: amd-gfx on behalf of Nicholas
Kazlauskas
Sent: Friday, May 31, 2019 12:05 PM
To: amd-gfx@lists.freedesktop.org
Cc: Wentland, Harry; Kazlauskas, Nicholas
Subject: [PATCH] drm/amd/display: Add back missing hw translate init for DCN1_0
On Fri, May 31, 2019 at 06:24:06PM +0200, Andrey Konovalov wrote:
> On Fri, May 31, 2019 at 6:20 PM Catalin Marinas
> wrote:
> > On Fri, May 31, 2019 at 04:29:10PM +0200, Andrey Konovalov wrote:
> > > On Thu, May 30, 2019 at 7:15 PM Catalin Marinas
> > > wrote:
> > > > On Tue, May 28, 2019 at 0
Am 31.05.19 um 18:37 schrieb Alex Deucher:
These got added back by subsequent merges accidently.
Signed-off-by: Alex Deucher
Acked-by: Christian König
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 --
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 4
2 files chang
On 5/31/19 12:37 PM, Alex Deucher wrote:
> These got added back by subsequent merges accidently.
>
> Signed-off-by: Alex Deucher
Reviewed-by: Nicholas Kazlauskas
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 --
> drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 4
>
On 2019-05-30 6:36 p.m., Kuehling, Felix wrote:
>>
>>#if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
>> -if (gtt->ranges &&
>> -ttm->pages[0] == hmm_pfn_to_page(>t->ranges[0],
>> - gtt->ranges[0].pfns[0]))
>> +if (gtt->range &&
>> +
On 2019-05-31 12:05 p.m., Nicholas Kazlauskas wrote:
> [Why]
> DCN_VERSION_1_01 is no longer handled in the dal_hw_translate_init
> switch since it was inadvertently dropped in the patch that removed the
> unnecessary DCN1_01 guards.
>
> This caused numerous regressions on DCN1_01 when loading the
On 2019-05-31 12:37 p.m., Alex Deucher wrote:
> These got added back by subsequent merges accidently.
>
> Signed-off-by: Alex Deucher
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 --
> drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 4 --
On 2019-05-30 3:51 p.m., Nicholas Kazlauskas wrote:
> [Why]
> When switching from vt to desktop with EDID emulation we can receive
> an atomic commit such that we have a crtc where mode_changed = true.
>
> During the dm_update_crtc_state disable pass we remove the stream from
> the context and f
HMM provides new APIs and helps in kernel 5.2-rc1 to simplify driver
path. The old hmm APIs are deprecated and will be removed in future.
Below are changes in driver:
1. Change hmm_vma_fault to hmm_range_register and hmm_range_fault which
supports range with multiple vmas, remove the multiple vma
On 2019-05-31 1:28 p.m., Yang, Philip wrote:
>
> On 2019-05-30 6:36 p.m., Kuehling, Felix wrote:
>>>
>>> #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
>>> - if (gtt->ranges &&
>>> - ttm->pages[0] == hmm_pfn_to_page(>t->ranges[0],
>>> -gtt->ranges
On 2019-05-30 11:13 p.m., Dave Airlie wrote:
> On Sat, 25 May 2019 at 05:48, Kuehling, Felix wrote:
>> On 2019-05-23 6:41 p.m., Zeng, Oak wrote:
>>> Add a new kfd ioctl to allocate queue GWS. Queue
>>> GWS is released on queue destroy.
>>>
>>> Change-Id: I60153c26a577992ad873e4292e759e5c3d5bbd15
>
On 2019-05-30 12:12 p.m., Colin King wrote:
> From: Colin Ian King
>
> The variable status is initialized with a value that is never read
> and status is reassigned several statements later. This initialization
> is redundant and can be removed.
>
> Addresses-Coverity: ("Unused value")
> Signed-
On Sat, 1 Jun 2019 at 06:04, Kuehling, Felix wrote:
>
> On 2019-05-30 11:13 p.m., Dave Airlie wrote:
> > On Sat, 25 May 2019 at 05:48, Kuehling, Felix
> > wrote:
> >> On 2019-05-23 6:41 p.m., Zeng, Oak wrote:
> >>> Add a new kfd ioctl to allocate queue GWS. Queue
> >>> GWS is released on queue d
On 2019-05-31 4:53 p.m., Dave Airlie wrote:
> On Sat, 1 Jun 2019 at 06:04, Kuehling, Felix wrote:
>> On 2019-05-30 11:13 p.m., Dave Airlie wrote:
>>> On Sat, 25 May 2019 at 05:48, Kuehling, Felix
>>> wrote:
On 2019-05-23 6:41 p.m., Zeng, Oak wrote:
> Add a new kfd ioctl to allocate queu
Don't do the same for compute queues
Change-Id: Id5f743ca10c2b761590bfe18cab2f802d3c04d2d
Signed-off-by: Oak Zeng
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
This is prepare work to fix a circular lock dependency.
No logic change
Change-Id: I4e0ee918260e7780de972dd71f4ce787b4f6dde9
Signed-off-by: Oak Zeng
---
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 172 -
1 file changed, 62 insertions(+), 110 deletions(-)
diff --git
SDMA queue allocation requires the dqm lock as it modify
the global dqm members. Introduce functions to allocate/deallocate
in locked/unlocked circumstance.
Change-Id: Id3084524c5f65d9629b12cf6b4862a7516945cb1
Signed-off-by: Oak Zeng
---
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 46 ++
The idea to break the circular lock dependency is
to move init_mqd out of lock protection of dqm lock
in callstack #1 below. There is no need to.
[ 59.510149] [drm] Initialized amdgpu 3.30.0 20150101 for :04:00.0 on
minor 0
[ 513.604034] ===
Commit amended based on comments below:
Added amdgpu_pmu_fini and streamlined code.
As discussed with Felix offline, pmu attr_groups can be global as all perf
event format and event attrs are identical per asic type. Per device handling
is in the register pmu struct pointer. Changes have been
On 2019-05-31 5:19 p.m., Zeng, Oak wrote:
> SDMA queue allocation requires the dqm lock as it modify
> the global dqm members. Introduce functions to allocate/deallocate
> in locked/unlocked circumstance.
>
> Change-Id: Id3084524c5f65d9629b12cf6b4862a7516945cb1
> Signed-off-by: Oak Zeng
> ---
>
On 2019-05-31 3:42 p.m., Kuehling, Felix wrote:
> On 2019-05-31 1:28 p.m., Yang, Philip wrote:
>>
>> On 2019-05-30 6:36 p.m., Kuehling, Felix wrote:
#if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
- if (gtt->ranges &&
- ttm->pages[0] == hmm_pfn_to_page(>t->ranges[0]
On 2019-05-31 5:19 p.m., Zeng, Oak wrote:
> This is prepare work to fix a circular lock dependency.
> No logic change
>
> Change-Id: I4e0ee918260e7780de972dd71f4ce787b4f6dde9
> Signed-off-by: Oak Zeng
> ---
> .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 172
> -
>
On 2019-05-31 5:31 p.m., Kuehling, Felix wrote:
> On 2019-05-31 5:19 p.m., Zeng, Oak wrote:
>> SDMA queue allocation requires the dqm lock as it modify
>> the global dqm members. Introduce functions to allocate/deallocate
>> in locked/unlocked circumstance.
>>
>> Change-Id: Id3084524c5f65d9629b12cf
On 2019-05-31 5:32 p.m., Yang, Philip wrote:
>
> On 2019-05-31 3:42 p.m., Kuehling, Felix wrote:
>> On 2019-05-31 1:28 p.m., Yang, Philip wrote:
>>> On 2019-05-30 6:36 p.m., Kuehling, Felix wrote:
>
> #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
> - if (gtt->ranges &&
> -
On 2019-05-31 3:09 p.m., Yang, Philip wrote:
> HMM provides new APIs and helps in kernel 5.2-rc1 to simplify driver
> path. The old hmm APIs are deprecated and will be removed in future.
>
> Below are changes in driver:
>
> 1. Change hmm_vma_fault to hmm_range_register and hmm_range_fault which
> s
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