On 08/17/2018 08:24 PM, Christian König wrote:
We need to figure out the address after validating the BO, not before.
Signed-off-by: Christian König
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
> From: amd-gfx On Behalf Of Christian
> K?nig
> Sent: Friday, August 17, 2018 20:24
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH] drm/amdgpu: fix VM clearing for the root PD
>
> We need to figure out the address after validating the BO, not before.
>
> Signed-off-by: Christian König
R
On Fri, Aug 17, 2018 at 02:24:22PM +0200, Christian König wrote:
> We need to figure out the address after validating the BO, not before.
>
> Signed-off-by: Christian König
Reviewed-by: Huang Rui
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deleti
From: Monk Liu
SWDEV-146499: hang during multi vulkan process testing
cause:
the second frame's PREAMBLE_IB have clear-state
and LOAD actions, those actions ruin the pipeline
that is still doing process in the previous frame's
work-load IB.
fix:
need insert pipeline sync if have context switch
Repeat enable dpm under pass-through because there is no actually
hardware-fini and real power-off when guest vm shutdown or reboot.
Otherwise, under pass-through it will be failed to populate populate
and upload SCLK MCLK DPM levels due to zero of pcie_speed_table.count.
Change-Id: I7cbc55c650867
On 08/17/2018 08:24 PM, Christian König wrote:
We need to figure out the address after validating the BO, not before.
Signed-off-by: Christian König
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
-Original Message-
From: dri-devel On Behalf Of Andrey
Grodzovsky
Sent: Friday, August 17, 2018 11:16 PM
To: dri-de...@lists.freedesktop.org
Cc: Koenig, Christian ; amd-gfx@lists.freedesktop.org
Subject: [PATCH] drm/scheduler: Add stopped flag to drm_sched_entity
The flag will prevent
On Fri, Aug 17, 2018 at 06:38:16PM +0800, Koenig, Christian wrote:
> Am 17.08.2018 um 12:08 schrieb Huang Rui:
> > I continue to work for bulk moving that based on the proposal by Christian.
> >
> > Background:
> > amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then move
> > all o
On 08/17/2018 08:24 PM, Christian König wrote:
We need to figure out the address after validating the BO, not before.
Signed-off-by: Christian König
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
From: Monk Liu
SWDEV-146499: hang during multi vulkan process testing
cause:
the second frame's PREAMBLE_IB have clear-state
and LOAD actions, those actions ruin the pipeline
that is still doing process in the previous frame's
work-load IB.
fix:
need insert pipeline sync if have context switch
Used wrong pp interface, the original interface is
exposed by dpm on SI and paritial CI.
Pointed out by Francis David
v2: dal only need to set min_dcefclk and min_fclk to smu.
so use display_clock_voltage_request interface,
instand of update all display configuration.
Acked-by: Alex Deu
In function ‘gfx_v9_0_check_fw_write_wait’:
warning: enumeration value ‘CHIP_TAHITI’ not handled in switch [-Wswitch]
Always add default case in case there is no match
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/
Am 20.08.2018 um 05:35 schrieb Emily Deng:
From: Monk Liu
SWDEV-146499: hang during multi vulkan process testing
cause:
the second frame's PREAMBLE_IB have clear-state
and LOAD actions, those actions ruin the pipeline
that is still doing process in the previous frame's
work-load IB.
fix:
need
Am 20.08.2018 um 08:05 schrieb Huang Rui:
On Fri, Aug 17, 2018 at 06:38:16PM +0800, Koenig, Christian wrote:
Am 17.08.2018 um 12:08 schrieb Huang Rui:
I continue to work for bulk moving that based on the proposal by Christian.
Background:
amdgpu driver will move all PD/PT and PerVM BOs into id
Hi Felix,
We did test on both China team and Makham team. Also Embedded team did the test
also on release 18.20 for Raven.
Please let ROCm CQE team issue a JIRA ticket and the detail reproduce step.
Thanks & Best Regards!
James Zhu
From: amd-gfx on behalf
Acked-by: Alex Deucher
From: amd-gfx on behalf of Yintian Tao
Sent: Sunday, August 19, 2018 11:39:53 PM
To: amd-gfx@lists.freedesktop.org
Cc: Tao, Yintian
Subject: [PATCH] drm/powerplay: enable dpm under pass-through
Repeat enable dpm under pass-through becaus
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Rex Zhu
Sent: Monday, August 20, 2018 8:26:07 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amdgpu: Fix compile warning
In function ‘gfx_v9_0_check_fw_write_wait’:
warning: enumerati
On 2018-08-18 01:25 AM, Felix Kuehling wrote:
> ROCm CQE is seeing what looks like hangs during amdgpu initialization on
> Raven and Vega20. Amdgpu basically stops printing messages while trying
> to load VCN firmware. It never completes initialization, but there is no
> obvious error message.
Wha
On 2018-08-18 12:39 AM, Bráulio Bhavamitra wrote:
> Chrome freezed and had to be killed, error on dmesg below.
>
> [...]
>
> [ 5898.208262] [ cut here ]
> [ 5898.208272] kernel BUG at drivers/dma-buf/reservation.c:234!
> [ 5898.208305] invalid opcode: [#1] PREEMPT SMP
Thanks!
Em seg, 20 de ago de 2018 12:17, Michel Dänzer
escreveu:
> On 2018-08-18 12:39 AM, Bráulio Bhavamitra wrote:
> > Chrome freezed and had to be killed, error on dmesg below.
> >
> > [...]
> >
> > [ 5898.208262] [ cut here ]
> > [ 5898.208272] kernel BUG at drivers/d
On Mon, 2018-06-11 at 12:33 +0200, Michel Dänzer wrote:
> As the maintainer of xf86-video-amdgpu and -ati, I'm fine with migrating
> these to GitLab for Git and patch review.
>
> However, I'm not sure what to do about bugs/issues. My first thought was
> to allow creating new issues in GitLab and
On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> If aux->transfer == NULL, then just return without doing
> anything. In that case the function is likely called for
> a non-(e)DP connector.
>
> This never happened for the i915 driver, but the nouveau and amdgpu
> d
Reviewed-by: Lyude Paul
On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> A big problem with DP CEC-Tunneling-over-AUX is that it is tricky
> to find adapters with a chipset that supports this AND where the
> manufacturer actually connected the HDMI CEC line to the
On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> Add DisplayPort CEC-Tunneling-over-AUX support to nouveau.
>
> Signed-off-by: Hans Verkuil
> ---
> drivers/gpu/drm/nouveau/nouveau_connector.c | 17 +++--
> 1 file changed, 15 insertions(+), 2 deletions
Reviewed-by: Lyude Paul
We really need to add support for using this into the MST helpers. A good way to
test this would probably be to hook up an aux device to the DP AUX adapters we
create for each MST topology
On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> W
On 08/20/2018 08:59 PM, Lyude Paul wrote:
> Reviewed-by: Lyude Paul
>
> We really need to add support for using this into the MST helpers. A good way
> to
> test this would probably be to hook up an aux device to the DP AUX adapters we
> create for each MST topology
If you are interested, I hav
On 08/20/2018 08:51 PM, Lyude Paul wrote:
> On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
>> From: Hans Verkuil
>>
>> If aux->transfer == NULL, then just return without doing
>> anything. In that case the function is likely called for
>> a non-(e)DP connector.
>>
>> This never happened fo
On Mon, 2018-08-20 at 22:43 +0200, Hans Verkuil wrote:
> On 08/20/2018 08:59 PM, Lyude Paul wrote:
> > Reviewed-by: Lyude Paul
> >
> > We really need to add support for using this into the MST helpers. A good
> > way to
> > test this would probably be to hook up an aux device to the DP AUX adapte
Hi Christian,
Are you going to submit this change to amd-staging-drm-next?
amd-kfd-staging would pick it up from there automatically.
Regards,
Felix
On 2018-08-15 01:57 PM, Felix Kuehling wrote:
> I applied your change to my local KFD staging branch and it through a
> presubmission build/test
On Mon, 2018-08-20 at 22:47 +0200, Hans Verkuil wrote:
> On 08/20/2018 08:51 PM, Lyude Paul wrote:
> > On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> > > From: Hans Verkuil
> > >
> > > If aux->transfer == NULL, then just return without doing
> > > anything. In that case the function is
On 08/20/2018 11:39 AM, Yintian Tao wrote:
Repeat enable dpm under pass-through because there is no actually
hardware-fini and real power-off when guest vm shutdown or reboot.
Otherwise, under pass-through it will be failed to populate populate
duplicate "populate"
and upload SCLK MCLK DPM le
>-Original Message-
>From: Christian König
>Sent: Monday, August 20, 2018 9:15 PM
>To: Deng, Emily ; amd-gfx@lists.freedesktop.org
>Cc: Liu, Monk
>Subject: Re: [PATCH] amdgpu: fix multi-process hang issue
>
>Am 20.08.2018 um 05:35 schrieb Emily Deng:
>> From: Monk Liu
>>
>> SWDEV-146499:
For sriov, don't use kiq in exclusive mode, as don't know how long time
it will take, some times it will occur exclusive timeout.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc
Refine the code style, add brackets.
For sriov, don't use kiq in exclusive mode, as don't know how long time
it will take, some times it will occur exclusive timeout.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
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