Re: [PATCH 3/3] drm/amdgpu: move static CSA address to top of address space

Any bug introduced by original design ? I don't see why 8MB- 8KB as the start vm address of CSA has any trouble compared with top range ? On gfx9 we need the lower address range (0x0-0x7fff) for HMM/ATC/SVM. If we map the 8k CSA in there and hit it by accident then the GPU will not do wh

Re: [PATCH libdrm] amdgpu: typedef syncobj handle

Am 23.01.2018 um 07:00 schrieb Chunming Zhou: Change-Id: I1e798d0fbb7e2023d6619f515a9cfaf029b62b6d Signed-off-by: Chunming Zhou Not sure if that is a good idea cause the handle is actually not amdgpu specific but rather a general DRM handle, isn't it? Christian. --- amdgpu/amdgpu.h|

[PATCH 2/4] drm/amdgpu: apply top reserved VA space to pre Vega10 as well

Reserve VA space at the top for older generations as well. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 3 ++- drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 3 ++- drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 3 ++- 4 files

[PATCH 3/4] drm/amdgpu: consistently use AMDGPU_CSA_VADDR

Instead of repeating this multiple times. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu

[PATCH 1/4] drm/amdgpu: reduce reserved VA size

1MB should be more than enough, currently we use about 8K. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 21a80f1b

[PATCH 4/4] drm/amdgpu: move static CSA address to top of address space v2

Move the CSA area to the top of the VA space to avoid clashing with HMM/ATC in the lower range on GFX9. v2: wrong sign noticed by Roger, rebase on CSA_VADDR cleanup, handle VA hole on GFX9 as well. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 24

[PATCH 4/5] drm/amd/pp: Delete unnecessary function argument in populate_single_graphic_level for smu7

Signed-off-by: Rex Zhu Change-Id: Ie5bada0d8aac0e50f726e5c81c2d0b7107267fa9 --- drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c| 6 ++ drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 6 ++ drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c | 4 +--- drivers/gpu/dr

[PATCH 2/5] drm/amd/pp: Delete dead code in powerplay

As not support per DPM level optimization, so delete activity_target array. Change-Id: I1c1a973f332d0f1efa587edc9f518d47f46f0abc Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 4 drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.h | 2 -- drivers/

[PATCH 1/5] drm/amd/pp: Change activity_target for performance optimization on Polaris

And not support perDPM optimization on Polaris, so delete sclk activity_target array. Change-Id: I44ca01d5124bfbc7ce7802de7e037b8fa696c2ba Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c| 1 + dri

[PATCH 5/5] drm/amd/pp: Implement get_power_profile_mode on smu7

User can get smu7 profile pamameters through sysfs cat pp_power_profile_mode NUMMODE_NAME SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL MCLK_UP_HYST MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL 0 3D_FULL_SCREEN:0 100 30 0

[PATCH 3/5] drm/amd/pp: Add struct profile_mode_setting for smu7

Move configurable profiling parameters to struct profile_mode_setting and initialize current_profile_setting. Change-Id: I242ace8f04e64007695139c7094fe7b7be1b1020 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c| 10 -- drivers/gpu/drm/amd/powerplay/hwm

Re: [PATCH 3/3] drm/amdgpu: move static CSA address to top of address space

The ATC (or alternatively HMM) maps the CPU addresses into the GPU address space. Now on Linux the lower range (0x0-0x7fff) is used for the userspace address space on the CPU, so when we want to use that on the GPU it must be free of other mappings. GFX8 and GFX7 hardware had a separ

Re: [PATCH 3/3] drm/amdgpu: move static CSA address to top of address space

OK I see, but why HMM/ATC/SVN want low 8MB range ? why they cannot use high range address ? From: Christian König Sent: Tuesday, January 23, 2018 4:26:21 PM To: Liu, Monk; He, Roger; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 3/3] drm/amdgpu: move static

Re: [PATCH 3/3] drm/amdgpu: move static CSA address to top of address space

looks this is HSA feature to me that CPU and GPU share the same virtual address Ack-by: Monk Liu From: Koenig, Christian Sent: Tuesday, January 23, 2018 8:51:21 PM To: Liu, Monk; He, Roger; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 3/3] drm/amdgpu:

[PATCH] Fix pde_copy/pde_array initialisation

All zero is a perfectly valid value for a PDE. Signed-off-by: Christian König --- src/lib/read_vram.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/lib/read_vram.c b/src/lib/read_vram.c index 3331b3e..25ffec9 100644 --- a/src/lib/read_vram.c +++ b/src/lib/read_vram.

Re: [PATCH] Fix pde_copy/pde_array initialisation

Thanks, I RB'ed and pushed it out. On 23/01/18 08:55 AM, Christian König wrote: All zero is a perfectly valid value for a PDE. Signed-off-by: Christian König --- src/lib/read_vram.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/lib/read_vram.c b/src/lib/read_vr

Re: [RFC] Per file OOM badness

On Fri 19-01-18 17:54:36, Christian König wrote: > Am 19.01.2018 um 13:20 schrieb Michal Hocko: > > On Fri 19-01-18 13:13:51, Michal Hocko wrote: > > > On Fri 19-01-18 12:37:51, Christian König wrote: > > > [...] > > > > The per file descriptor badness is/was just the much easier approach to > > >

Re: [PATCH 3/3] drm/amdgpu: move static CSA address to top of address space

Thanks, can you give the patches a try as well? I don't have access to SRIOV hardware to test them. Christian. Am 23.01.2018 um 14:44 schrieb Liu, Monk: looks this is HSA feature to me that CPU and GPU share the same virtual address Ack-by: Monk Liu

Re: [PATCH 4/4] drm/amdgpu: move static CSA address to top of address space v2

Patches 1-3: Reviewed-by: Alex Deucher Patch 4: Acked-by: Alex Deucher From: amd-gfx on behalf of Christian König Sent: Tuesday, January 23, 2018 5:15:54 AM To: Liu, Monk; amd-gfx@lists.freedesktop.org Subject: [PATCH 4/4] drm/amdgpu: move static CSA addre

Re: [PATCH] drm/amdgpu: Avoid leaking PM domain on driver unbind

On Mon, Jan 22, 2018 at 11:22:58PM -0500, Alex Deucher wrote: > On Sun, Jan 21, 2018 at 7:46 AM, Lukas Wunner wrote: > > amdgpu_device_init() calls vga_switcheroo_init_domain_pm_ops() either > > if the device has the PowerXpress flag set or if the user has set the > > "runpm" module param to 1. >

Re: [PATCH 5/5] drm/amd/pp: Implement get_power_profile_mode on smu7

Patches 1-4: Reviewed-by: Alex Deucher patch 5: Is there a reason why you added a CURRENT field? This should be consistent with vega10. Also, please add an AUTO profile for both asics to support dynamic driver controlled profile selection so the API is in place even if it's not hooked up

Re: [PATCH 2/2] drm/amd/display: Remove timer handler.

On 2018-01-19 04:35 PM, Andrey Grodzovsky wrote: > Dead code, looks obsolete. > > Signed-off-by: Andrey Grodzovsky Good cleanup. Thanks. Series is Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 4 -- > .../gpu/drm/amd/display/amdgpu_dm/amdgpu

Re: [RFC] Per file OOM badness

On Tue 23-01-18 15:27:00, Roman Gushchin wrote: > On Thu, Jan 18, 2018 at 06:00:06PM +0100, Michal Hocko wrote: > > On Thu 18-01-18 11:47:48, Andrey Grodzovsky wrote: > > > Hi, this series is a revised version of an RFC sent by Christian König > > > a few years ago. The original RFC can be found at

Re: [RFC] Per file OOM badness

On Thu, Jan 18, 2018 at 06:00:06PM +0100, Michal Hocko wrote: > On Thu 18-01-18 11:47:48, Andrey Grodzovsky wrote: > > Hi, this series is a revised version of an RFC sent by Christian König > > a few years ago. The original RFC can be found at > > https://urldefense.proofpoint.com/v2/url?u=https-3

Re: [RFC] Per file OOM badness

On 2018-01-23 04:36 PM, Michal Hocko wrote: > On Tue 23-01-18 15:27:00, Roman Gushchin wrote: >> On Thu, Jan 18, 2018 at 06:00:06PM +0100, Michal Hocko wrote: >>> On Thu 18-01-18 11:47:48, Andrey Grodzovsky wrote: Hi, this series is a revised version of an RFC sent by Christian König a fe

Re: lock/unlock mismatch in ttm_bo.c

On 22/01/18 01:42 AM, Chunming Zhou wrote: On 2018年01月20日 02:23, Tom St Denis wrote: On 19/01/18 01:14 PM, Tom St Denis wrote: Hi all, In the function ttm_bo_cleanup_refs() it seems possible to get to line 551 without entering the block on 516 which means you'll be unlocking a mutex that w

Re: atomic debugfs files not created

On Tue, Jan 23, 2018 at 1:05 PM, Drew Davenport wrote: > On Mon, Jan 22, 2018 at 1:45 PM Alex Deucher wrote: >> >> On Mon, Jan 22, 2018 at 3:20 PM, Drew Davenport >> wrote: >> > I was doing some debugging and found that /sys/kernel/debug/dri/0/state >> > doesn't get created for amdgpu. After a b

[PATCH 2/2] drm/amdgpu/soc15: don't abuse IP soft reset for adapter reset

The IP soft reset interface is for per IP reset but it was being abused for adapter reset on soc15 asics. Adjust the interface to make it explicit. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 17 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 2 ++ dr

[PATCH 1/2] drm/amdgpu/psp: use a function pointer structure

This way we can make all of the IP specific functions static, and we only need a single entry point into the PSP IP modules. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 23 +--- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 41 - drivers/gpu/

[PATCH] drm/amdgpu: set DRIVER_ATOMIC flag early

The atomic debugfs stuff gets created in drm_dev_alloc() but this gets called before we've enumerated all of our IPs, so move the DRIVER_ATOMIC flag setting to fix that. Since DRIVER_ATOMIC is a driver flag it's currently global to the driver so setting it affects all GPUs driven by the driver. U

Re: [PATCH 5/5] drm/amd/pp: Implement get_power_profile_mode on smu7

>>Is there a reason why you added a CURRENT field? This should be consistent >>with vega10. Also, please add an AUTO profile for both asics to >>support >>dynamic driver controlled profile selection so the API is in place even if >>it's not hooked up yet. Yes, On SMU7, just need to adjust s

RE: lock/unlock mismatch in ttm_bo.c

The patch looks fine to me, please send it to dri mail list. Thanks Roger(Hongbo.He) -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Tom St Denis Sent: Wednesday, January 24, 2018 3:25 AM To: Zhou, David(ChunMing) Cc: Koenig, Christian ; amd-

Re: lock/unlock mismatch in ttm_bo.c

Hi Tom, Your change looks ok, as Roger suggested, you can send both dri and amd mail lists. In addition, when I review your patches, I found a bug as the attached, you can send it together with yours if you think that's a right fix. Regards, David Zhou On 2018年01月24日 03:25, Tom St Denis

Re: lock/unlock mismatch in ttm_bo.c

update the fix. On 2018年01月24日 11:09, Chunming Zhou wrote: Hi Tom, Your change looks ok, as Roger suggested, you can send both dri and amd mail lists. In addition, when I review your patches, I found a bug as the attached, you can send it together with yours if you think that's a right fi

[PATCH libdrm] drm/amdgpu: define amdgpu_syncobj_handle type for vulkan usage

Vulkan Fence and Semaphore(AMDVLK) will add implementation based on sync object. Semantic syncobj handle type is required instead of using uint32_t directly. Change-Id: Idbd2b2b161818fa58fe0bb3d1ac46453847ae626 Signed-off-by: Seth Zhu --- amdgpu/amdgpu.h | 4 1 file changed, 4 insertions(+)