>>> Is it possible that data or sclk or mclk table could be null here?
Only in one case: dpm was disabled. And hw backend not allocated.
But in dpm disabled case, this function can't be called.
all PP exported functions will return error immediately.
Best Regards
Rex
-Original Message-
Due to typo error, it will cause compile error so fix it.
Change-Id: Iabe7158e08e6aef155ca3394cafc6eb4256a0030
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr
Reviewed-by: Rex Zhu
Best Regards
Rex
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Yintian Tao
Sent: Thursday, January 04, 2018 5:05 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhou, David(ChunMing); Tao, Yintian
Subject: [PATCH] drm/amd/power
Reviewed-by: Christian König
Please commit ASAP since this is breaking builds,
Christian.
Am 04.01.2018 um 10:11 schrieb Zhu, Rex:
Reviewed-by: Rex Zhu
Best Regards
Rex
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Yintian Tao
Sent: Thu
Hi Christian
Thanks for your review. I have submit it.
Best Regards
Yintian Tao
-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: Thursday, January 04, 2018 5:35 PM
To: Zhu, Rex ; Tao, Yintian ;
amd-gfx@lists.freedesktop.org
Cc: Zhou, David(Chun
Change-Id: I05db3fe2a274ce9666a5074c82448bf8bd6e7ee8
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 73
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h | 14 +
2 files changed, 87 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerpla
Change-Id: Id5f146321b11c9dbfa5a48a5197e714761f57670
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 24 --
.../gpu/drm/amd/powerplay/inc/hardwaremanager.h| 2 +-
2 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/d
when this bit was set on module load,
driver will allow the user over/under gpu
clock and voltage through sysfs.
by default, this bit was not set.
Change-Id: I4ec2d3a689ae946d4af9f904c59b42da5b929181
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 2 +-
drivers/g
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Rex Zhu
Sent: Thursday, January 4, 2018 4:56:56 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amd/pp: Refine code shorten variable name
Change-Id: Id5f146321b11c9dbfa5a48a5197e714761
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Rex Zhu
Sent: Thursday, January 4, 2018 4:58:29 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH 1/2] drm/amd/pp: Add a new pp feature mask bit for OD feature
when this bit was set on module
Please include a commit message. Something like:
Add initial infrastructure for manual dpm control.
With that fixed:
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Rex Zhu
Sent: Thursday, January 4, 2018 4:58:30 AM
To: amd-gfx@lists.freedesktop.org
Cc
This fixes these warnings:
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/smu7_smumgr.c: In function
‘smu7_smu_fini’:
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/smu7_smumgr.c:653:33: warning:
passing argument 2 of ‘smu_free_memory’ makes pointer from integer without a
cast [-Wint-conversion
Acked-by: Alex Deucher
From: amd-gfx on behalf of Harry
Wentland
Sent: Thursday, January 4, 2018 11:01 AM
To: amd-gfx@lists.freedesktop.org; Tao, Yintian
Cc: Wentland, Harry
Subject: [PATCH] drm/amd/powerplay: Fix no-cast warnings in smu7_smu_fini
This fixes
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 50afcf65181a..d96f9ac9e5fd 100644
--- a/drivers/gpu/drm/amd/am
Hi all,
This commit:
[root@carrizo linux]# git bisect good
a08268f89a805b1aaccaeb899673dbe975c10d95 is the first bad commit
commit a08268f89a805b1aaccaeb899673dbe975c10d95
Author: Alex Deucher
Date: Tue Dec 12 15:20:22 2017 -0500
drm/amdgpu: drop scratch regs save and restore from S3
On Thu, Jan 4, 2018 at 12:48 PM, Andres Rodriguez wrote:
> Signed-off-by: Andres Rodriguez
Reviewed-by: Alex Deucher
And applied both. Thanks!
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd
From: Christian König
On CZ and newer APUs we can pin the fb into GART as well as VRAM.
v2: Don't enable gpu_vm_support for Raven yet since it leads to
a black screen. Need to debug this further before enabling.
Change-Id: Id0f8af3110e54a3aabf7a258871867bc121cc1a2
Signed-off-by: Christian K
Change-Id: I03c22a890d2305f3243d88019d1a28bddd4ddda7
Signed-off-by: Samuel Li
---
drivers/gpu/drm/drm_prime.c | 53 ++---
include/drm/drm_prime.h | 22 +++
2 files changed, 53 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/
To improve cpu read performance. This is implemented for APUs currently.
v2: Adapt to change
https://lists.freedesktop.org/archives/amd-gfx/2017-October/015174.html
v3: Adapt to change "forward begin_cpu_access callback to drivers"
v4: Instead of v3, reuse drm_gem dmabuf_ops here. Also some minor
On Thu, Jan 4, 2018 at 4:11 PM, Samuel Li wrote:
> From: Christian König
>
> On CZ and newer APUs we can pin the fb into GART as well as VRAM.
>
> v2: Don't enable gpu_vm_support for Raven yet since it leads to
> a black screen. Need to debug this further before enabling.
>
> Change-Id: Id0f8
Fixes stability issues.
v2: clamp sclk to 600 Mhz
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=103370
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/si_dpm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
i
Add quirks for handling PX/HG systems. In this case, add
a quirk for a weston dGPU that only seems to properly power
down using ATPX power control rather than HG (_PR3).
v2: append a new weston XT
Signed-off-by: Alex Deucher
Signed-off-by: Junwei Zhang (v2)
Reviewed-and-Tested-by: Junwei Zhang
Fixes stability issues.
v2: clamp sclk to 600 Mhz
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=103370
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/si_dpm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
b/drivers/gpu/drm/amd/amdg
Remaining patches from the previous 37-patch series.
Patch 1: Reworked PCIe atomic patch with feedback from PCI maintainers
Patch 2-9: Rebased from previous series
CC-ed linux-...@vger.kernel.org on relevant patches for context.
Felix Kuehling (8):
drm/amdkfd: Conditionally enable PCIe atomics
From: Jay Cornwall
The PCIe 3.0 AtomicOp (6.15) feature allows atomic transctions to be
requested by, routed through and completed by PCIe components. Routing and
completion do not require software support. Component support for each is
detectable via the DEVCAP2 register.
AtomicOp requests are
This will be needed for most dGPUs.
CC: linux-...@vger.kernel.org
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 17 +
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_devic
>> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
>
> Please rename this amdgpu_display_framebuffer_domains() for consistency.
Currently all the functions in this file are named without _display_. Am I
missing something?
>> + if (plane->type != DRM_PLANE_TYPE_CURSOR)
>
>
dGPUs work without IOMMUv2. Make IOMMUv2 initialization dependent on
ASIC information. Also allow building KFD without IOMMUv2 support.
This is still useful for dGPUs and prepares for enabling KFD on
architectures that don't support AMD IOMMUv2.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/
CC: linux-...@vger.kernel.org
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 153 +++-
1 file changed, 151 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index
On dGPUs don't set ATC addressing bits and use MTYPE_UC for coherent
memory.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 7 +
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c | 35 ++--
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v
GFXv7 and v8 dGPUs use a different addressing mode for KFD compared
to APUs (GPUVM64 vs HSA64). And dGPUs don't support MTYPE_CC. They
use MTYPE_UC instead for memory that requires coherency.
Signed-off-by: Felix Kuehling
---
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 11 +++
.../gpu/d
Some dGPUs don't support HWS. Allow them to use a per-device
sched_policy that may be different from the global default.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_dbgmgr.c| 3 ++-
drivers/gpu/drm/amd
Recognize dGPU ASIC families.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
index 5dc6567..69f4964 100644
---
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 335e454..7ebe430 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdk
On Thu, Jan 4, 2018 at 5:26 PM, Samuel Li wrote:
>>> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
>>
>> Please rename this amdgpu_display_framebuffer_domains() for consistency.
> Currently all the functions in this file are named without _display_. Am I
> missing something?
T
On 9 December 2017 at 14:08, Felix Kuehling wrote:
> From: Harish Kasiviswanathan
>
> Implement new kgd-kfd interface function get_local_mem_info.
>
> Signed-off-by: Harish Kasiviswanathan
> Signed-off-by: Ben Goz
> Signed-off-by: Felix Kuehling
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkf
I see. resource_size_t (alias for phys_addr_t) is u64 on x86 and x86_64.
But probably only u32 on ARM-32. This depends on
CONFIG_PHYS_ADDR_T_64BIT: include/linux/types.h:
#ifdef CONFIG_PHYS_ADDR_T_64BIT
typedef u64 phys_addr_t;
#else
typedef u32 phys_addr_t;
#endif
The easiest
Hi Bjorn,
I figured it out. The difference between the functions is whether they
use struct pci_bus * or struct pci_dev * as cursor. I found that the
functions are in fact equivalent. The last loop iteration in
pci_enable_atomic_ops_to_root is equivalent to the code after the loop
in qedr_pci_set_
On 2018-01-04 06:54 PM, Felix Kuehling wrote:
> I see. resource_size_t (alias for phys_addr_t) is u64 on x86 and x86_64.
> But probably only u32 on ARM-32. This depends on
> CONFIG_PHYS_ADDR_T_64BIT: include/linux/types.h:
>
> #ifdef CONFIG_PHYS_ADDR_T_64BIT
> typedef u64 phys_addr_t;
>
On 2018-01-04 07:17 PM, Bjorn Helgaas wrote:
> @@ -3066,6 +3066,86 @@ int pci_rebar_set_size(struct pci_dev *pdev,
> int bar, int size)
>> }
>>
>> /**
>> + * pci_enable_atomic_ops_to_root - enable AtomicOp requests to root port
>> + * @dev: the PCI device
>> + * @comp_caps: Caps required for at
On Thu, Jan 04, 2018 at 05:17:40PM -0500, Felix Kuehling wrote:
> From: Jay Cornwall
>
> The PCIe 3.0 AtomicOp (6.15) feature allows atomic transctions to be
> requested by, routed through and completed by PCIe components. Routing and
> completion do not require software support. Component suppor
On Tue, Jan 02, 2018 at 06:41:17PM -0500, Felix Kuehling wrote:
> On 2017-12-12 06:27 PM, Bjorn Helgaas wrote:
> > [+cc Ram, Michal, Ariel, Doug, Jason]
> >
> > The [29/37] in the subject makes it look like this is part of a larger
> > series, but I can't find the rest of it on linux-pci or linux-k
Needed to flush and invalidate the HDP block using the CPU.
v2: use preferred register on soc15.
Signed-off-by: Alex Deucher
Signed-off-by: Samuel Li (v1)
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
Needed to properly flush the HDP cache with the CPU from rather
than the GPU.
Signed-off-by: Alex Deucher
Signed-off-by: Samuel Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 ++
1 file changed, 6 insertions(+)
I keep needing to resurrect these patches to test things periodically
so I'd li
Needed to flush and invalidate the HDP block using the CPU.
Signed-off-by: Alex Deucher
Signed-off-by: Samuel Li
---
drivers/gpu/drm/amd/amdgpu/cik.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index 8e5
Needed to flush and invalidate the HDP block using the CPU.
Signed-off-by: Alex Deucher
Signed-off-by: Samuel Li
---
drivers/gpu/drm/amd/amdgpu/vi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index da2b99
Needed to flush and invalidate the HDP block using the CPU.
Signed-off-by: Alex Deucher
Signed-off-by: Samuel Li
---
drivers/gpu/drm/amd/amdgpu/si.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 543101
Use the callback rather than open coding it.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 86e9d682c59e..9db2e88b091a 1
Use the callback rather than open coding it.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 9a813d834f1a..d197e4dd9bbc 1
Use the callback rather than open coding it.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index eb8b1bb66389..72e82e05bb3e 1
Use the callback rather than open coding it.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 8e28270d1ea9..e47a1ba57aae 1
Seems amdgpu_asic_invalidate_hdp() isn't used any more in following patch.
Regards,
David Zhou
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex
Deucher
Sent: Friday, January 05, 2018 12:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher,
Reviewed-by: Rex Zhu
and pushed the patch to drm-next.
Best Regards
Rex
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Deucher, Alexander
Sent: Friday, January 05, 2018 12:09 AM
To: Wentland, Harry; amd-gfx@lists.freedesktop.org; Tao, Yintian
Subject: Re: [PATCH] drm
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