The hiberachy of page table is as below, which aligns hw names.
PDB2->PDB1->PDB0->PTB, accordingly:
level3 --- PDB2
level2 --- PDB1
level1 --- PDB0
level0 --- PTB
Change-Id: I2d748e5e96cffe18294c104c4b192d910b2f8e6b
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 37 +++
Change-Id: I40ecf31ad4b51022a2c0c076ae45188b6e9d63de
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 8904ccf78fc
Signed-off-by: Tom St Denis
---
src/lib/discover.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/lib/discover.c b/src/lib/discover.c
index e1ccea1d20e4..94d1c676718a 100644
--- a/src/lib/discover.c
+++ b/src/lib/discover.c
@@ -152,7 +152,7 @@ struct umr_asic *umr_discove
What is wrong with the old approach?
I would rather say that the address should be limited by the level shift
instead. This way we avoid the modulo altogether.
Christian.
Am 08.12.2017 um 11:56 schrieb Chunming Zhou:
Change-Id: I40ecf31ad4b51022a2c0c076ae45188b6e9d63de
Signed-off-by: Chunmin
Am 08.12.2017 um 11:56 schrieb Chunming Zhou:
The hiberachy of page table is as below, which aligns hw names.
PDB2->PDB1->PDB0->PTB, accordingly:
level3 --- PDB2
level2 --- PDB1
level1 --- PDB0
level0 --- PTB
Change-Id: I2d748e5e96cffe18294c104c4b192d910b2f8e6b
Signed-off-by: Chunming Zhou
Ye
On Fri, Dec 8, 2017 at 5:56 AM, Chunming Zhou wrote:
> The hiberachy of page table is as below, which aligns hw names.
> PDB2->PDB1->PDB0->PTB, accordingly:
> level3 --- PDB2
> level2 --- PDB1
> level1 --- PDB0
> level0 --- PTB
What's the advantage of this change? It's not clear from the commit
Am 08.12.2017 um 15:58 schrieb Alex Deucher:
On Fri, Dec 8, 2017 at 5:56 AM, Chunming Zhou wrote:
The hiberachy of page table is as below, which aligns hw names.
PDB2->PDB1->PDB0->PTB, accordingly:
level3 --- PDB2
level2 --- PDB1
level1 --- PDB0
level0 --- PTB
What's the advantage of this chan
That doesn't hit any more most of the time anyway.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 41 ++
1 file changed, 7 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgp
We can do this with a simple mask as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 796375484f6f..400a
Not needed any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 52 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 1 -
2 files changed, 29 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/driver
Horrible inefficient, but avoids problems when the root PD size becomes
to big.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 81 +++---
1 file changed, 36 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.
And also provide the level for which we need a PDE.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 20 +---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +++--
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c |
No more double house keeping.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 13 -
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +-
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/am
Instead of falling back to 2 level and very limited address space use
2+1 PD support and 128TB + 512GB of virtual address space.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 ++
drivers/gpu/drm/amd/amdgpu/gfxhub
Now instead of one submission for each PDE batch them together over all
PDs who need an update.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 206 +++--
1 file changed, 94 insertions(+), 112 deletions(-)
diff --git a/drivers/gpu/drm/amd/
They are not used any longer. We get the scratch register
locations from the vbios directly now.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 3 ---
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 14 --
drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 14 -
The golden register arrays were empty so the function was
effectively useless.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 31 ---
1 file changed, 31 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/s
Cleans up and consolidates all of the per-asic logic.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 --
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 7 +-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 15 +
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
All functions should have nbio_v* prefix.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 16
drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 16
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v
Same as previous asics. This was not yet set for gfx9.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 17 -
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gf
To improve cpu read performance. This is implemented for APUs currently.
v2: Adapt to change
https://lists.freedesktop.org/archives/amd-gfx/2017-October/015174.html
Change-Id: I7a583e23a9ee706e0edd2a46f4e4186a609368e3
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/am
From: Christian König
On CZ and newer APUs we can pin the fb into GART as well as VRAM.
v2: Don't enable gpu_vm_support for Raven yet since it leads to
a black screen. Need to debug this further before enabling.
Change-Id: Id0f8af3110e54a3aabf7a258871867bc121cc1a2
Signed-off-by: Christian K
From: Flora Cui
Signed-off-by: Flora Cui
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
b/drivers/
From: Harish Kasiviswanathan
Implement new kgd-kfd interface function get_local_mem_info.
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Ben Goz
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c| 30 +++
drivers/gpu/drm/amd/amdgpu/
From: Harish Kasiviswanathan
get_vmem_size() is deprecated. Instead use get_local_mem_info().
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Ben Goz
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
d
From: Kent Russell
Minor cleanup that was missed previously because code moved around.
Signed-off-by: Kent Russell
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 12 ++--
drivers/gpu/drm/amd/amdkfd/kfd_crat.h | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_t
From: Yong Zhao
Kobject created using kobject_create_and_add() can be freed using
kobject_put() when there is no referenece any more. However,
kobject memory allocated with kzalloc() has to set up a release
callback in order to free it when the counter decreases to 0.
Otherwise it causes memory l
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 17 +
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 2 +-
2 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
b/dr
From: Harish Kasiviswanathan
Currently, CRAT parsing is intertwined with topology_device_list and
hence repeated calls to kfd_parse_crat_table() will fail. Decouple
kfd_parse_crat_table() and topology_device_list.
kfd_parse_crat_table() will parse CRAT and add topology devices to a
temporary lis
Take CRAT related functions out of kfd_topology.c and place them in
kfd_crat.c. This is the initial step of supporting more CRAT features,
i.e. creating virtual CRAT table for KFD devices without CRAT.
Signed-off-by: Amber Lin
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/Makefil
From: Harish Kasiviswanathan
Fix location_id format to match Thunk specification.
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkf
From: Harish Kasiviswanathan
Reorganize and rename kfd_topology_get_crat_acpi function. In this way
acpi_get_table(..) needs to be called only once. This will also aid in
dGPU topology implementation.
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Kent Russell
Signed-off-by: Felix Kuehli
From: Flora Cui
Overwrite the active simd_count from KGD at driver loading time. This is
based on assumption that register GC_USER_SHADER_ARRAY_CONFIG won’t get
changed.
V2: remove the incorrect simd_count reported at loading module.
Signed-off-by: Flora Cui
Reviewed by: Yair Shachar< yair.sha
From: Flora Cui
Signed-off-by: Flora Cui
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c| 23 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
From: Harish Kasiviswanathan
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c| 10 --
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h| 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 1 -
drivers/gp
From: Harish Kasiviswanathan
Add get_local_mem_info which provides more information about local
memory than get_vmem_size:
* public and private framebuffer size
* memory clock
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Ben Goz
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/i
From: Harish Kasiviswanathan
Generate and parse VCRAT tables for dGPUs in kfd_topology_add_device.
Some information that isn't available in the CRAT table is patched
into the topology after parsing.
HSA_CAP_DOORBELL_TYPE_1_0 is dependent on the ASIC feature
CP_HQD_PQ_CONTROL.SLOT_BASED_WPTR, wh
From: Harish Kasiviswanathan
Modify kfd_topology_enum_kfd_devices(..) function to support non-GPU
nodes. The function returned NULL when it encountered non-GPU (say CPU)
nodes. This caused kfd_ioctl_create_event and kfd_init_apertures to fail
for Intel + Tonga.
kfd_topology_enum_kfd_devices will
From: Kent Russell
Add a sysfs file in topology (node/x/memory_banks/X/used_memory) that
reports the current VRAM usage for that node. Only works for GPU nodes
at this time.
Signed-off-by: Kent Russell
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 49 ++
From: Jay Cornwall
The PCIe 3.0 AtomicOp (6.15) feature allows atomic transctions to be
requested by, routed through and completed by PCIe components. Routing and
completion do not require software support. Component support for each is
detectable via the DEVCAP2 register.
AtomicOp requests are
From: Harish Kasiviswanathan
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
b/drivers/gpu/drm/amd/include/kgd_kfd_inte
This patch series adds support for dGPU topology to KFD and implements
everything needed to initialize KFD on dGPUs.
This is still missing dGPU memory management APIs, so it's not going to
be able to run any user mode tests yet. But device information about CPUs
and supported dGPUs should be repor
From: Kent Russell
Add functions to report the vram_usage from the amdgpu_device
Signed-off-by: Kent Russell
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c| 7 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h| 1 +
drivers/gpu/drm/amd/amdgpu/amd
From: Ben Goz
This is needed for enabling a user-mode workaround for an AQL queue
wrapping HW bug on Tonga.
Signed-off-by: Ben Goz
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 4
drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 1 +
2 files changed, 5 insertio
Currently, the KFD topology information is generated by parsing the CRAT
(ACPI) table. However, at present CRAT table is available only for AMD
APUs. To support CPUs on systems without a CRAT table, the KFD driver will
create a Virtual CRAT (VCRAT) table and then the existing code will parse
this t
From: Harish Kasiviswanathan
Current thunk spec v1.07 dated Feb 1, 2016
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.h | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/
Only count memory banks in one place. Ignore redundant num_banks
entry in crat_subtype_computeunit.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 3 +--
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 14 ++
drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 1
Some systems have broken CRAT tables. Add a module option to ignore
a CRAT table.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 5 +
drivers/gpu/drm/amd/amdkfd/kfd_module.c | 5 +
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 6 ++
3 files changed, 16 insert
From: Amber Lin
For hardware blocks whose performance counters are accessed via MMIO
registers, KFD provides the support for those privileged blocks. IOMMU is
one of those privileged blocks. Most performance counter properties
required by Thunk are available at /sys/bus/event_source/devices/amd_i
From: Harish Kasiviswanathan
Change kfd_cache_properties.sibling_map[256] to
kfd_cache_properties.sibling_map[32]. Since, CRAT uses bitmap for
sibling_map, it is more efficient to use bitmap in the kfd structure
also.
Signed-off-by: Harish Kasiviswanathan
Signed-off-by: Felix Kuehling
---
dri
From: Harish Kasiviswanathan
Some AMD motherboards without an APU have a broken CRAT table which
causes KFD initialization failures or incorrect information about
NUMA nodes, CPU cores or system memory. Ignore CRAT tables without
GPUs and rely on KFD's code to create a CRAT table for the CPU.
Si
From: Philip Cox
* Wrong value for max_waves_per_simd
* Missing ATC capability bit
Signed-off-by: Philip Cox
Signed-off-by: Kent Russell
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/dr
This will be needed for most dGPUs.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 13 +
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/
Some dGPUs don't support HWS. Allow them to use a per-device
sched_policy that may be different from the global default.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_dbgmgr.c| 3 ++-
drivers/gpu/drm/amd
dGPUs work without IOMMUv2. Make IOMMUv2 initialization dependent on
ASIC information. Also allow building KFD without IOMMUv2 support.
This is still useful for dGPUs and prepares for enabling KFD on
architectures that don't support AMD IOMMUv2.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/
GFXv7 and v8 dGPUs use a different addressing mode for KFD compared
to APUs (GPUVM64 vs HSA64). And dGPUs don't support MTYPE_CC. They
use MTYPE_UC instead for memory that requires coherency.
Signed-off-by: Felix Kuehling
---
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 11 +++
.../gpu/d
Recognize dGPU ASIC families.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
index 5dc6567..69f4964 100644
---
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 51284bf..27878cc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdk
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 153 +++-
1 file changed, 151 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index b133fba..df9972b 100644
--- a/
On dGPUs don't set ATC addressing bits and use MTYPE_UC for coherent
memory.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 7 +
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c | 35 ++--
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v
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