Re: [PATCH] drm/amd/display/dc/dce110/dce110_mem_input_v: use swap macro in program_size_and_rotation

2017-11-20 Thread Gustavo A. R. Silva
Quoting Harry Wentland : On 2017-11-10 05:31 PM, Gustavo A. R. Silva wrote: Make use of the swap macro instead of _manually_ swapping values and remove unnecessary variable swap. This makes the code easier to read and maintain. This code was detected with the help of Coccinelle. Signed-off-

Re: [PATCH 1/8] drm/ttm: add operation ctx to ttm_bo_validate v2

2017-11-20 Thread Daniel Vetter
On Fri, Nov 17, 2017 at 11:49:28AM +0100, Christian König wrote: > Give moving a BO into place an operation context to work with. > > v2: rebased > > Signed-off-by: Christian König > Reviewed-by: Michel Dänzer > --- > diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h > in

Re: [PATCH 1/3] drm/amdgpu: fix VA hole handling on Vega10 v2

2017-11-20 Thread Michel Dänzer
On 18/11/17 03:31 PM, Christian König wrote: > Am 17.11.2017 um 17:09 schrieb Michel Dänzer: >> On 17/11/17 11:28 AM, Christian König wrote: >>> Ping? Michel, Alex can somebody take a look? >> Patch 2 is >> >> Reviewed-by: Michel Dänzer >> >> >> With patches 1 & 3, it's not 100% clear to me what t

regression in suspend/resume on Polaris

2017-11-20 Thread Tom St Denis
Hi, This commit causes a failure (attached) on resume with a Polaris10 device installed (during uvd video playback). commit 1cfd8e237f0318e330190ac21d63c58ae6a1f66c (HEAD, refs/bisect/bad) Author: Monk Liu Date: Tue Nov 14 11:52:35 2017 +0800 drm/amdgpu:cleanup GMC & gart garbage funct

Re: [PATCH 1/3] drm/amdgpu: fix VA hole handling on Vega10 v2

2017-11-20 Thread Christian König
Am 20.11.2017 um 11:36 schrieb Michel Dänzer: On 18/11/17 03:31 PM, Christian König wrote: Am 17.11.2017 um 17:09 schrieb Michel Dänzer: On 17/11/17 11:28 AM, Christian König wrote: Ping? Michel, Alex can somebody take a look? Patch 2 is Reviewed-by: Michel Dänzer With patches 1 & 3, it's

Re: regression in suspend/resume on Polaris

2017-11-20 Thread Christian König
Yeah, known issue. See the proposed patch from Monk about partially reverting this commit. Regards, Christian. Am 20.11.2017 um 14:18 schrieb Tom St Denis: Hi, This commit causes a failure (attached) on resume with a Polaris10 device installed (during uvd video playback). commit 1cfd8e237f

Re: regression in suspend/resume on Polaris

2017-11-20 Thread Tom St Denis
That patch seems to work for me. On 20/11/17 08:21 AM, Christian König wrote: Yeah, known issue. See the proposed patch from Monk about partially reverting this commit. Regards, Christian. Am 20.11.2017 um 14:18 schrieb Tom St Denis: Hi, This commit causes a failure (attached) on resume wit

Re: [PATCH 1/3] drm/amdgpu: fix VA hole handling on Vega10 v2

2017-11-20 Thread Michel Dänzer
On 20/11/17 02:20 PM, Christian König wrote: > Am 20.11.2017 um 11:36 schrieb Michel Dänzer: >> On 18/11/17 03:31 PM, Christian König wrote: >>> Am 17.11.2017 um 17:09 schrieb Michel Dänzer: On 17/11/17 11:28 AM, Christian König wrote: > Ping? Michel, Alex can somebody take a look? Pa

Re: [PATCH v9 4/5] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors v5

2017-11-20 Thread Boris Ostrovsky
On 10/18/2017 09:58 AM, Christian König wrote: > From: Christian König > > Most BIOS don't enable this because of compatibility reasons. > > Manually enable a 64bit BAR of 64GB size so that we have > enough room for PCI devices. > > v2: style cleanups, increase size, add resource name, set correct

Re: [PATCH v9 4/5] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors v5

2017-11-20 Thread Christian König
Am 20.11.2017 um 16:51 schrieb Boris Ostrovsky: On 10/18/2017 09:58 AM, Christian König wrote: From: Christian König Most BIOS don't enable this because of compatibility reasons. Manually enable a 64bit BAR of 64GB size so that we have enough room for PCI devices. v2: style cleanups, increas

Re: [PATCH v9 4/5] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors v5

2017-11-20 Thread Boris Ostrovsky
On 11/20/2017 11:07 AM, Christian König wrote: > Am 20.11.2017 um 16:51 schrieb Boris Ostrovsky: >> >> (and then it breaks differently as a Xen guest --- we hung on the last >> pci_read_config_dword(), I haven't looked at this at all yet) > > Hui? How does this fix applies to a Xen guest in the fir

Re: [PATCH 1/1] drm/amdkfd: Do not ignore requested queue size during allocation

2017-11-20 Thread Felix Kuehling
I think this patch is not correct. The EOP-mem is not associated with the queue size. The EOP buffer is a separate buffer used by the firmware to handle command completion. As I understand it, this allows more concurrency, while still making it look like all commands in the queue are completing in

Re: [amd-staging-drm-next] regression - no fan info (sensors) on RX580

2017-11-20 Thread Alex Deucher
On Sun, Oct 8, 2017 at 10:31 PM, Dieter Nützel wrote: > OK, got it but can't revert the commit clean. > > amdgpu-pci-0100 > Adapter: PCI adapter > fan1: 873 RPM > temp1:+26.0°C (crit = +0.0°C, hyst = +0.0°C) > > SOURCE/amd-staging-drm-next> git bisect good > 0944c350c8eddf4064e7

[PATCH] drm/amdgpu: don't skip attributes when powerplay is enabled

2017-11-20 Thread Alex Deucher
The function checks non-powerplay structures so regressed when the pp_enabled check was removed. This should ideally be implemented similarly for powerplay. Fixes: 6d07fe7bcae57 ("drm/amdgpu: delete pp_enable in adev") Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 4 +

RE: [PATCH 3/4] drm/amdkfd: Add CWSR support

2017-11-20 Thread Liu, Shaoyun
The save/restore memory is allocated per queue in user mode and the address /size passed in the create_ioctl. The memory you noticed that allocated at kfd_process_init_cwsr is the memory for CWSR shader code itself. This shader code is executed by the shader in the user's address space(GPU

Re: [amd-staging-drm-next] regression - no fan info (sensors) on RX580

2017-11-20 Thread Dieter Nützel
That did it. a716d5540346 (HEAD -> amd-staging-drm-next) drm/amdgpu: don't skip attributes when powerplay is enabled 9f896d936c9d (origin/amd-staging-drm-next) drm/amdgpu: fix VCE buffer placement restrictions v2 ca9b5d953735 drm/amdgpu: align GTT start to 4GB v2 52364b9f0226 drm/amdgpu: remov

Re: Operation context for TTM

2017-11-20 Thread Dieter Nützel
Hello Christian, your latest 'amd-staging-drm-next' commit drm/amdgpu: fix VCE buffer placement restrictions v2 #9f896d936c9d4ea936a02d52eaeb14fdd209193b static int amdgpu_vce_validate_bo(struct amdgpu_cs_parser *p, uint32_t ib_idx, int lo, int hi, unsigned si

Re: [PATCH] drm/amdgpu: don't skip attributes when powerplay is enabled

2017-11-20 Thread Dieter Nützel
Am 20.11.2017 23:57, schrieb Alex Deucher: The function checks non-powerplay structures so regressed when the pp_enabled check was removed. This should ideally be implemented similarly for powerplay. Fixes: 6d07fe7bcae57 ("drm/amdgpu: delete pp_enable in adev") Signed-off-by: Alex Deucher Te

[PATCH] drm/radeon: fix possible memory leak in radeon_bo_create

2017-11-20 Thread Alex Deucher
if ttm_bo_init fails, don't leak the bo object. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_object.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 093594976126..53c5bb6c25e4 100644 --

Re: [PATCH] drm/radeon: fix possible memory leak in radeon_bo_create

2017-11-20 Thread Alex Deucher
On Mon, Nov 20, 2017 at 11:36 PM, Alex Deucher wrote: > if ttm_bo_init fails, don't leak the bo object. > > Signed-off-by: Alex Deucher Ignore this patch. ttm cleans up for us. Alex > --- > drivers/gpu/drm/radeon/radeon_object.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/driv

[PATCH] drm/amdgpu:partially revert 1cfd8e237f0318e330190ac21d63c58ae6a1f66c

2017-11-20 Thread Monk Liu
found RING0 test fail after S3 resume regression, which is introduced by 1cfd8e237f0318e330190ac21d63c58ae6a1f66c Because after suspend VRAM will be cleared, so driver must unpin the GART table(resident in VRAM) during suspend so it can be evicted to system ram and must correspondingly pin it duri