On Sat, Sep 23, 2017 at 3:44 AM, Thangirala, Hari
wrote:
> Hi Felix,
>
> Event IDs reserved for debug events was an artifact of a debugger design. We
> changed our tools strategy so those limitations do not exist anymore. There's
> no need to reserve special event-IDs for debugger. 4096 is good
On Thu, Sep 21, 2017 at 1:10 AM, Felix Kuehling wrote:
> From: Yong Zhao
>
> The timeout in milliseconds should not be regarded as jiffies. This
> commit fixed that.
>
> v2:
> - use msecs_to_jiffies
> - change timeout_ms parameter to unsigned int to match msecs_to_jiffies
>
> Signed-off-by: Yong
On Thu, Sep 21, 2017 at 1:10 AM, Felix Kuehling wrote:
> From: Yong Zhao
>
> There are already CHIP_* definitions under amd_shared.h file on amdgpu
> side, so KFD should reuse them rather than defining new ones.
>
> Using enum for asic type requires default cases on switch statements
> to prevent
On Thu, Sep 21, 2017 at 1:10 AM, Felix Kuehling wrote:
> From: Yong Zhao
>
> Avoid intermediate negative numbers when doing calculations with a mix
> of signed and unsigned variables where implicit conversions can lead
> to unexpected results.
>
> When kernel queue buffer wraps around to 0, we ne
On Thu, Sep 21, 2017 at 1:10 AM, Felix Kuehling wrote:
> Small self-contained KFD fixes that don't introduce any new
> functionality or features. These may be suitable to include in
> drm-fixes for 4.14.
>
Thanks!
I added patches 5, 9 and 10 to my -fixes tree and I will send them
shortly to Dave
Hi,
while trying to resurrect my old Macbook as an 32 bit kernel testing device,
I think someone broke the radeon driver on this first generation pure EFI boot
Macbook.
My guess would be that the introduction of the vga_switcheroo code did break the
radeon_get_bios functionality.
I will try agai
Hold on,
We didn't hit test fail without your patch, actually at least VEGA10 doesn't
have the issue you mentioned,
Can you elaborate what issue or test case you can fix with this patch ?
Besides, please don't change anything on vega10 before you verified it
BR Monk
-Original Message-
RB: Xiangliang Yu
-Original Message-
From: Ding, Pixel
Sent: Monday, September 25, 2017 2:42 PM
To: Liu, Monk ; amd-gfx@lists.freedesktop.org; Min, Frank
; Deucher, Alexander ; Yu,
Xiangliang
Subject: Re: [PATCH] drm/amdgpu: right shift 2 bits for
SDMA_GFX_RB_WPTR_POLL_ADDR_LO
Hi M
Am 23.09.2017 um 01:50 schrieb Felix Kuehling:
On 2017-09-22 08:13 AM, Christian König wrote:
From: Christian König
Convert GTT mappings into linear ones for huge page handling.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 24 +---
1 file
Am 23.09.2017 um 02:01 schrieb Felix Kuehling:
Nice patch series. I wasn't expecting that so quickly.
Actually I'm working on this for a few month now.
Patches 4-7 change the ttm_page_alloc allocator, which isn't used by
amdgpu (as far as I can tell).
Well it is heavily used. See amdgpu_ttm
Both Tonga and Vega register SPECs indicate that this registers only
use 31:2 bits in DW. SRIOV test case immediately fails withtout this
shift.
v2: write to ADDR field
Signed-off-by: Pixel Ding
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 9 +
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 8
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