On Thu, May 11, 2017 at 02:41:56PM +0800, Christian König wrote:
> Am 11.05.2017 um 07:42 schrieb Huang Rui:
> > Signed-off-by: Huang Rui
> > ---
> >
> > V1 -> V2:
> > - park the scheduler thread for each ring to avoid conflict with commands
> from
> >active apps.
> >
> > ---
> > drivers/gpu
On 10/05/17 08:43 PM, Christian König wrote:
> Ping, could anybody take a look at this set?
For the series:
Reviewed-by: Michel Dänzer
Might be worth converting e.g. ttm_bo_move_ttm to a context parameter as
well?
Also, I wonder if the two booleans couldn't be converted to enums or
something,
From: Michel Dänzer
(Ported from amdgpu commit 462ac3341e5bfbded9086d3d9043821d19352b3e)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 1 -
src/drmmode_display.h | 2 --
2 files changed, 3 deletions(-)
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index e2899cf50..d0ec
[ 338.384770] BUG: unable to handle kernel NULL pointer dereference at
(null)
[ 338.384817] IP: [< (null)>] (null)
[ 338.384843] PGD 0
[ 338.384865] Oops: 0010 [#1] SMP
[ 338.384881] Modules linked in: amdgpu(OE) ttm(OE) drm_kms_helper(E) drm(E)
i2c_algo_bit(E)
Am 11.05.2017 um 12:27 schrieb Chunming Zhou:
[ 338.384770] BUG: unable to handle kernel NULL pointer dereference at
(null)
[ 338.384817] IP: [< (null)>] (null)
[ 338.384843] PGD 0
[ 338.384865] Oops: 0010 [#1] SMP
[ 338.384881] Modules linked in: amdgpu(OE) tt
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Thursday, May 11, 2017 6:03 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH xf86-video-ati] Remove unused struct members from
> drmmode_display.h
>
> From: Mich
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Chunming Zhou
> Sent: Thursday, May 11, 2017 6:28 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou, David(ChunMing)
> Subject: [PATCH] drm/amdgpu: fix NULL pointer panic of emit_gds_switch
>
From: Christian König
VM is mandatory for all hw amdgpu supports. So remove the leftovers
to make it optionally.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 3 --
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 -
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 59
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, May 11, 2017 10:22 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH] drm/amdgpu: cleanup VM manager init/fini
>
> From: Christian König
>
> VM is m
Am 11.05.2017 um 09:35 schrieb Huang Rui:
On Thu, May 11, 2017 at 02:41:56PM +0800, Christian König wrote:
Am 11.05.2017 um 07:42 schrieb Huang Rui:
Signed-off-by: Huang Rui
---
V1 -> V2:
- park the scheduler thread for each ring to avoid conflict with commands
from
active apps.
---
Good catch!
Sam
From: Yuan, Xiaojie
Sent: Thursday, May 11, 2017 6:51 AM
To: Li, Samuel ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
Hi Samuel,
Here's an off-by-one error:
+ id = asic_id_table + table_size -1;
Hi Samuel,
Here's an off-by-one error:
+ id = asic_id_table + table_size -1;
should be:
+ id = asic_id_table + table_size;
Regards,
Xiaojie
From: Li, Samuel
Sent: Thursday, May 11, 2017 4:56:55 AM
To: amd-gfx@lis
Hi all,
I've pushed out a large commit which adds raven support to umr. Since
it's quite large I've bypassed the list.
The commit can be seen here:
https://cgit.freedesktop.org/amd/umr/commit/?id=6acc89e4ec159de470af1ec1b9f53d4e97c562bb
Cheers,
Tom
__
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amd
Check to make sure the vblank period is long enough to support
mclk switching.
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 31 +---
1 file changed, 27 insertions(+), 4 deletions(-)
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/ci_dpm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/radeon/ci_d
Hi,
this is more feedback about how the code works and runs rather than
what you're really looking for, so I thought I'd start a new thread.
:-)
I get the following error when compiling and (obviously) forgetting to
enable the new DC option.
I see the option will be removed, so maybe that doesn't
Am 10.05.2017 um 21:30 schrieb Deucher, Alexander:
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Wednesday, May 10, 2017 3:29 PM
To: Alex Deucher; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: Re: [PATCH 000/117] Raven Support
Am 10.05.20
As the KCQ setup. This way we only have to wait once for the
entire MEC.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 73 +++
1 file changed, 14 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drive
These are the laste of the gfx9 KIQ patches that haven't landed yet. Can
someone with gfx9 capable hw test this (vega10 or raven)? This is needed
to enable powergating on gfx9.
Thanks,
Alex
Alex Deucher (5):
drm/amdgpu: split gfx_v9_0_kiq_init_queue into two
drm/amdgpu/gfx9: wait once for
One for KIQ and one for the KCQ. This simplifies the logic and
allows for future optimizations.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 63 +++
1 file changed, 42 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
No need to reset the wptr and clear the rings. The UNMAP_QUEUES
packet writes the current MQD state back the MQD on suspend,
so there is no need to reset it as well.
v2: fix from gfx8 (Rex)
Ack-by: monk liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 28 +++
KIQ is the Kernel Interface Queue for managing the MEC. Rather than setting
up rings via direct MMIO of ring registers, the rings are configured via
special packets sent to the KIQ. The allows the MEC to better manage shared
resources and certain power events. It also reduces the code paths in th
Rather than waiting for each queue.
Reviewed-by: monk liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 60 +--
1 file changed, 29 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/
From: Xiaojie Yuan
v2: fix an off by one error and leading white spaces
Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Reviewed-by: Junwei Zhang
Signed-off-by: Samuel Li
---
amdgpu/Makefile.am | 2 +
amdgpu/Makefile.sources | 2 +-
amdgpu/amdgpu_asic_id.c | 198 +
Submitted a request to create a new repo on freedesktop. Michel, do you have
the privilege to create it?
https://bugs.freedesktop.org/show_bug.cgi?id=99589
Sam
-Original Message-
From: Michel Dänzer [mailto:mic...@daenzer.net]
Sent: Wednesday, May 10, 2017 10:33 PM
To: Li, Samuel
Cc: a
On Fri 2017-04-21 14:08:04, Ville Syrjälä wrote:
> On Fri, Apr 21, 2017 at 11:50:18AM +0200, Gerd Hoffmann wrote:
> > On Fr, 2017-04-21 at 12:25 +0300, Ville Syrjälä wrote:
> > > On Fri, Apr 21, 2017 at 09:58:24AM +0200, Gerd Hoffmann wrote:
> > > > While working on graphics support for virtual mac
The bugzilla id is actually here,
https://bugs.freedesktop.org/show_bug.cgi?id=101013
Sam
-Original Message-
From: Li, Samuel
Sent: Thursday, May 11, 2017 5:13 PM
To: 'Michel Dänzer'
Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie
Subject: RE: [PATCH 1/1] amdgpu: move asic id table t
It's stored in LE format.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index d95d4c9
We end up reading the interrupt register for HPD5, and then writing it
to HPD6 which on systems without anything using HPD5 results in
permanently disabling hotplug on one of the display outputs after the
first time we acknowledge a hotplug interrupt from the GPU.
This code is really bad. But for
On 11/05/17 02:35 PM, Alex Deucher wrote:
These are the laste of the gfx9 KIQ patches that haven't landed yet. Can
someone with gfx9 capable hw test this (vega10 or raven)? This is needed
to enable powergating on gfx9.
Thanks,
If nobody gets to it by morning I'll try it out first thing on my
From: Dave Airlie
This interface will allow sync object to be used to back
Vulkan fences. This API is pretty much the vulkan fence waiting
API, and I've ported the code from amdgpu.
v2: accept relative timeout, pass remaining time back
to userspace.
Signed-off-by: Dave Airlie
---
drivers/gpu/
Okay I'm not convinced this is going to get any better out of tree,
I've polished what I can, and fixed up the last few comments from people,
I'd like to rebase on drm-misc probably at some point and send a pull
request for it.
This mostly just addresses things around naming that Chris pointed ou
From: Dave Airlie
This creates a new command submission chunk for amdgpu
to add in and out sync objects around the submission.
Sync objects are managed via the drm syncobj ioctls.
The command submission interface is enhanced with two new
chunks, one for syncobj pre submission dependencies,
and
From: Dave Airlie
Sync objects are new toplevel drm object, that contain a
pointer to a fence. This fence can be updated via command
submission ioctls via drivers.
There is also a generic wait obj API modelled on the vulkan
wait API (with code modelled on some amdgpu code).
These objects can be
From: Dave Airlie
This just splits out the fence depenency checking into it's
own function to make it easier to add semaphore dependencies.
Reviewed-by: Christian König
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 85 +++---
1 file change
From: Dave Airlie
This interface allows importing the fence from a sync_file into
an existing drm sync object, or exporting the fence attached to
an existing drm sync object into a new sync file object.
This should only be used to interact with sync files where necessary.
Signed-off-by: Dave Ai
On 12/05/17 06:13 AM, Li, Samuel wrote:
> Submitted a request to create a new repo on freedesktop.
What's the point of having a separate repository upstream? Can't we just
keep it in the libdrm repository?
--
Earthling Michel Dänzer | http://www.amd.com
Libre softwar
On 12/05/17 08:10 AM, Alex Deucher wrote:
> It's stored in LE format.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 +++---
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
Add VM context module param (amdgpu.vm_update_context) that can used to
control how the VM pde/pte are updated for Graphics and Compute.
BIT0 controls Graphics and BIT1 Compute.
BIT0 [= 0] Graphics updated by SDMA [= 1] by CPU
BIT1 [= 0] Compute updated by SDMA [= 1] by CPU
By default, only for
On 2017年05月12日 02:08, Christian König wrote:
Am 10.05.2017 um 21:30 schrieb Deucher, Alexander:
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Wednesday, May 10, 2017 3:29 PM
To: Alex Deucher; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject
If amdgpu.vm_update_context param is set to use CPU, then Page
Directories will be updated by CPU instead of SDMA
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 141 +++--
1 file changed, 99 insertions(+), 42 deletions(-)
diff --gi
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 82 +-
1 file changed, 81 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 63f0572..63b4696 100644
--
This change is also useful for the upcoming changes where page tables
can be updated by CPU.
Change-Id: I07510ed60c94cf1944ee96bb4b16c40ec88ea17c
Signed-off-by: Harish Kasiviswanathan
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 48 +-
1. generally, functions in amdgpu_cs.c should be with amdgpu_cs_ as prefix.
2. If I'm not wrong to your proposal, SYNCOBJ_IN is to semaphore wait
while SYNCOBJ_OUT is to semaphore signal. SYNCOBJ_IN/OUT both are based
on command submission ioctl, that means user space must generate CS when
usin
On 12 May 2017 at 13:34, zhoucm1 wrote:
> 1. generally, functions in amdgpu_cs.c should be with amdgpu_cs_ as prefix.
Okay I've fixed this and previous patch up locally.
> 2. If I'm not wrong to your proposal, SYNCOBJ_IN is to semaphore wait while
> SYNCOBJ_OUT is to semaphore signal. SYNCOBJ_IN
On 2017-05-11 08:34 PM, Dave Airlie wrote:
From: Dave Airlie
Sync objects are new toplevel drm object, that contain a
pointer to a fence. This fence can be updated via command
submission ioctls via drivers.
There is also a generic wait obj API modelled on the vulkan
wait API (with code model
The series looks ok to me so far, just the minor rebase nit on the first
patch.
Let me take an look again tomorrow morning since it is 1am and I
might've missed something.
Regards,
Andres
On 2017-05-11 08:34 PM, Dave Airlie wrote:
From: Dave Airlie
This creates a new command submission ch
On 2017年05月12日 12:17, Dave Airlie wrote:
On 12 May 2017 at 13:34, zhoucm1 wrote:
1. generally, functions in amdgpu_cs.c should be with amdgpu_cs_ as prefix.
Okay I've fixed this and previous patch up locally.
2. If I'm not wrong to your proposal, SYNCOBJ_IN is to semaphore wait while
SYNCO
sem should be delete from the previous sem list
then add to the new sem list.
If adding sem to the list which is same as previous one,
it will cause endless loop when traverses the sem list.
[ 264.133878] NMI watchdog: BUG: soft lockup - CPU#5 stuck for 22s!
...
[ 264.133928] task: a216ffbf
Am 12.05.2017 um 01:31 schrieb Lyude:
We end up reading the interrupt register for HPD5, and then writing it
to HPD6 which on systems without anything using HPD5 results in
permanently disabling hotplug on one of the display outputs after the
first time we acknowledge a hotplug interrupt from the
This is internal only patch, please send to internal mail list.
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Junwei Zhang
Sent: Friday, May 12, 2017 2:54 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Jerry
Subject: [PATCH] drm/amdgpu: fix
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