From: Michel Dänzer
Calling drmmode_crtc_scanout_allocate in drmmode_crtc_shadow_allocate
resulted in drmmode_crtc_scanout_create called from
drmmode_crtc_shadow_create passing an uninitialized pitch value to
drmmode_create_bo_pixmap.
Fixes issues such as failure to allocate the scanout pixmap o
From: Michel Dänzer
We cannot use the HW cursor in that case, but in turn we get more
efficient and less teary updates of rotated outputs.
(Ported from radeon commit f2bc882f1c1082bed9f496cfab6c8f07a76bc122)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 12 +---
1 file chan
From: Michel Dänzer
Not used anywhere else anymore.
(Ported from radeon commit ae921a3150f69c38b5b3c88a9e37d54fdf0d5093)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 71 ---
1 file changed, 22 insertions(+), 49 deletions(-)
diff --g
Instead of taking the first pipe and givint the rest to kfd, take the
first 2 queues of each pipe.
Effectively, amdgpu and amdkfd own the same number of queues. But
because the queues are spread over multiple pipes the hardware will be
able to better handle concurrent compute workloads.
amdgpu go
Rename straggler instances of r(adeon)dev to a(mdgpu)dev
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 70 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 14 +++---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 +-
drivers/gpu/drm
Fixed incorrectly using AMDGPU_CTX_PRIORITY instead of AMD_SCHED_PRIORITY.
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Previously the queue/pipe split with kfd operated with pipe
granularity. This patch allows amdgpu to take ownership of an arbitrary
set of queues.
It also consolidates the last few magic numbers in the compute
initialization process into mec_init.
Signed-off-by: Andres Rodriguez
---
drivers/gpu
The MQD programming sequence currently exists in 3 different places.
Refactor it to absorb all the duplicates.
The success path remains mostly identical except for a slightly
different order in the non-kiq case. This shouldn't matter if the HQD
is disabled.
The error handling paths have been upda
Add a new context creation parameter to express a global context priority.
Contexts allocated with AMDGPU_CTX_PRIORITY_HIGH will receive higher
priority to schedule their work than AMDGPU_CTX_PRIORITY_NORMAL
(default) contexts.
v2: Instead of using flags, repurpose __pad
v3: Swap enum values of _
This information is already available in adev.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 12 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 12 ++--
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gp
The CP_MEC_DOORBELL_RANGE_* and CP_PQ_STATUS.DOORBELL_ENABLE registers
are not HQD specific.
They only need to be set once if at least 1 pipe requested doorbell
support.
v2: move doorbell_enable to amdgpu_gfx instead of amdgpu_device
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdg
The gfxv7 contains a slightly different version of cik_mqd called
bonaire_mqd. This can introduce subtle bugs if fixes are not applied in
both places.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 135 ++
1 file changed, 54 insertions
Add an initial framework for changing the HW priorities of rings. The
framework allows requesting priority changes for the lifetime of an
amdgpu_job. After the job completes the priority will decay to the next
lowest priority for which a request is still valid.
A new ring function set_priority() c
Programming CP_HQD_QUEUE_PRIORITY enables a queue to take priority over
other queues on the same pipe. Multiple queues on a pipe are timesliced
so this gives us full precedence over other queues.
Programming CP_HQD_PIPE_PRIORITY changes the SPI_ARB_PRIORITY of the
wave as follows:
0x2: CS_
Tonga based asics may experience hangs when an HQD's EOP parameters
are modified.
Workaround this HW issue by avoiding writes to these registers for
tonga asics.
Based on the following ROCm commit:
2a0fb8 - drm/amdgpu: Synchronize KFD HQD load protocol with CP scheduler
From the ROCm git reposit
Handle HQD deactivation timeouts instead of ignoring them.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx
Pipes provide better concurrency than queues, therefore we want to make
sure that apps use queues from different pipes whenever possible.
Optimize for the trivial case where an app will consume rings in order,
therefore we don't want adjacent rings to belong to the same pipe.
Signed-off-by: Andre
The current implementation is hardcoded to enable ME1/PIPE0 interrupts
only.
This patch allows amdgpu to enable interrupts for any pipe of ME1.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 48 +--
drivers/gpu/drm/amd/amdgpu/gfx_v8_0
The job structure is shared between multiple components, gpu_scheduler
and amdgpu. Make each user hold its own reference to simplify resource
free-ing.
This will also be useful for adding extra callbacks on job completion.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h
Take ownership of pipe initialization away from KFD.
Note that hpd_eop_gpu_addr was already large enough to accomodate all
pipes.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/radeon/cik.c| 27 ++-
drivers/gpu/drm/radeon/radeon_kfd.c | 13 +
2 f
Use the same gfx_*_mqd_commit function for kfd and amdgpu codepaths.
This removes the last duplicates of this programming sequence.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 51 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8
Update the KGD to KFD interface to allow sharing pipes with queue
granularity instead of pipe granularity.
This allows for more interesting pipe/queue splits.
v2: fix overflow check for res.queue_mask
v3: fix shift overflow when setting res.queue_mask
v4: fix comment in is_pipeline_enabled()
Sig
The MQD structure matches the reg layout. Take advantage of this to
simplify HQD programming.
Note that the ACTIVE field still needs to be programmed last.
Suggested-by: Felix Kuehling
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 44 +--
drivers/g
Add amdgpu_queue_mgr, a mechanism that allows disjointing usermode's
ring ids from the kernel's ring ids.
The queue manager maintains a per-file descriptor map of user ring ids
to amdgpu_ring pointers. Once a map is created it is permanent (this is
required to maintain FIFO execution guarantees fo
Use an LRU policy to map usermode rings to HW compute queues.
Most compute clients use one queue, and usually the first queue
available. This results in poor pipe/queue work distribution when
multiple compute apps are running. In most cases pipe 0 queue 0 is
the only queue that gets used.
In orde
Make amdgpu the owner of all per-pipe state of the HQDs.
This change will allow us to split the queues between kfd and amdgpu
with a queue granularity instead of pipe granularity.
This patch fixes kfd allocating an HDP_EOP region for its 3 pipes which
goes unused.
Signed-off-by: Andres Rodriguez
From: Michel Dänzer
(Ported from radeon commit 481394e3c9f9f7d88bb66fe9ae8834c87952a8ab)
Signed-off-by: Michel Dänzer
---
src/amdgpu_dri2.c | 4 ++--
src/drmmode_display.c | 4 +++-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/amdgpu_dri2.c b/src/amdgpu_dri2.c
index e
From: Michel Dänzer
It would probably result in a black screen.
(Ported from radeon commit 1351e48efe7a2c28eab447e16f36a00fbd02ae48)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/drmmode_display.c b/src/drmmode
From: Mihail Konev
(Ported from radeon commit 8e6a4e96b7b27559e186f71b5547abb0a80b96dd)
Signed-off-by: Michel Dänzer
---
autogen.sh | 3 +++
1 file changed, 3 insertions(+)
diff --git a/autogen.sh b/autogen.sh
index 0006de8a..c814d5cf 100755
--- a/autogen.sh
+++ b/autogen.sh
@@ -9,6 +9,9 @@ c
From: Michel Dänzer
Cleanup in preparation for the following change, no functional change
intended.
(Ported from radeon commit 649644a88347a6d03de68f8c41db03a82deeb23b)
Signed-off-by: Michel Dänzer
---
src/amdgpu_kms.c | 62 ++--
1 file chan
From: Michel Dänzer
Cleanup in preparation for following change, no functional change
intended.
(Ported from radeon commit 305e2cbf335837a2ab6a24e9ff65815afe038296)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 85 +--
1 file changed,
From: Michel Dänzer
Option "TearFree" now sets the default value of the output property.
See the manpage update for details.
TearFree is now enabled by default for outputs using rotation or other
RandR transforms, and for RandR 1.4 slave outputs.
(Ported from radeon commit 58cd1600057e41aade010
Am 01.03.2017 um 18:24 schrieb Andres Rodriguez:
On 2017-03-01 12:13 PM, Andres Rodriguez wrote:
On 3/1/2017 6:42 AM, Christian König wrote:
Patches #1-#14 are Acked-by: Christian König
.
Patch #15:
Not sure if that is a good idea or not, need to take a closer look
after digging through
Am 02.03.2017 um 09:02 schrieb Andres Rodriguez:
Add amdgpu_queue_mgr, a mechanism that allows disjointing usermode's
ring ids from the kernel's ring ids.
The queue manager maintains a per-file descriptor map of user ring ids
to amdgpu_ring pointers. Once a map is created it is permanent (this i
On Thu, Mar 2, 2017 at 2:23 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> RADEONWindowExposures_oneshot takes care of it.
>
> Signed-off-by: Michel Dänzer
Reviewed-by: Alex Deucher
> ---
> src/drmmode_display.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/src/drmmode_displ
On Thu, Mar 2, 2017 at 2:59 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> We cannot use the HW cursor in that case, but in turn we get more
> efficient and less teary updates of rotated outputs.
>
> (Ported from radeon commit f2bc882f1c1082bed9f496cfab6c8f07a76bc122)
>
> Signed-off-by: Miche
On Thu, Mar 2, 2017 at 4:18 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Option "TearFree" now sets the default value of the output property.
> See the manpage update for details.
>
> TearFree is now enabled by default for outputs using rotation or other
> RandR transforms, and for RandR 1.
On Wed, Mar 1, 2017, at 16:28, Zeng, Oak wrote:
> COMPUTE_PGM* registers are per pipe per queue - each queue of each pipe
> has a copy of those registers.
COMPUTE_* are ADC registers. These are instantiated once per pipe. The
values they hold corresponds to the most recent values written from the
This revision implements Christian's latest feedback:
1) Avoid indirection in amdgpu_queue_manager, call the map functions directly
2) Drop refcounting patch for amdgpu_job
3) Restore ring priority from amdgpu_job_free_cb()
___
amd-gfx mailing list
amd
The CP_MEC_DOORBELL_RANGE_* and CP_PQ_STATUS.DOORBELL_ENABLE registers
are not HQD specific.
They only need to be set once if at least 1 pipe requested doorbell
support.
v2: move doorbell_enable to amdgpu_gfx instead of amdgpu_device
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdg
Make amdgpu the owner of all per-pipe state of the HQDs.
This change will allow us to split the queues between kfd and amdgpu
with a queue granularity instead of pipe granularity.
This patch fixes kfd allocating an HDP_EOP region for its 3 pipes which
goes unused.
Signed-off-by: Andres Rodriguez
The MQD programming sequence currently exists in 3 different places.
Refactor it to absorb all the duplicates.
The success path remains mostly identical except for a slightly
different order in the non-kiq case. This shouldn't matter if the HQD
is disabled.
The error handling paths have been upda
Take ownership of pipe initialization away from KFD.
Note that hpd_eop_gpu_addr was already large enough to accomodate all
pipes.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/radeon/cik.c| 27 ++-
drivers/gpu/drm/radeon/radeon_kfd.c | 13 +
2 f
Handle HQD deactivation timeouts instead of ignoring them.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx
Use an LRU policy to map usermode rings to HW compute queues.
Most compute clients use one queue, and usually the first queue
available. This results in poor pipe/queue work distribution when
multiple compute apps are running. In most cases pipe 0 queue 0 is
the only queue that gets used.
In orde
Previously the queue/pipe split with kfd operated with pipe
granularity. This patch allows amdgpu to take ownership of an arbitrary
set of queues.
It also consolidates the last few magic numbers in the compute
initialization process into mec_init.
Signed-off-by: Andres Rodriguez
---
drivers/gpu
Tonga based asics may experience hangs when an HQD's EOP parameters
are modified.
Workaround this HW issue by avoiding writes to these registers for
tonga asics.
Based on the following ROCm commit:
2a0fb8 - drm/amdgpu: Synchronize KFD HQD load protocol with CP scheduler
From the ROCm git reposit
Add an initial framework for changing the HW priorities of rings. The
framework allows requesting priority changes for the lifetime of an
amdgpu_job. After the job completes the priority will decay to the next
lowest priority for which a request is still valid.
A new ring function set_priority() c
Add amdgpu_queue_mgr, a mechanism that allows disjointing usermode's
ring ids from the kernel's ring ids.
The queue manager maintains a per-file descriptor map of user ring ids
to amdgpu_ring pointers. Once a map is created it is permanent (this is
required to maintain FIFO execution guarantees fo
The current implementation is hardcoded to enable ME1/PIPE0 interrupts
only.
This patch allows amdgpu to enable interrupts for any pipe of ME1.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 48 +--
drivers/gpu/drm/amd/amdgpu/gfx_v8_0
Add a new context creation parameter to express a global context priority.
Contexts allocated with AMDGPU_CTX_PRIORITY_HIGH will receive higher
priority to schedule their work than AMDGPU_CTX_PRIORITY_NORMAL
(default) contexts.
v2: Instead of using flags, repurpose __pad
v3: Swap enum values of _
Pipes provide better concurrency than queues, therefore we want to make
sure that apps use queues from different pipes whenever possible.
Optimize for the trivial case where an app will consume rings in order,
therefore we don't want adjacent rings to belong to the same pipe.
Signed-off-by: Andre
This information is already available in adev.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 12 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 12 ++--
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gp
Programming CP_HQD_QUEUE_PRIORITY enables a queue to take priority over
other queues on the same pipe. Multiple queues on a pipe are timesliced
so this gives us full precedence over other queues.
Programming CP_HQD_PIPE_PRIORITY changes the SPI_ARB_PRIORITY of the
wave as follows:
0x2: CS_
Use the same gfx_*_mqd_commit function for kfd and amdgpu codepaths.
This removes the last duplicates of this programming sequence.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 51 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8
Rename straggler instances of r(adeon)dev to a(mdgpu)dev
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 70 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 14 +++---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 +-
drivers/gpu/drm
The gfxv7 contains a slightly different version of cik_mqd called
bonaire_mqd. This can introduce subtle bugs if fixes are not applied in
both places.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 135 ++
1 file changed, 54 insertions
Instead of taking the first pipe and givint the rest to kfd, take the
first 2 queues of each pipe.
Effectively, amdgpu and amdkfd own the same number of queues. But
because the queues are spread over multiple pipes the hardware will be
able to better handle concurrent compute workloads.
amdgpu go
Update the KGD to KFD interface to allow sharing pipes with queue
granularity instead of pipe granularity.
This allows for more interesting pipe/queue splits.
v2: fix overflow check for res.queue_mask
v3: fix shift overflow when setting res.queue_mask
v4: fix comment in is_pipeline_enabled()
Sig
The MQD structure matches the reg layout. Take advantage of this to
simplify HQD programming.
Note that the ACTIVE field still needs to be programmed last.
Suggested-by: Felix Kuehling
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 44 +--
drivers/g
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