Am 12.12.2017 um 08:58 schrieb Chunming Zhou:
On 2017年12月09日 00:41, Christian König wrote:
Instead of falling back to 2 level and very limited address space use
2+1 PD support and 128TB + 512GB of virtual address space.
Signed-off-by: Christian König
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drivers/gpu/drm/amd/amdgpu/amdgpu.h
On 2017年12月09日 00:41, Christian König wrote:
Instead of falling back to 2 level and very limited address space use
2+1 PD support and 128TB + 512GB of virtual address space.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgp
For yours, seems not ready yet, right?
It is completely functional and tested.
We should handle 64KB native page to 16 * 4KB sub-PTB for TF case,
which is the only verified option by HW.
No, we are using only 2M page since Vega10 now and so far that works
perfectly fine.
We are seriously not
It is a coincidence, I also am trying to implement this, still under debug.
For yours, seems not ready yet, right?
We should handle 64KB native page to 16 * 4KB sub-PTB for TF case, which
is the only verified option by HW.
For TF case, the number entries and shift of PTB is a bit different from
