[Public]
/* number of umc channel instance with memory map register access */
-#define UMC_V6_7_CHANNEL_INSTANCE_NUM 4
+#define UMC_V6_7_UMC_INSTANCE_NUM 4
/* number of umc instance with memory map register access */
-#define UMC_V6_7_UMC_INSTANCE_NUM 8
+#define
[AMD Official Use Only]
Reviewed-By: John Clements
From: Joshi, Mukul
Sent: Thursday, July 29, 2021 11:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Clements, John ; Zhang, Hawking
; Joshi, Mukul
Subject: [PATCH] drm/amdgpu: Fix channel_index table layout for A
