I think for now we should just have a the following code in amdgpu_vm_fini:
dma_fence_wait(vm->last_tlb_flush, false);
/* Make sure that all fence callbacks have completed*/
spinlock(vm->last_tlb_flush->lock);
spinunlock(vm->last_tlb_flush->lock);
dma_fence_put(vm->last_tlb_flush);
Cleaning that
[AMD Official Use Only]
we make something like dma_fence_release does.
@@ -783,11 +783,15 @@ dma_fence_default_wait(struct dma_fence *fence, bool
intr, signed long timeout)
unsigned long flags;
signed long ret = timeout ? timeout : 1;
- if (test_bit(DMA_FENCE_FLAG_SIGNALED
