Am 13.03.23 um 14:21 schrieb Felix Kuehling:
Am 2023-03-13 um 03:36 schrieb Christian König:
Am 10.03.23 um 23:16 schrieb Felix Kuehling:
This will make it possible for amdgpu GEM ioctls to flush TLBs on
compute
VMs.
This removes VMID-based TLB flushing and always uses PASID-based
flushin
Am 2023-03-13 um 03:36 schrieb Christian König:
Am 10.03.23 um 23:16 schrieb Felix Kuehling:
This will make it possible for amdgpu GEM ioctls to flush TLBs on
compute
VMs.
This removes VMID-based TLB flushing and always uses PASID-based
flushing. This still works because it scans the VMID-PA
Am 10.03.23 um 23:16 schrieb Felix Kuehling:
This will make it possible for amdgpu GEM ioctls to flush TLBs on compute
VMs.
This removes VMID-based TLB flushing and always uses PASID-based
flushing. This still works because it scans the VMID-PASID mapping
registers to find the right VMID. It's o
On 3/10/23 14:16, Felix Kuehling wrote:
> +static inline void kfd_flush_tlb(struct kfd_process_device *pdd,
>enum TLB_FLUSH_TYPE type)
Whitespace damage?
Regards,
Daniel
This will make it possible for amdgpu GEM ioctls to flush TLBs on compute
VMs.
This removes VMID-based TLB flushing and always uses PASID-based
flushing. This still works because it scans the VMID-PASID mapping
registers to find the right VMID. It's only slightly less efficient. This
is not a prod
