, Alexander
; Sharma, Shashank
Subject: [PATCH v9 1/2] drm/amdgpu: implement TLB flush fence
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From: Christian Koenig
The problem is that when (for example) 4k pages
On 18/03/2024 19:10, Christian König wrote:
Am 18.03.24 um 17:11 schrieb Shashank Sharma:
From: Christian Koenig
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
Am 18.03.24 um 17:11 schrieb Shashank Sharma:
From: Christian Koenig
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
Solve this by moving the TLB flush into a DMA
der
> ; Sharma, Shashank
>
> Subject: [PATCH v9 1/2] drm/amdgpu: implement TLB flush fence
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> From: Christian Koenig
>
> The
From: Christian Koenig
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
Solve this by moving the TLB flush into a DMA-fence object which
can be used to delay the fre
