RE: [PATCH v2] drm/amd/pp: Implement get_max_high_clocks for CI/VI

2018-01-04 Thread Zhu, Rex
iginal Message- From: Alex Deucher [mailto:alexdeuc...@gmail.com] Sent: Thursday, January 04, 2018 2:58 PM To: Zhu, Rex Cc: amd-gfx list Subject: Re: [PATCH v2] drm/amd/pp: Implement get_max_high_clocks for CI/VI On Thu, Jan 4, 2018 at 1:01 AM, Rex Zhu wrote: > v2: add table length check.

Re: [PATCH v2] drm/amd/pp: Implement get_max_high_clocks for CI/VI

2018-01-03 Thread Alex Deucher
On Thu, Jan 4, 2018 at 1:01 AM, Rex Zhu wrote: > v2: add table length check. > > DC component expect PP to give max engine clock and > memory clock through pp_get_display_mode_validation_clocks > on DGPU as well. > > This patch can fix MultiGPU-Display blank > out with 1 IGPU-4k display and 2 DGPU

[PATCH v2] drm/amd/pp: Implement get_max_high_clocks for CI/VI

2018-01-03 Thread Rex Zhu
v2: add table length check. DC component expect PP to give max engine clock and memory clock through pp_get_display_mode_validation_clocks on DGPU as well. This patch can fix MultiGPU-Display blank out with 1 IGPU-4k display and 2 DGPU-two 4K displays. Change-Id: I20454060ebe01955c5653de037dd8c0