On 2018-08-20 03:54 AM, Rex Zhu wrote:
> Used wrong pp interface, the original interface is
> exposed by dpm on SI and paritial CI.
>
> Pointed out by Francis David
>
> v2: dal only need to set min_dcefclk and min_fclk to smu.
> so use display_clock_voltage_request interface,
> instand
Acked-by: Alex Deucher
From: amd-gfx on behalf of Rex Zhu
Sent: Wednesday, August 22, 2018 2:41:19 AM
To: amd-gfx@lists.freedesktop.org; Francis, David; Wentland, Harry
Cc: Zhu, Rex
Subject: [PATCH v2] drm/amd/display: Fix bug use wrong pp interface
Used
Used wrong pp interface, the original interface is
exposed by dpm on SI and paritial CI.
Pointed out by Francis David
v2: dal only need to set min_dcefclk and min_fclk to smu.
so use display_clock_voltage_request interface,
instand of update all display configuration.
Acked-by: Alex Deu
Used wrong pp interface, the original interface is
exposed by dpm on SI and paritial CI.
Pointed out by Francis David
v2: dal only need to set min_dcefclk and min_fclk to smu.
so use display_clock_voltage_request interface,
instand of update all display configuration.
Acked-by: Alex Deu
