Re: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4)

On 2021-06-30 6:10 a.m., YuBiao Wang wrote: > [Why] > GPU timing counters are read via KIQ under sriov, which will introduce > a delay. > > [How] > It could be directly read by MMIO. > > v2: Add additional check to prevent carryover issue. > v3: Only check for carryover for once to prevent performa

Re: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4)

; Deucher, Alexander ; Quan, Evan ; Koenig, Christian ; Liu, Monk ; Zhang, Hawking Subject: Re: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4) Am 30.06.21 um 12:10 schrieb YuBiao Wang: [Why] GPU timing counters are read via KIQ under sriov, which will introduce a de

RE: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4)

; Quan, Evan ; Koenig, Christian ; Liu, Monk ; Zhang, Hawking Subject: Re: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4) Am 30.06.21 um 12:10 schrieb YuBiao Wang: > [Why] > GPU timing counters are read via KIQ under sriov, which will introduce > a delay. > &

RE: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4)

: Grodzovsky, Andrey ; Quan, Evan ; Chen, Horace ; Tuikov, Luben ; Koenig, Christian ; Deucher, Alexander ; Xiao, Jack ; Zhang, Hawking ; Liu, Monk ; Xu, Feifei ; Wang, Kevin(Yang) ; Wang, YuBiao Subject: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4) [Why] GPU

Re: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4)

On Wed, Jun 30, 2021, at 05:10, YuBiao Wang wrote: > [Why] > GPU timing counters are read via KIQ under sriov, which will introduce > a delay. > > [How] > It could be directly read by MMIO. > > v2: Add additional check to prevent carryover issue. > v3: Only check for carryover for once to prevent

[PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4)

[Why] GPU timing counters are read via KIQ under sriov, which will introduce a delay. [How] It could be directly read by MMIO. v2: Add additional check to prevent carryover issue. v3: Only check for carryover for once to prevent performance issue. v4: Add comments of the rough frequency where car

Re: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay (v4)

Am 30.06.21 um 12:10 schrieb YuBiao Wang: [Why] GPU timing counters are read via KIQ under sriov, which will introduce a delay. [How] It could be directly read by MMIO. v2: Add additional check to prevent carryover issue. v3: Only check for carryover for once to prevent performance issue. v4: A