On Tue, Jun 16, 2020 at 11:26 AM Tom St Denis wrote:
>
> Despite having different IP offsets the computed address of the register(s)
> are the same between gfx7..gfx10. This patch fixes the offset relative
> to the GC block on gfx10.
>
> (v2): SQ_DEBUG_STS_GLOBAL2 is 0x10 higher ...
>
> Signed-of
Despite having different IP offsets the computed address of the register(s)
are the same between gfx7..gfx10. This patch fixes the offset relative
to the GC block on gfx10.
(v2): SQ_DEBUG_STS_GLOBAL2 is 0x10 higher ...
Signed-off-by: Tom St Denis
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drivers/gpu/drm/amd/include/asic_reg/gc/gc_
