[PATCH] drm/amdgpu: Lock reset domain when VF get host FLR work message

- Clear AMDGPU_HOST_FLR bit after recovery completes Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 --- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 4 drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 4 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 4 4

[PATCH] drm/amdgpu: refine MES register print for devices of hive

[Why] Register access print missed device info. [How] Using dev_xxx instead of DRM_xxx to indicate which device of a hive is the message for. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff

[PATCH v3] drm/amd/amdkfd: Evict all queues even HWS remove queue failed

] Keep removing all queues even if HWS returns failed. It will not affect cpsch as it checks reset_domain->sem. v2: If any queue failed, evict queue returns error. v3: Declare err inside the if-block. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

[PATCH v2] drm/amd/amdkfd: Evict all queues even HWS remove queue failed

] Keep removing all queues even if HWS returns failed. It will not affect cpsch as it checks reset_domain->sem. v2: If any queue failed, evict queue returns error. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 8 1 file changed, 4 insertions(+)

[PATCH] drm/amd/amdkfd: Evict all queues even HWS remove queue failed

] Keep removing all queues even if HWS returns failed. It will not affect cpsch as it checks reset_domain->sem. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amd

[PATCH] drm/amd/pm: Update smu_v13_0_0 SRIOV VF flag in msg mapping table

[Why] Under SRIOV VF, driver send a VF unsupportted smu message causing a failure. [How] Update smu_v13_0_0 message mapping table based on PMFW. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff

[PATCH] drm/amdgpu: Set no_hw_access when VF request full GPU fails

stuck state. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index ccb3d041c2b2..111c380f929b 100644 --- a/drivers/gpu

[PATCH v2 2/2] drm/amdgpu: Add MES KIQ clear to tell RLC that KIQ is dequeued

[Why] As MES KIQ is dequeued, tell RLC that KIQ is inactive [How] Clear the RLC_CP_SCHEDULERS Active bit which RLC checks KIQ status In addition, driver can halt MES under SRIOV when unloading driver v2: Use scheduler0 mask to clear KIQ portion of RLC_CP_SCHEDULERS Signed-off-by: Yifan Zha

[PATCH 2/2] drm/amdgpu: Add MES KIQ clear to tell RLC that KIQ is dequeued

[Why] As MES KIQ is dequeued, tell RLC that KIQ is inactive [How] Clear the RLC_CP_SCHEDULERS Active bit which RLC checks KIQ status In addition, driver can halt MES under SRIOV when unloading driver Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 16 ++-- 1

[PATCH 1/2] drm/amdgpu: Add MES KIQ dequeue in MES hw fini

[Why] Need dequeue MES KIQ under SRIOV when unloading driver [How] Modify mes_v11_0_kiq_dequeue_sched which was used to dequeue MES SCHED to support veriable pipe. Add MES KIQ dequeue in hw fini Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 17 +++-- 1 file

[PATCH] drm/amdgpu: Add JPEG IP block to SRIOV reinit

[Why] Reset(mode1) failed as JPRG IP did not reinit under sriov. [How] Add JPEG IP block to sriov reinit function. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH] drm/amdgpu: Init MMVM_CONTEXTS_DISABLE in gmc11 golden setting under SRIOV

MMVM_CONTEXTS_DISABLE in gmc11 golden register setting. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 2 ++ drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 6 ++ drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c | 3 +++ 3 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/amd

[PATCH] drm/amdgpu: Revert programming GRBM_GFX_* in RLCG interface to support GFX9

witched to incorrect ME. [How] With checking RLCG accessing flag, keep writing GRBM_GFX_* as a legacy way. But it is still skipped on GFX10+ to avoid violation occurrence. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 4 1 file changed, 4 insertions(+) diff --git a/d

[PATCH v2] drm/amdgpu: Remove writing GRBM_GFX_CNTL in RLCG interface under SRIOV

. v2: Remove directly writing GRBM_GFX_INDEX in amdgpu_virt_rlcg_reg_rw as RLCG interface no need to use it. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd

[PATCH] drm/amdgpu: Remove writing GRBM_GFX_CNTL in RLCG interface under SRIOV

. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index f39391e03d46..0e05fa0001f6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ b

[PATCH] drm/amdgpu: Skip specific mmhub and sdma registers accessing under sriov

register, VF don't need to program it in sdma_v6_0. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c | 34 - drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 10 +--- 2 files changed, 23 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/amd/a

[PATCH] drm/amdgpu: Remove programming GCMC_VM_FB_LOCATION* on gfxhub_v3_0_3 in VF

[Why] GCMC_VM related registers should be programmed by PSP on host side. L1 and RLCG will block these regisers on VF. [How] Remove programming GCMC_VM_FB_LOCATION_BASE/TOP on gfxhub_v3_0_3 under SRIOV VF. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c | 12

[PATCH] drm/amdgpu: Skip access GRBM_CNTL under SRIOV on gfx_v11

[Why] GRBM_CNTL is a PF_only register on gfx_v11. RLCG interface will return "out of range" under SRIOV VF. [How] Skip access GRBM_CNTL under gfx_v11 SRIOV VF. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletio

[PATCH v2] drm/amdgpu: Skip program gfxhub_v3_0_3 system aperture registers under SRIOV

[Why] gfxhub_v3_0_3 system aperture registers are removed from RLCG register access range. [How] Skip access gfxhub_v3_0_3 system aperture registers under SRIOV VF. These registers will be programmed on host side. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c | 3

[PATCH 2/2] drm/amdgpu: Skip program gfxhub_v3_0_3 system aperture registers under SRIOV

[Why] gfxhub_v3_0_3 system aperture registers are removed from RLCG register access range. [How] Skip access gfxhub_v3_0_3 system aperture registers under SRIOV VF. These registers will be programmed on host side. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c | 3

[PATCH 1/2] drm/admgpu: Skip access SDMA0_F32_CNTL in sdma_v6_0_enable under SRIOV

[Why] SDMA0_F32_CNTL is a PF_only regitser which will be blocked by L1. RLCG will not program the register as well. [How] Skip to program SDMA0_F32_CNTL under SRIOV VF. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a

[PATCH] drm/amdgpu: Program GC registers through RLCG interface in gfx_v11/gmc_v11

[Why] L1 blocks most of GC registers accessing by MMIO. [How] Use RLCG interface to program GC registers under SRIOV VF in full access time. Signed-off-by: Yifan Zha Reviewed-by: Hawking Zhang --- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

[PATCH] drm/amdgpu: Move CAP firmware loading to the beginning of PSP firmware list

to the beginning of AMDGPU_UCODE_ID enum list. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h index 428f4df184d0

[PATCH] drm/amd/pm: Update navi12 smu message mapping table in sriov

[Why] Sending invalid SMU message in sriov cause set dpm level fail. [How] Update message table based on SMU firmware. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm

[PATCH] drm/amd/pm: Disable SMU messages in navi10 sriov

[Why] sriov vf send unsupported SMU message lead to fail. [How] disable related messages in sriov. Signed-off-by: Yifan Zha --- drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11