From: tiancyin
[why]
When cursor moves across screen boarder, lag cursor observed,
since subvp settings need to sync up with vblank, that cause
cursor updates being delayed.
[how]
Enable fast plane updates on DCN3.2 to fix it.
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/display/amdgpu_dm/
From: tiancyin
[Why]
Variable adev->crtc_irq.num_types was initialized as the value of
adev->mode_info.num_crtc at early_init stage, later at hw_init stage,
the num_crtc changed due to the display pipe harvest on some SKUs,
but the num_types was not updated accordingly, that cause below error
in
From: tiancyin
[Why]
Display pipe might be harvested on some SKUs, that cause the
adev->mode_info.num_crtc mismatch with the usable crtc number,
then below error dmesgs observed after GPU recover.
*ERROR* amdgpu_dm_set_crtc_irq_state: crtc is NULL at id :3
*ERROR* amdgpu_dm_set_crtc_irq_stat
From: tiancyin
[why]
Since the variable fpu_recursion_depth is per-CPU type, it has one copy
on each CPU, thread migration causes data consistency issue, then the
call trace shows up. And preemption disabling can't prevent migration.
[how]
Disable migration to ensure consistency of fpu_recursion
From: tiancyin
[why]
When the new pipe_ctx holds a valid gsl_group, the old code logic will
overwrite it unconditionally, this cause the new pipe_ctx's gsl_group
have no chance to be released, i.e. the gsl_group leaked.
[how]
Don't overwrite the new pipe_ctx's gsl_group, if it holds a valid
gsl_
From: tiancyin
Some video card has more than one vcn instance, passing 0 to
vcn_v3_0_pause_dpg_mode is incorrect.
Error msg:
Register(1) [mmUVD_POWER_STATUS] failed to reach value
0x0001 != 0x0002
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
1 file changed
Prior to disabling dpg, VCN need unpausing dpg mode, or VCN will hang in
S3 resuming.
Signed-off-by: Tianci Yin
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index
From: "Tianci.Yin"
[why]
On Renoir, vcn ring test failed on the second time insmod in the reload
test. After invetigation, it proves that vcn only can disable dpg under
dpg unpause mode (dpg unpause mode is default for dec only, dpg pause
mode is for dec/enc).
[how]
unpause dpg in dpg stopping p
From: "Tianci.Yin"
[why]
CP hangs in igt reloading test on renoir, more precisely, hangs on the
second time insmod.
[how]
mode2 reset can make it recover, and mode2 reset only effects gfx core,
dcn and the screen will not be impacted.
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/s
From: "Tianci.Yin"
[why]
The DP KVM failed to light up, since the lttpr_mode is not reset to
default value when failed to read LTTPR capabilities, and the
variable max_link_rate retains a initial value zero, this cause variable
link_rate be assigned to an error value zero, consquently pixel_clock
From: "Tianci.Yin"
[why]
In rmmod procedure, kfd sends cp a dequeue request, but the
request does not get response, then an error message "cp
queue pipe 4 queue 0 preemption failed" printed.
[how]
Performing kfd suspending after disabling gfxoff can fix it.
Change-Id: I0453f28820542d4a5ab26e38f
From: "Tianci.Yin"
There is a NULL pointer crash when DCN disabled on headless SKU.
On normal SKU, the variable adev->ddev.mode_config.funcs is
initialized in dm_hw_init(), and it is fine to access it in
amdgpu_device_resume(). But on headless SKU, DCN is disabled,
the funcs variable is not initi
From: "Tianci.Yin"
The crash caused by the NULL pointer of
adev->ddev.mode_config.funcs in drm_kms_helper_hotplug_event(),
but this function should not be called on headless SKU.
Fix the mismatch between the return value of
amdgpu_device_has_dc_support() and the real DCN supporting
state to avoi
From: "Tianci.Yin"
The blockchain SKU has no display and video support, remove them.
Change-Id: I419cfae8b00125f3bff18c0a8cd92f3266d5f04a
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/nv.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gp
From: "Tianci.Yin"
Change-Id: I58129e3aa88369c85929e4dde002cf43c3ff288a
Reviewed-by: Guchun Chen
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgp
From: "Tianci.Yin"
The blockchain SKU has no display support, remove it.
Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
Reviewed-by: Guchun Chen
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 +
From: "Tianci.Yin"
Change-Id: I58129e3aa88369c85929e4dde002cf43c3ff288a
Reviewed-by: Guchun Chen
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgp
From: "Tianci.Yin"
The blockchain SKU has no VCN support, remove it.
Change-Id: I26fbdabdf67aada24c5aebef999ee8b5f9c0bfe2
Reviewed-by: Guchun Chen
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
From: "Tianci.Yin"
The blockchain SKU has no display support, so the DCN ip
block should be disabled. Add DID/RID as display
supporting dependence, it potentially disable DCN block.
Change-Id: Ia83bef1499708dfd0113fe2dbb3eb4143452c1cd
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/am
From: "Tianci.Yin"
The blockchain SKU has no VCN support, remove it.
Change-Id: I26fbdabdf67aada24c5aebef999ee8b5f9c0bfe2
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/nv.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/driv
From: "Tianci.Yin"
Change-Id: I58129e3aa88369c85929e4dde002cf43c3ff288a
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 564336c2ee66
From: "Tianci.Yin"
On Navi1x, the SPM golden settings are lost after GFXOFF
enter/exit, so reconfigure the golden settings after GFXOFF
exit.
Change-Id: I9358ba9c65f241c36f8a35916170b19535148ee9
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8 +++-
1 file changed,
From: "Tianci.Yin"
On Navi1x, the SPM golden settings are lost after GFXOFF
enter/exit, so reconfiguration is needed. Make the
configuration code as an interface for future use.
Change-Id: I172f3dc7f59da69b0364052dcad75a9c9aab019e
Reviewed-by: Luben Tuikov
Reviewed-by: Feifei Xu
Signed-off-by:
From: "Tianci.Yin"
On Navi1x, the SPM golden settings will be lost after GFXOFF enter/exit,
reconfiguration is needed. Make the configuration code as an interface for
future use.
Change-Id: I172f3dc7f59da69b0364052dcad75a9c9aab019e
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgp
From: "Tianci.Yin"
On Navi1x, the SPM golden settings will be lost after GFXOFF enter/exit,
reconfigure the golden settings after GFXOFF exit.
Change-Id: I9358ba9c65f241c36f8a35916170b19535148ee9
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 11 +++
1 file
From: "Tianci.Yin"
The bounding box is still needed by Navi12, temporarily read it from gpu_info
firmware. Should be droped when DAL no longer needs it.
Change-Id: Ifc330ec860f9b0665134a81df2fc80ca91c41a33
Reviewed-by: Alex Deucher
Reviewed-by: Xiaojie Yuan
Signed-off-by: Tianci.Yin
---
driv
From: "Tianci.Yin"
Add RLC_SPM golden settings
Change-Id: I276699f6b77f3d0751349af09eec482584091f89
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1059
1 file changed, 1059 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/d
From: "Tianci.Yin"
Add RLC_SPM golden settings
Change-Id: I5d3564aae13a7352514c0795b7d087d1534fe374
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 627 +
1 file changed, 627 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/dr
From: "Tianci.Yin"
Add RLC_SPM golden settings
Change-Id: I616e127171293d915cb3a05dee02f51cec8d8f6f
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1059
1 file changed, 1059 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/d
From: "Tianci.Yin"
Add RLC_SPM golden settings
Change-Id: I616e127171293d915cb3a05dee02f51cec8d8f6f
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c|9 +
.../gpu/drm/amd/amdgpu/golden_gc_spm_10_1_0.h | 1058 +
2 files changed, 1067 insertions(+)
From: "Tianci.Yin"
[why]
When GTT domain size is smaller than VRAM, if APP apply a very large
buffer whose size is larger than GTT but smaller than VRAM, the size
validation will fail.
[how]
Validate VRAM domain size at first place, then GTT domain.
Change-Id: Ic1d31b9b0a4939e6bba0241ff79ae9aa2
From: "Tianci.Yin"
[why]
CP firmware decide to skip setting the state for 3D pipe 1 for Navi1x as there
is no use case.
[how]
Disable 3D pipe 1 on Navi1x.
Change-Id: I6898bdfe31d4e7908bd9bcfa82b6a75e118e8727
Reviewed-by: Hawking Zhang
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/
From: "Tianci.Yin"
This reverts commit 2ad857d7b82081736c078997ba0542acfdd50099.
The patch will be replaced with a better solution, revert it.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 5 -
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 27 +
2 files changed, 1 inser
From: "Tianci.Yin"
[why]
In GDDR6 BIST training, a certain mount of bottom VRAM will be encroached by
UMC, that causes problems(like GTT corrupted and page fault observed).
[how]
Saving the content of this bottom VRAM to system memory before training, and
restoring it after training to avoid VRA
From: "Tianci.Yin"
[why]
In GDDR6 BIST training, a certain mount of bottom VRAM will be encroached by
UMC, that causes problems(like GTT corrupted and page fault observed).
[how]
Saving the content of this bottom VRAM to system memory before training, and
restoring it after training to avoid VRA
From: "Tianci.Yin"
This reverts commit 2ad857d7b82081736c078997ba0542acfdd50099.
The patch will be replaced with a better solution, revert it.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 5 -
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 27 +
2 files changed, 1 inser
From: "Tianci.Yin"
remove registers: mmSPI_CONFIG_CNTL
add registers: mmSPI_CONFIG_CNTL_1
Change-Id: I8d1c5d0a0553d60a6e419d6acb9750e5b2634e49
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
From: "Tianci.Yin"
remove registers: mmSPI_CONFIG_CNTL
add registers: mmSPI_CONFIG_CNTL_1
Change-Id: I0bbaeca184e7dc85463d6c5740151d6ba1b08c06
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
From: "Tianci.Yin"
[why]
In dual GPUs scenario, stolen_size is assigned to zero on the secondary GPU,
since there is no pre-OS console using that memory. Then the bottom region of
VRAM was allocated as GTT, unfortunately a small region of bottom VRAM was
encroached by UMC firmware during GDDR6 BI
From: "Tianci.Yin"
[why]
In dual GPUs scenario, stolen_size is assigned to zero on the secondary GPU,
since there is no pre-OS console using that memory. Then the bottom region of
VRAM was allocated as GTT, unfortunately a small region of bottom VRAM was
encroached by UMC firmware during GDDR6 BI
From: "Tianci.Yin"
[why]
In dual GPUs scenario, stolen_size is assigned to zero on the secondary GPU,
since there is no pre-OS console using that memory. Then the bottom region of
VRAM was allocated as GTT, unfortunately a small region of bottom VRAM was
encroached by UMC firmware during GDDR6 BI
From: "Tianci.Yin"
[why]
In dual GPUs scenario, stolen_size is assigned to zero on the secondary GPU,
since there is no pre-OS console using that memory. Then the bottom region of
VRAM was allocated as GTT, unfortunately a small region of bottom VRAM was
encroached by UMC firmware during GDDR6 BI
From: "Tianci.Yin"
[why]
In dual GPUs scenario, stolen_size is assigned to zero on the 2nd GPU,
then the bottom region of VRAM was allocated as GTT, unfortunately
a small region of bottom VRAM was encroached by UMC firmware during
GDDR6 BIST training, this cause pagefault.
[how]
Forcing stolen_s
From: "Tianci.Yin"
The method of getting fb_loc changed from parsing VBIOS to
taking certain offset from top of VRAM
Change-Id: I053b42fdb1d822722fa7980b2cd9f86b3fdce539
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_atomb
From: "Tianci.Yin"
IP discovery TMR(occupied the top VRAM with size DISCOVERY_TMR_SIZE)
has been reserved, and the p2c buffer is in the range of this TMR, so
the p2c buffer reservation is unnecessary.
Change-Id: Ib1f2f2b4a1f3869c03ffe22e2836cdbee17ba99f
Reviewed-by: Kevin Wang
Reviewed-by: Xiao
From: "Tianci.Yin"
IP discovery TMR(occupied the top VRAM with size DISCOVERY_TMR_SIZE)
has been reserved, and the p2c buffer is in the range of this TMR, so
the p2c buffer reservation is unnecessary.
Change-Id: Ib1f2f2b4a1f3869c03ffe22e2836cdbee17ba99f
Reviewed-by: Kevin Wang
Signed-off-by: Ti
From: "Tianci.Yin"
The method of getting fb_loc changed from parsing VBIOS to
taking certain offset from top of VRAM
Change-Id: I053b42fdb1d822722fa7980b2cd9f86b3fdce539
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_atomb
From: "Tianci.Yin"
IP discovery TMR(occupied the top VRAM with size DISCOVERY_TMR_SIZE)
has been reserved, and the p2c buffer is in the range of this TMR, so
the p2c buffer reservation is unnecessary.
Change-Id: Ib1f2f2b4a1f3869c03ffe22e2836cdbee17ba99f
Signed-off-by: Tianci.Yin
---
drivers/gp
From: "Tianci.Yin"
The method of getting fb_loc changed from parsing VBIOS to
taking certain offset from top of VRAM
Change-Id: I053b42fdb1d822722fa7980b2cd9f86b3fdce539
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 2 +-
.../gpu/drm
From: "Tianci.Yin"
The method of getting fb_loc changed from parsing VBIOS to
taking certain offset from top of VRAM
Change-Id: I053b42fdb1d822722fa7980b2cd9f86b3fdce539
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +-
.../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 36 ++-
From: "Tianci.Yin"
IP discovery TMR(occupied the top VRAM with size DISCOVERY_TMR_SIZE)
has been reserved, and the p2c buffer is in the range of this TMR, so
the p2c buffer reservation is unnecessary.
Change-Id: Ib1f2f2b4a1f3869c03ffe22e2836cdbee17ba99f
Signed-off-by: Tianci.Yin
---
drivers/gp
From: "Tianci.Yin"
IP discovery TMR(occupied the top VRAM with size DISCOVERY_TMR_SIZE)
has been reserved, and the p2c buffer is in the range of this TMR, so
the p2c buffer reservation is unnecessary.
Change-Id: Ib1f2f2b4a1f3869c03ffe22e2836cdbee17ba99f
Signed-off-by: Tianci.Yin
---
drivers/gp
From: "Tianci.Yin"
The method of getting fb_loc changed from parsing VBIOS to
taking certain offset from top of VRAM
Change-Id: I053b42fdb1d822722fa7980b2cd9f86b3fdce539
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +-
.../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 36 ++-
From: "Tianci.Yin"
add registers: mmPA_SC_BINNER_TIMEOUT_COUNTER and mmPA_SC_ENHANCE_2
Change-Id: I23dabb0e706af0b5376f9749200832e894944eca
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_
From: "Tianci.Yin"
add registers: mmPA_SC_BINNER_TIMEOUT_COUNTER and mmPA_SC_ENHANCE_2
Change-Id: I1fc3fb481b2d9edc482a32497242a8be6cd6b8d7
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_
From: "Tianci.Yin"
add registers: mmSPI_CONFIG_CNTL
update registers: mmDB_DEBUG4 and mmUTCL1_CTRL
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu
From: "Tianci.Yin"
add registers: mmSPI_CONFIG_CNTL
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index ed630d37c32c..f3324fa4e194 100644
From: "Tianci.Yin"
add registers: mmSPI_CONFIG_CNTL
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index f3324fa4e194..db9b8bfb1c3c 100644
From: "Tianci.Yin"
update registers: mmCGTT_SPI_CLK_CTRL
Change-Id: I35fb25be1340d8c062e0e5bfff642009a00d52cf
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drive
From: "Tianci.Yin"
update registers: mmCGTT_SPI_CLK_CTRL
Change-Id: Ic64d532c61adfdeb681903f1133d9b353579ac55
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drive
From: "Tianci.Yin"
update registers: mmCGTT_SPI_CLK_CTRL
Change-Id: Ib2539aae1fb0d001278b7f89c90ad6296f9fb85f
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drive
From: "Tianci.Yin"
add memory training implementation code to save resume time.
Change-Id: I625794a780b11d824ab57ef39cc33b872c6dc6c9
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 ++
drive
From: "Tianci.Yin"
memory training using specific fixed vram segment, reserve these
segments before anyone may allocate it.
Change-Id: I1436755813a565608a2857a683f535377620a637
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 95 +++
From: "Tianci.Yin"
parse firmware to get memory training capability and fb location.
Change-Id: I147c1d48e255e0191be4beb1ad6b637da607bf75
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 8 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.
From: "Tianci.Yin"
add memory training implementation code to save resume time.
Change-Id: I625794a780b11d824ab57ef39cc33b872c6dc6c9
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 ++
drive
From: "Tianci.Yin"
add a generic helper function for accessing framebuffer via MMIO
Change-Id: I4baa0aa53c93a94c2eff98c6211a61f369239982
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
From: "Tianci.Yin"
add interface for memory training.
Change-Id: Ibb6d1d24eb651df796bc2bb3419a44937af60242
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 18
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 55 +
2 f
From: "Tianci.Yin"
add new vram_reserve_block structure and atomfirmware_internal_constants
enumeration
Change-Id: I6ba642ecd7ad94250162ae5c322ed8d85de9c35a
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/include/atomfirmware.h | 27 +-
1 file
From: "Tianci.Yin"
update amdgpu_discovery to get IP revision.
Change-Id: If8152103d03b58e1dc0f32db63625e290f5f08a0
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h | 2 +-
2 files cha
From: "Tianci.Yin"
introduce psp_v11_0_is_sos_alive func for common use.
Change-Id: Iee0a6dd924d6a4b164eb751c0bec49fcb7d79483
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 22 +-
1 file changed, 13 insertions(+), 9 deletio
From: "Tianci.Yin"
add memory training implementation code to save resume time.
Change-Id: I625794a780b11d824ab57ef39cc33b872c6dc6c9
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 ++
drive
From: "Tianci.Yin"
add interface for memory training.
Change-Id: Ibb6d1d24eb651df796bc2bb3419a44937af60242
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 18
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 55 +
2 f
From: "Tianci.Yin"
memory training using specific fixed vram segment, reserve these
segments before anyone may allocate it.
Change-Id: I1436755813a565608a2857a683f535377620a637
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 96 +++
From: "Tianci.Yin"
parse firmware to get memory training capability and fb location.
Change-Id: I147c1d48e255e0191be4beb1ad6b637da607bf75
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
From: "Tianci.Yin"
add new vram_reserve_block structure and atomfirmware_internal_constants
enumeration
Change-Id: I6ba642ecd7ad94250162ae5c322ed8d85de9c35a
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/include/atomfirmware.h | 28 +-
1 file
From: "Tianci.Yin"
add a generic helper function for accessing framebuffer via MMIO
Change-Id: I4baa0aa53c93a94c2eff98c6211a61f369239982
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
From: "Tianci.Yin"
update amdgpu_discovery to get IP revision.
Change-Id: If8152103d03b58e1dc0f32db63625e290f5f08a0
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h | 2 +-
2 files cha
From: "Tianci.Yin"
introduce psp_v11_0_is_sos_alive func for common use.
Change-Id: Iee0a6dd924d6a4b164eb751c0bec49fcb7d79483
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 22 +-
1 file changed, 13 insertions(+), 9 deletio
From: "Tianci.Yin"
load different cp firmware according to the DID and RID
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/
From: "Tianci.Yin"
load different cp firmware according to the DID and RID
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 24 ++--
1 file changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/dr
From: "Tianci.Yin"
update registers: mmUTCL1_CTRL
Change-Id: I6df12555b72ba6faa926af8155b3f079e422a500
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/
From: "Tianci.Yin"
update registers: mmUTCL1_CTRL
Change-Id: Icb50fb35a427a50a06138b8b3715651eebe92b95
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/
From: "Tianci.Yin"
stolen memory should be fixed in visible region.
Change-Id: Icbbbd39fd113e93423aad8d2555f4073c08020e5
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 --
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++-
2 files changed, 6 insertions(+), 3 deleti
From: "Tianci.Yin"
Fix compute ring test failure in sriov scenario.
Change-Id: I141d3d094e2cba9bcf2f6c96f4d8c4ef43c421c3
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/
From: "Tianci.Yin"
Fix compute ring test failure in sriov scenario.
Change-Id: I141d3d094e2cba9bcf2f6c96f4d8c4ef43c421c3
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/am
From: "Tianci.Yin"
stolen memory should be fixed in visible region.
Change-Id: Icbbbd39fd113e93423aad8d2555f4073c08020e5
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 --
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++-
2 files changed, 6 insertions(+), 3 deleti
From: "Tianci.Yin"
Fix compute ring test failure in sriov scenario.
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 1 +
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amd
From: "Tianci.Yin"
stolen memory should be fixed in visible region.
Change-Id: Icbbbd39fd113e93423aad8d2555f4073c08020e5
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
From: "Tianci.Yin"
Fix compute ring test failure in sriov scenario.
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 1 +
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amd
From: "Tianci.Yin"
so that more visible vram can be available for umd.
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c| 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h| 1 -
3 files changed, 5 insertions(+), 5
From: "Tianci.Yin"
so that more visible vram can be available for ocl applications.
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c| 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h| 1 -
3 files changed, 5 inse
From: tiancyin
[why]
navi14 share same defination of smu interface version with navi10,
anyone of them update the version may break the other one's
version checking.
[how]
create different version defination, so that they can
update their version separately.
Signed-off-by: tiancyin
---
driver
From: tiancyin
update the smu11_driver_if_navi10.h since navi14 smu fw
update to 53.12
Change-Id: If0f729ec87c98f24e1794f0847eac5ba23671e34
Reviewed-by: Evan Quan
Signed-off-by: tiancyin
---
.../drm/amd/powerplay/inc/smu11_driver_if_navi10.h | 25 +-
drivers/gpu/drm/amd/po
From: tiancyin
[why]
navi14 share same defination of smu interface version with navi10,
anyone of them update the version may break the other one's
version checking.
[how]
create different version defination, so that they can
update their version separately.
Signed-off-by: tiancyin
---
driver
From: tiancyin
update the smu11_driver_if_navi10.h since navi14 smu fw
update to 53.12
Change-Id: If0f729ec87c98f24e1794f0847eac5ba23671e34
Reviewed-by: Evan Quan
Signed-off-by: tiancyin
---
.../drm/amd/powerplay/inc/smu11_driver_if_navi10.h | 26 +-
drivers/gpu/drm/amd/po
From: tiancyin
fix the hard code external_rev_id.
Change-Id: I7b46f7b49b6d0586d1fa282d4961815fb124379b
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv
From: tiancyin
ID of DCE_HWIP from vbios is DMU_HWID,
mismatch cause null pointer crash in navi10 modprobe.
Change-Id: I3be363cf5248de904b3bdae2f34d3bbe0bbbc07d
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: tiancyin
update the smu11_driver_if_navi10.h since navi10 smu fw
update to 42.28
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h | 6 +++---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 2 +-
2 files changed, 4 insertions(+), 4 delet
From: tiancyin
The gfxoff brings unstability, disable it by default
Change-Id: I43bdab0f93d64f7e207f96157665a2bb232f6956
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_
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