. The most frequent of which appears to be when
all pipes turn off during IGT tests.
Cc: Harry Wentland
Fixes: d158560fc0e1 ("drm/amd/display: Add pstate verification and recovery for
DCN31")
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Eric Yang
---
drivers/gpu/drm/amd/display/dc/
debug bus.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Eric Yang
---
.../drm/amd/display/dc/dcn10/dcn10_hubbub.c | 1 +
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 10 +++-
.../drm/amd/display/dc/dcn30/dcn30_hubbub.c | 1 +
.../drm/amd/display/dc/dcn301/dcn301_hubbub.c | 1
roper places in
link_enc assignment")
Cc: Qingqing Zhuo
Cc: Aurabindo Pillai
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_en
nsmitter - TRANSMITTER_UNIPHY_A;
[How]
That assignment occurs later depending on the ASIC version. It's only
needed on DCN31+ and only after link_enc is already assigned.
Fixes: 35b6fe499be7 ("drm/amd/display: fix a crash on USB4 over C20 PHY")
Cc: Rodrigo Siqueira
Cc: Harry Wentland
Signed-off-
cover all possible engine IDs.
Even if it does by try to access one of these registers by accident
the offset will be 0 and we'll get a warning during the access.
Fixes: 2fe9a0e1173f ("drm/amd/display: Fix DCN3 B0 DP Alt Mapping")
Cc: Mario Limonciello
Cc: Harry Wentland
Signed-of
when psr is not supported.
Leave a TODO indicating that this support should be extended in the
future to delay independent of the vblank interrupt.
Fixes: 3d1508b73ff1 ("drm/amdgpu/display: set vblank_disable_immediate for DC")
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Nich
: Jude Shih
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 +
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 1 +
3 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm
to
hpd handle function
Fixes: 5cecad78ea53 ("drm/amd/display: Support for SET_CONFIG processing with
DMUB")
Signed-off-by: Jude Shih
Reviewed-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +--
1 file changed, 16 insertions(+), 7 deletion
ltage level matches. In the case that no match gets
found, parser now falls back to searching for the max clock which meets the
requested voltage (i.e. its corresponding voltage is below requested).
Signed-off-by: Michael Strauss
Reviewed-by: Nicholas Kazlauskas
---
.../amd/display/dc/clk_mgr/
links.
- Added support for handling HPD RX interrupts
Signed-off-by: Meenakshikumar Somasundaram
Reviewed-by: Jun Lei
Acked-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 54 +++
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 28 ++
drivers
em up such that
they're only required for the psp invocation itself.
Fixes: bf62221e9d0e ("drm/amd/display: Add DCN3.1 HDCP support")
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Aric Cyr
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c | 6 ++
1 file changed
/amd/display: Fallback to clocks which meet requested voltage on
DCN31
Nicholas Kazlauskas (1):
drm/amd/display: Fix deadlock when falling back to v2 from v3
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +---
.../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 13 +++--
drivers/gpu
ASIC that can
support it.
Fixes: ab37c6527bb1 ("drm/amd/display: Optimize bandwidth on following fast
update")
Cc: Bhawanpreet Lakha
Cc: Mikita Lipski
Reported-by: Tom St Denis
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 15 +--
1 f
feature mask for older DCN.
Add a global debug flag that can be set to disable it for either.
Cc: Harry Wentland
Cc: Roman Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 17 -
drivers/gpu/drm/amd/include/amd_shared.h| 5
by default.
Cc: Aaron Liu
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 53363728dbb..b
nd
Reported-by: Mike Lothian
BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1700
Fixes: 91f86d4cce2 ("drm/amd/display: Use vblank control events for PSR
enable/disable")
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32 +++---
[Why & How]
Extend existing support for DCN2.1 DMUB diagnostic logging to
DCN3.1 so we can collect useful information if the DMUB hangs.
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 60 +++
.../gpu/drm/amd/display/dmub/src/dmub_dcn
t used for FS video.
We don't need to copy over the VIC or polarity in the case of FS video
modes because those don't change.
Fixes: a372f4abec ("drm/amd/display: Skip modeset for front porch change")
Cc: Aurabindo Pillai
Signed-off-by: Nicholas Kazlauskas
---
drivers
ock (which shouldn't be 0) when deciding to send the hardmin.
[How]
Check the clocks != 0 instead of the actual clocks.
Fixes: 9ed9203c3ee7 ("drm/amd/powerplay: rv dal-pplib interface refactor
powerplay part")
Cc: Hersen Wu
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/d
DRM contract to have userspace gracefully handle validation
failures when they occur.
Valdiation occurs as part of DC and this in particular affects RV, so
disable this in dcn10_global_validation.
Cc: Hersen Wu
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resour
us.
v2: rebase, naming, comments and spelling fixes
Cc: Rodrigo Siqueira
Cc: Bhawanpreet Lakha
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 700 +++---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 11 +-
[Why]
So we're not racing with userspace or deadlocking DM.
[How]
These flags are now stored on dm_plane_state itself and acquried and
validated during commit_check, so just use those instead.
Cc: Daniel Vetter
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazla
.
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Cc: Hersen Wu
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/driver
et.
So instead of querying new tiling_flags and tmz_surface use the ones
from the plane_state directly.
While we're at it, also update the force_disable_dcc option based
on the state from atomic check.
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/dr
te at all for global validation.
Optimization can come later so we don't reset DC planes at all for
MEDIUM udpates and avoid validation, but we might require some extra
checks in DM to achieve this.
Cc: Bhawanpreet Lakha
Cc: Hersen Wu
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/
ff-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 60 +++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +
2 files changed, 37 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/di
dded bonus.
Cc: Bhawanpreet Lakha
Cc: Harry Wentland
Cc: Leo Li
Cc: Daniel Vetter
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 720 +++---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 11 +-
2 files changed, 280 insertions(+), 451 deletions(-
.
CCing dri-devel per Daniel's suggestion since this issue brought
some interesting misuse of private objects.
[1] https://bugzilla.kernel.org/show_bug.cgi?id=207383
Nicholas Kazlauskas (7):
drm/amd/display: Store tiling_flags and tmz_surface on dm_plane_state
drm/amd/display: Reset plane
e object for pageflips as well, avoiding the
page fault issued caused by pageflipping under load with commits
executing out of order.
Cc: Harry Wentland
Cc: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 199 ++
1 fi
[Why]
When enabling the debugfs for CRC capture we hit assertions caused by
register address and field masks and shifts missing.
[How]
We want these registers programmed, so add in the SRI/SF entries for
this register.
Cc: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu
is leaves two future TODO items for our IRQ handling:
- Disabling IRQs in commit tail instead of atomic commit
- Mapping the pageflip interrupt to VUPDATE or something that's tied to
the frontend instead of the backend since the mapping to CRTC is not
correct
Cc: Bhawanpreet Lakha
Sign
/restore of remap enable flag when programming MPCC
remap matrix.
Cc: Bhawanpreet Lakha
Signed-off-by: Aric Cyr
Signed-off-by: Nicholas Kazlauskas
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu
r DCN revisions so align
dcn30 with those as well.
Cc: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
.../display/dc/irq/dcn30/irq_service_dcn30.c | 28 ---
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/irq/
ssing.
Cc: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/dmub/src/dmub_dcn30.c | 21 ++-
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn
s: e1995f0909e3 ("drm/amd/display: Revalidate bandwidth before commiting DC
updates")
Cc: Hersen Wu
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions
To match previous behavior and to not hang the kernel if someone
accidentally builds with KGDB enabled.
Fixes: 4324a1752045 ("drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print")
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/
state for DC global validation.
The workaround can stay until this has been fixed in DM.
Cc: Hersen Wu
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/
Cc: Leo Li
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/os_types.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/os_types.h
b/drivers/gpu/drm/amd/display/dc/os_typ
DCN.")
Cc: Leo Li
Cc: Mario Kleiner
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 137 +++---
1 file changed, 55 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/am
in the blending tree whose recout
fully contains the current pipe we can disable the pipe.
This only applies when the pipe is actually visible of course.
Signed-off-by: Nicholas Kazlauskas
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 30 +++
1 file changed, 30 inserti
The DMCUB is a secondary DMCU (Display MicroController Unit) that has
its own separate firmware. It's required for DMCU support on Renoir.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 11 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
From: Yongqiang Sun
[Why]
DMCU isn't intiliazed properly by dmcub loading due to dmcub initialize
sequence.
[How]
Change dmcu init sequece to meet dmcub initilize.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
---
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c | 79 +++
The DMCUB firmware version can be read using the AMDGPU_INFO ioctl
or the amdgpu_firmware_info debugfs entry.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 12
include/uapi/drm/amdgpu_drm.h | 3 +++
2 files changed, 15 insertions
service to DC for use.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/Makefile | 6 +-
.../drm/amd/display/dc/bios/command_table2.c | 91 ++
drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +
drivers/gpu/drm/amd/display/dc/dc.h | 12 +
drivers/g
[Why]
DC can utilize the DMUB server to send commands to the DMUB but it's
the DM responsibility to pass it the service to use.
[How]
Create the dc_dmub_srv after we finish initializing the dmub_srv.
Cleanup the dc_dmub_srv before destroying the dmub_srv or dc.
Signed-off-by: Nicholas Kazla
From: Yongqiang Sun
[Why]
PSP version format is AB.CD.EF.GH, where CD and GH is the main version.
current psp version check for dmcub loading dmcu check 0x00110029, in
case of some psp version eg: 0x00110227 which main version should be
0x00110027, will result in unexpeceted dmcub loading dmcu FW
[Why]
Support for DMUB only depends on support for DC. It doesn't use floating
point so we don't need to guard it by any specific DCN revision.
[How]
Drop the guards and cleanup the newlines around each one.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/displ
DMCUB ucode requires secure loading through PSP. This is already
supported in PSP as GFX_FW_TYPE_DMUB, it just needs to be mapped from
AMDGPU_UCODE_ID_DMCUB to GFX_FW_TYPE_DMUB.
DMUB is a shorthand name for DMCUB and can be used interchangeably.
Signed-off-by: Nicholas Kazlauskas
---
drivers
ed to CONFIG_DRM_AMD_DC_DCN2_1 with the config option dropped.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/Kconfig | 6 +
drivers/gpu/drm/amd/display/Makefile | 8 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 256 +
.../gpu/drm/amd/display
first place this code
wasn't used.
Signed-off-by: Nicholas Kazlauskas
---
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 31 ---
1 file changed, 31 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_
le to read registers - something DM helpers aren't setup
to do in software initialization.
So everything but the service creation itself will get deferred to
hardware initialization.
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 267 ++
amdgpu_dm and dc to interface with the
DMCUB.
The term DMCUB will generally refer to the actual microcontroller while
DMUB will generally refer to the software interface.
Cc: Harry Wentland
Nicholas Kazlauskas (9):
drm/amdgpu: Add ucode support for DMCUB
drm/amdgpu: Add PSP loading support for
[Why]
We're leaking memory by not freeing the gamma used to calculate the
transfer function for legacy gamma.
[How]
Release the gamma after we're done with it.
Cc: Philip Yang
Cc: Harry Wentland
Cc: Bhawanpreet Lakha
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/g
ce do the ordering.
Cc: Leo Li
Cc: Harry Wentland
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/di
Cc: David Francis
Cc: Bhawanpreet Lakha
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/
be
signaled since that's the last point where we touch CRTC state.
Cc: David Francis
Cc: Bhawanpreet Lakha
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 63 +++
1 file changed, 51 insertions(+), 12 deletions(-)
diff
@kms_plane@pixel-format-pipe-A-planes.
[How]
Check the return code and return it on failure.
We wouldn't have been able to enable CRC reading anyway since vblank
wasn't enabled.
Cc: David Francis
Cc: Bhawanpreet Lakha
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/g
27;re not doing cloning.
Cc: David Francis
Cc: Bhawanpreet Lakha
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdg
plied.
CRC vblank reference handling in amdgpu_dm can be entirely dropped after
this.
Stream state also no longer needs to be required since we can just defer
the programming to when the stream is actually enabled.
Cc: David Francis
Cc: Bhawanpreet Lakha
Cc: Leo Li
Signed-off-by: Nicholas Kazla
just
need to ensure that the surface registers do a double buffered update.
Cc: David Francis
Cc: Bhawanpreet Lakha
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 16 +++-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h| 1
hawanpreet Lakha
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +++
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 04
Commit #2 to finish. Then it'll
swap the state, finish the work in commit tail and drop the last
reference on Commit #2's dc_state.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204181
Cc: Leo Li
Cc: David Francis
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/disp
igned-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 27 ++-
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2efb0ea
issues with xf86-video-amdgpu since it double buffers the cursor.
IGT tests that swap framebuffers (-varying-size for example) should
also pass again.
Cc: Leo Li
Cc: David Francis
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 --
1 file
x27;s cleanest to keep the bounding box and
source code in sync by embedding the bounding box like we do for
other ASICs.
Fixes: 02316e963a5a ("drm/amd/display: Force uclk to max for every state")
Cc: Alex Deucher
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../drm/amd/d
p-state support when needed in pplib/smu.
When these requirements are met uclk switching works without underflow
or hangs.
Fixes: 02316e963a5a ("drm/amd/display: Force uclk to max for every state")
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/g
ed.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +++
drivers/gpu/drm/amd/display/dc/dc_stream.h| 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/driv
uence.
Particular care is needed for the get ELD callback since it can happen
outside the locking and fencing DRM does for atomic commits.
Cc: Takashi Iwai
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 222 ++
.../gp
quot;drm/amd/display: Add DCN2 HW Sequencer and Resource")
Cc: Harry Wentland
Cc: Roman Li
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110
Resource")
Cc: Harry Wentland
Cc: Roman Li
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
b/drivers/gpu/drm/a
until these issues have been resolved.
Cc: David Francis
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd
issues with xf86-video-amdgpu since it double buffers the cursor.
IGT tests that swap framebuffers (-varying-size for example) should
also pass again.
Cc: David Francis
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 --
1
ne since
fill_dc_plane_info_and_addr isn't called when validating the state, so
we can't tell if a FULL update is needed or not.
Cc: David Francis
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8
1 file changed, 8 deletions(-)
di
and
Cc: David Francis
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index a698c8f272ed..f0c216d
o
use for eDP connectors on DC enabled hardware that loads the DMCU
firmware.
The default is still disabled (0), but levels can range from 1-4. Levels
control how much the backlight can be reduced, with being the least
amount of reduction and four being the most reduction.
Signed-off-by: Nic
an explicit state.
This will respect the max_bpc the user currently has when filtering
modes.
Also remember to reset the default max_requested_bpc to 8 whenever
connector reset is called to retain old behavior when using the new
property.
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlau
crash.
[How]
Use our reset helper to allocate an initial state and reset the values
to their defaults. We were already doing this before, just not for
MST connectors.
Cc: Leo Li
Cc: Roman Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu
: Drop unneeded connector status check
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 71 ++-
1 file changed, 69 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
-Id: Ic881c0c729c5444b80256ccfe55ac52cec345388
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 74 ++-
1 file changed, 72 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
: 97df424fe7a7 ("drm/amd/display: Drop DCN1_01 guards")
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c
b/drivers/gpu/drm/amd/display/dc/gpio/hw_t
old stream without a full modeset.
Cc: Roman Li
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_
r entering and exiting HDR
but the metadata can be changed without one.
Cc: Harry Wentland
Nicholas Kazlauskas (2):
drm/amd/display: Expose HDR output metadata for supported connectors
drm/amd/display: Only force modesets when toggling HDR
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_
27;t completely unnecessary.
The requirement can later be reduced to just entering and exiting HDR
or switching max bpc.
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 125 ++
1 file changed, 125 insertions(+)
diff --git a/driv
the stream update. This will only happen in non-modeset
cases.
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 34 +++
1 file changed, 28 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
erty management. Set the max bpc to 8 by default since
DRM defaults to the max in the range which would be 16 in this case.
No behavioral changes are intended with this patch, it should just be
a refactor.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
Acked-by: Alex Deucher
-
bpc for a connector.
v2: Drop extra TODO.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
Acked-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 27 ++-
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd
bpc for a connector.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 26 +++
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm
erty management. Set the max bpc to 8 by default since
DRM defaults to the max in the range which would be 16 in this case.
No behavioral changes are intended with this patch, it should just be
a refactor.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu
; a long in commit planes so we're not doing any unsigned/signed
conversion here in the first place.
v2: use long instead of int (Christian)
Cc: Christian König
Reported-by: Dan Carpenter
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
1
; an int in commit planes so we're not doing any unsigned/signed
conversion here in the first place.
Reported-by: Dan Carpenter
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --
RGB565 support isn't restricted to just the primary plane in DC, so
also expose support for it on overlays.
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/driver
DC and DM already support DRM_FORMAT_RGB565, it's just missing from the
list of valid formats.
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/di
The extra ; in the macro definition creates an empty statement
preventing any variable declarations from occuring after
any use of to_dm_plane_state(...).
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
isual confirm enum value using
the debugfs attribute helpers.
The debugfs_create_file_unsafe can be used instead of
debugfs_create_file as per the documentation.
v2: Use debugfs helpers for getting and setting the value (Christian)
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazla
memset to make this more portable.
v2: Specify the compiler / diagnostic in the commit message (Paul)
Cc: Sun peng Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a
The brace initialization used here generates errors on some
compilers. Use memset to make this more portable.
Cc: Sun peng Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion
ng in the
low range but it didn't cover the upper range. Expand the condition
to include both.
Cc: Sun peng Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/d
isual confirm enum value.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 77 ++-
1 file changed, 75 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
b/driver
ed to
be explicitly cleaned up are the ones that have failed to register.
By dropping the explicit free on every plane in the mode_info->planes
list this patch also fixes a double-free in the case where we fail to
initialize only some of the planes.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-b
->height / 2
since the chroma plane is half size of the luma plane for NV12.
Leave a TODO indicating that those should be set based on the actual
surface format instead since this is only correct for YUV420 formats.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
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