Looks pretty good to me. One question that why this is not added to JPEG
5_0_0? Since the patch 3-9 cover the rest of versions, they are:
Reviewed-by: Leo Liu
On 1/29/25 03:46, Sathishkumar S wrote:
Add register list and enable devcoredump for JPEG2_5_0
V2: (Lijo)
- remove version specific
This patch is:
Reviewed-by: Leo Liu
On 1/29/25 03:46, Sathishkumar S wrote:
Add an inline function to calculate core specific register offsets for
JPEG v4.0.3 and reuse it, makes code more readable and easier to align.
Signed-off-by: Sathishkumar S
---
drivers/gpu/drm/amd/amdgpu
The set looks good to me. The series is:
Reviewed-by: Leo Liu
On 2023-10-16 12:54, Bokun Zhang wrote:
- In VCN 4 SRIOV code path, add code to enable RB decouple feature
Signed-off-by: Bokun Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 71 +--
1 file changed
The series is:
Acked-by: Leo Liu .
On 2023-08-08 12:26, Samir Dhume wrote:
The structures are the same as v4_0 except for the
init header
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/mmsch_v4_0_3.h | 37 +++
1 file changed, 37 insertions
On 2023-07-28 15:15, Samir Dhume wrote:
initialization table handshake with mmsch
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 257 +---
1 file changed, 233 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
Reviewed-by: Leo Liu
On 2023-07-17 23:20, sguttula wrote:
This patch will enable VCN FW workaround using
DRM KEY INJECT WORKAROUND method,
which is helping in fixing the secure playback.
Signed-off-by: sguttula
---
Changes in v2:
-updated commit message as per veera's feedback
Chang
Reviewed-by: Leo Liu
On 2023-07-17 13:27, sguttula wrote:
This patch will enable secure decode playback on VCN4_0_2
Signed-off-by: sguttula
---
Changes in v2:
-updated commit message only enabling for VCN402
-updated the logic as per Leo's feedback
---
drivers/gpu/drm/amd/amdgpu/vcn
Since the changes will affect multiple ASICs, if you only tested with
VCN4_0_4, please just apply the set to that HW.
Regards,
Leo
On 2023-07-16 23:15, Guttula, Suresh wrote:
Hi Leo,
There are two issues here.
This change fixing the Crash while secure playback and we see below error:
2023
On 2023-07-14 05:44, sguttula wrote:
This patch will enable secure decode playback on VCN4
Signed-off-by: sguttula
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
in
, Veerabadhran (Veera)
; Sundararaju, Sathishkumar
Cc: Koenig, Christian ; Rao, Srinath
Subject: [PATCH v3 2/2] drm/amdgpu: update kernel vcn ring test
add session context buffer to decoder ring test fro vcn v1 to v3.
v3 - correct the cmd for sesssion ctx buf
v2 - add the buffer into IB (Leo liu)
Signed
It looks good to me. The series is:
Reviewed-by: Leo Liu
On 2023-06-27 00:48, Lang Yu wrote:
Replace the old ones with psp_execute_load_ip_fw_cmd_buf.
Signed-off-by: Lang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 31 -
drivers/gpu/drm/amd/amdgpu
What Christian says is correct, esp. during the playback or encode, when
suspend/resume happens, it will save the FW context, and after resume,
it will continue the job to where it left during the suspend. Will this
apply to SRIOV case? Since the changes only within the SRIOV code,
please make
Reviewed-by: Leo Liu
On 2023-06-20 21:29, Emily Deng wrote:
Need to unpause dpg first, or it will hit follow error during stop dpg:
"[drm] Register(1) [regUVD_POWER_STATUS] failed to reach value 0x0001 !=
0xn"
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/
.. 129.421993: amdgpu_cs:
bo_list=92ffdb4c3400, ring=0, dw=48, fences=0
Fixes: 4624459c84d7 ("drm/amdgpu: add gang submit frontend v6")
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/d
Please try the latest AMDGPU driver:
https://gitlab.freedesktop.org/agd5f/linux/-/commits/amd-staging-drm-next/
On 2022-12-07 15:54, Alex Deucher wrote:
+ Leo, Thong
On Wed, Dec 7, 2022 at 3:43 PM Mikhail Gavrilov
wrote:
On Wed, Dec 7, 2022 at 7:58 PM Alex Deucher wrote:
What GPU do you h
So that uses PSP to initialize HW.
Fixes: 0c2c02b6 (drm/amdgpu/vcn: add firmware support for dimgrey_cavefish)
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm
Reviewed-by: Leo Liu
On 2022-09-22 15:30, Ruijing Dong wrote:
update VF_RB_SETUP_FLAG, add SMU_DPM_INTERFACE_FLAG,
and corresponding change in VCN4.
Signed-off-by: Ruijing Dong
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 8 +++-
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4
2
On 2022-07-18 02:57, Christian König wrote:
Am 15.07.22 um 22:04 schrieb Ruijing Dong:
From VCN4, AMDGPU_HW_IP_VCN_UNIFIED is used to support
both encoding and decoding jobs, it re-uses the same
queue number of AMDGPU_HW_IP_VCN_ENC.
link:
https://gitlab.freedesktop.org/mesa/drm/-/merge_requ
The series are:
Acked-by: Leo Liu
On 2022-06-07 14:36, Ruijing Dong wrote:
- remove multiple queue support.
- add unified queue related functions.
Signed-off-by: Ruijing Dong
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 563 +++---
1 file changed, 140 insertions
Reviewed-by: Leo Liu
On 2022-03-30 20:59, boyuan.zh...@amd.com wrote:
From: Boyuan Zhang
For VCN FW to detect ASIC type, in order to use different mailbox registers.
V2: simplify codes and fix format issue.
V3: re-order if/else condition from the smallest version.
Signed-off-by: Boyuan
stian.
Am 10.03.22 um 09:45 schrieb Lang Yu:
Ping.
On 03/08/ , Leo Liu wrote:
On 2022-03-08 11:18, Leo Liu wrote:
On 2022-03-08 04:16, Christian König wrote:
Am 08.03.22 um 09:06 schrieb Lang Yu:
On 03/08/ , Christian König wrote:
Am 08.03.22 um 08:33 schrieb Lang Yu:
On 03/08/ , Christian
On 2022-03-08 11:18, Leo Liu wrote:
On 2022-03-08 04:16, Christian König wrote:
Am 08.03.22 um 09:06 schrieb Lang Yu:
On 03/08/ , Christian König wrote:
Am 08.03.22 um 08:33 schrieb Lang Yu:
On 03/08/ , Christian König wrote:
Am 08.03.22 um 04:39 schrieb Lang Yu:
It is a hardware issue
On 2022-03-08 04:16, Christian König wrote:
Am 08.03.22 um 09:06 schrieb Lang Yu:
On 03/08/ , Christian König wrote:
Am 08.03.22 um 08:33 schrieb Lang Yu:
On 03/08/ , Christian König wrote:
Am 08.03.22 um 04:39 schrieb Lang Yu:
It is a hardware issue that VCN can't handle a GTT
backing sto
sonable to me. The suspend sends the destroy message if
there is still incomplete job, so it should be before the fini which
stops the hardware.
The series are:
Reviewed-by: Leo Liu
Signed-off-by: Qiang Ma
---
drivers/gpu/drm/radeon/cik.c | 2 +-
drivers/gpu/drm/radeon/evergreen.
The series are:
Reviewed-by: Leo Liu
On 2021-10-19 4:10 p.m., Alex Deucher wrote:
No need to use the id variable, just use the constant
plus instance offset directly.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 11 ++-
1 file changed, 2 insertions
The series are:
Reviewed-by: Leo Liu
On 2021-09-29 3:57 p.m., James Zhu wrote:
Move jpeg2 shared macro to header file
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 20
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h | 20
2 files
It looks good to me for the non-sriov part.
Regards,
Leo
On 2021-07-15 10:14 p.m., Zhou, Peng Ju wrote:
[AMD Official Use Only]
Hi @Liu, Leo
Can you help to review this patch?
Monk and Alex have reviewed it.
--
BW
Pengju
On 2021-05-26 6:49 a.m., Christian König wrote:
Am 26.05.21 um 12:13 schrieb Li, Xin (Justin):
since vcn decoding ring is not required, so just disable it.
Cc: Alex.Deucher
Cc: Christian.Konig
Signed-off-by: Li.Xin.Justin
Signed-off-by: Frank.Min
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms
The series are:
Reviewed-by: Leo Liu
On 2021-05-19 12:22 p.m., James Zhu wrote:
Add cancel_delayed_work_sync before set power gating state
to avoid race condition issue when power gating.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +-
1 file changed, 5
Reviewed-by: Leo Liu
On 2021-05-18 8:47 a.m., James Zhu wrote:
Add video_codecs query support for aldebaran.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu
Reviewed-by: Leo Liu
On 2021-05-17 4:42 p.m., James Zhu wrote:
Add cancel_delayed_work_sync before set power gating state
to avoid race condition issue when power gating.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 19 +--
1 file changed, 13
To be accurate, the Bo is mapped to engine cache window, and the runtime
of engine stacks, so we should save it before the poweroff.
On 2021-05-17 2:15 p.m., Leo Liu wrote:
The saved data are from the engine cache, it's the runtime of engine
before suspend, it might be different afte
;vcn.idle_work);
3. SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,
UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);
4. amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCN, AMD_PG_STATE_GATE);
5. saved_bo
Best Regards!
James
On 2021-05-17 1:43 p.m., Leo Liu wrote:
On 2021-05-17 12:54 p.m., James Zhu wrote:
ATUS, 1,
UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);
4. amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCN, AMD_PG_STATE_GATE);
5. saved_bo
Best Regards!
James
On 2021-05-17 1:43 p.m., Leo Liu wrote:
On 2021-05-17 12:54 p.m., James Zhu wrote:
I am wondering if there are still
force powering gate the vcn hw
after certain time waiting.
Yep, we still need to gate VCN power after certain timeout.
Regards,
Leo
Best Regards!
James
On 2021-05-17 12:34 p.m., Leo Liu wrote:
On 2021-05-17 11:52 a.m., James Zhu wrote:
During vcn suspends, stop ring continue to receiv
On 2021-05-17 11:52 a.m., James Zhu wrote:
During vcn suspends, stop ring continue to receive new requests,
and try to wait for all vcn jobs to finish gracefully.
v2: Forced powering gate vcn hardware after few wainting retry.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_v
Reviewed-by: Leo Liu
On 2021-05-04 11:10 a.m., Sathishkumar S wrote:
update suspend register settings in Non-DPG mode.
Signed-off-by: Sathishkumar S
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm
On 2021-05-05 2:17 p.m., Alex Deucher wrote:
Applied. Thanks! Do we need a similar fix for other VCN variants?
VCN3 is the only one missing that.
Regards,
Leo
Alex
On Tue, May 4, 2021 at 10:14 PM Leo Liu wrote:
Reviewed-and-Tested by: Leo Liu
On 2021-05-04 9:27 p.m., Bas
Reviewed-and-Tested by: Leo Liu
On 2021-05-04 9:27 p.m., Bas Nieuwenhuizen wrote:
Otherwise tiling modes that require the values form this field
(In particular _*_X) would be corrupted upon video decode.
Copied from the VCN v2 code.
Fixes: 99541f392b4d ("drm/amdgpu: add mc resume DPG
Acked-by: Leo Liu
On 2021-04-16 8:54 a.m., Christian König wrote:
Ping?
Am 15.04.21 um 10:47 schrieb Christian König:
Releasing pinned BOs is illegal now.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
On 2021-04-13 5:24 p.m., Mikhail Gavrilov wrote:
On Tue, 13 Apr 2021 at 04:55, Leo Liu wrote:
It curious why ffmpeg does not cause such issues.
For example such command not cause kernel panic:
$ ffmpeg -f x11grab -framerate 60 -video_size 3840x2160 -i :0.0 -vf
'format=nv12,hwu
It curious why ffmpeg does not cause such issues.
For example such command not cause kernel panic:
$ ffmpeg -f x11grab -framerate 60 -video_size 3840x2160 -i :0.0 -vf
'format=nv12,hwupload' -vaapi_device /dev/dri/renderD128 -vcodec
h264_vaapi output3.mp4
What command are you using to see the iss
meson: Also search for rst2man.py
James Zhu (1):
tests/amdgpu: add vcn test support for dimgrey_cavefish
Jinzhou Su (1):
test/amdgpu: remove static varible in Syncobj test
Lang Yu (2):
drm/tests/amdgpu: fix Metadata test failed issue
tests/amdgpu: fix bo eviction test
The series are:
Reviewed-and-Tested-by: Leo Liu
On 2021-02-04 9:44 a.m., Christian König wrote:
The VCN3 instances can do both decode as well as encode.
Share the scheduler load balancing score and remove fixing encode to
only the second instance.
Signed-off-by: Christian König
On 2021-01-05 5:54 p.m., Bokun Zhang wrote:
In the past, we use MMSCH to determine whether a VCN is enabled or not.
This is not reliable since after a FLR, MMSCH may report junk data.
It is better to use IP discovery data.
Change-Id: I8b6c32c34017b20dcaebffdaa78bb07178e9d03c
Signed-off-by: Bo
Reviewed-by: Leo Liu
On 2020-11-13 5:33 p.m., Jiang, Sonny wrote:
[AMD Official Use Only - Internal Distribution Only]
[AMD Official Use Only - Internal Distribution Only]
Ping.
*From:* Jiang, Sonny
*Sent:* Monday
Reviewed-by: Leo Liu
On 2020-10-30 1:10 p.m., veerabadhran.gopalakrish...@amd.com wrote:
From: Veerabadhran Gopalakrishnan
Concurrent operation of VCN and JPEG decoder in DPG mode is
causing ring timeout due to power state.
Signed-off-by: Veerabadhran Gopalakrishnan
---
drivers/gpu/drm
On 2020-08-31 5:53 p.m., Alex Deucher wrote:
On Mon, Aug 31, 2020 at 5:50 PM Leo Liu wrote:
On 2020-08-31 1:39 p.m., Alex Deucher wrote:
On Mon, Aug 31, 2020 at 10:55 AM Nirmoy wrote:
Hi Alex,
On 8/31/20 4:17 PM, Alex Deucher wrote:
On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das wrote
load balancer for
a context which binds jobs from same the context to a udv
instance.
typos: udv -> uvd
With that fixed:
Reviewed-by: Alex Deucher
Does VCE need a similar fix? What about UVD_ENC?
I am not sure, can you please confirm this.
@Leo Liu can you confirm?
Vega20 have 2 UVDs a
Fix warning from kernel test robot
v2: remove the local variable as well
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
b/drivers/gpu
Fix warning from kernel test robot
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
index c41e5590a701..f4ba423af051 100644
--- a/drivers/gpu
On 2020-07-13 10:47 p.m., Jack Zhang wrote:
1.Skip decode_ring test in VF, because VCN in SRIOV does not
support direct register read/write.
2.Skip powergating configuration in hw fini because
VCN3.0 SRIOV doesn't support powergating.
Signed-off-by: Jack Zhang
---
drivers/gpu/drm/amd/amdgp
This patch is:
Reviewed-by: Leo Liu
On 2020-07-13 10:47 p.m., Jack Zhang wrote:
1.In early_init and for sriov, hardcode
harvest_config=0, enc_num=1
2.sw_init/fini
alloc & free mm_table for sriov
doorbell setting for sriov
3.hw_init/fini
Under sriov, add start_sriov to co
Reviewed-by: Leo Liu
On 2020-06-10 12:36 p.m., James Zhu wrote:
Fix race condition issue when multiple jpeg starts are called.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 16
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h | 2 ++
2 files changed
Reviewed-by: Leo Liu
On 2020-04-27 4:05 p.m., James Zhu wrote:
Wait for tiles off after unpause to fix transcode timeout issue.
It is a work around.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a
N_MULTI_QUEUE_FLAG(1 << 8)
+
+enum fw_queue_mode {
+ fw_queue_ring_reset = 1,
+ fw_queue_dpg_hold_off = 2,
+};
Please move the define and enum to the top as others. With that fixed,
the series are
Reviewed-by: Leo Liu
+
+struct amdgpu_fw_shared_multi_queue {
+
r? With that fixed, this patch is
Reviewed-by: Leo Liu
Leo
/* Restore */
ring = &adev->vcn.inst[inst_idx].ring_enc[0];
+ ring->wptr = 0;
WREG32_SOC15(UVD, inst
Is this warning introduced by your patch 4?
On 2020-03-05 8:33 a.m., Monk Liu wrote:
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
ind
This patch is:
Acked-by: Leo Liu
On 2020-03-05 8:33 a.m., Monk Liu wrote:
and disable MC resum in VCN2.0 as well
those are not concerned by VF driver
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 23 +++
1 file changed, 23 insertions(+)
diff
This patch is:
Reviewed-by: Leo Liu
On 2020-03-05 8:33 a.m., Monk Liu wrote:
support IB test on dec/enc ring
disable ring test on dec/enc ring (MMSCH limitation)
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 11 +++
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
On 2020-03-05 8:33 a.m., Monk Liu wrote:
one dec ring and one enc ring
It seems more than that, you might add more messages.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 231 +-
1 file changed, 228 insertions(+), 3 deletions(-)
di
On 2020-03-05 8:39 a.m., Liu, Monk wrote:
This is not supported by MMSCH FW...
With this added to commit message, this patch is:
Reviewed-by: Leo Liu
_
Monk Liu|GPU Virtualization Team |AMD
-Original Message-
From: Christian König
Sent
This patch is:
Acked-by: Leo Liu
On 2020-03-05 8:33 a.m., Monk Liu wrote:
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/mmsch_v2_0.h | 338
1 file changed, 338 insertions(+)
create mode 100644 drivers/gpu/drm/amd/amdgpu/mmsch_v2_0.h
diff --git
Acked-by: Leo Liu
On 2020-02-07 8:17 a.m., James Zhu wrote:
Fix warning during switching to dpg pause mode for
VCN firmware Version ENC: 1.1 DEC: 1 VEP: 0 Revision: 16
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
this variable be aligned with other variables in the structure? With
that fixed, the patch is
Reviewed-by: Leo Liu
void*dpg_sram_cpu_addr;
uint64_tdpg_sram_gpu_addr;
uint32_t*dpg_sram_curr_addr;
@@ -190,8 +191,6
->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] +
reg);\
+ addr = (adev->reg_offset[ip##_HWIP][0][reg##_BASE_IDX] + reg);
\
Why do you still have hard coded here? please have it reverted. With
that fixed the patch is:
Reviewed-by: L
Patch v2 4 and 5 are:
Reviewed-by: Leo Liu
On 2020-01-21 4:39 p.m., James Zhu wrote:
Fix typo error, should be inst_idx instead of inst.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu
, you should have that in a separated patch.
Leo
So I want to clean up the header first to use inst_idx for
abbreviation of instance index.
James
On 2020-01-21 3:30 p.m., Leo Liu wrote:
On 2020-01-21 12:50 p.m., James Zhu wrote:
On 2020-01-21 12:43 p.m., Leo Liu wrote:
On 2020-01-21 11
"adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg",
so the format should be kept here as well
Leo
James
On 2020-01-21 3:23 p.m., Leo Liu wrote:
On 2020-01-21 12:48 p.m., James Zhu wrote:
On 2020-01-21 12:40 p.m., Leo Liu wrote:
On 2020-01-21 11:19 a.m., James Zh
On 2020-01-21 12:50 p.m., James Zhu wrote:
On 2020-01-21 12:43 p.m., Leo Liu wrote:
On 2020-01-21 11:19 a.m., James Zhu wrote:
Use inst_idx relacing inst in SOC15_DPG_MODE macro
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 22 +++---
1 file
On 2020-01-21 12:48 p.m., James Zhu wrote:
On 2020-01-21 12:40 p.m., Leo Liu wrote:
On 2020-01-21 11:19 a.m., James Zhu wrote:
Fix vcn2.5 instance issue, vcn0 and vcn1 have same register offset
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 4 +-
drivers/gpu
On 2020-01-21 12:47 p.m., James Zhu wrote:
On 2020-01-21 12:29 p.m., Leo Liu wrote:
On 2020-01-21 11:19 a.m., James Zhu wrote:
Fix a bug for the 2nd vcn instance at start and stop.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 12
1 file changed, 8
On 2020-01-21 11:19 a.m., James Zhu wrote:
Use inst_idx relacing inst in SOC15_DPG_MODE macro
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_
On 2020-01-21 11:19 a.m., James Zhu wrote:
Fix vcn2.5 instance issue, vcn0 and vcn1 have same register offset
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 4 +-
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 86
drivers/gpu/drm/amd/am
On 2020-01-21 11:19 a.m., James Zhu wrote:
Fix a bug for the 2nd vcn instance at start and stop.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
b/driv
This patch is
Reviewed-by: Leo Liu
On 2020-01-21 11:19 a.m., James Zhu wrote:
Share vcn_v2_0_dec_ring_test_ring to vcn2.5 to support
vcn software ring.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.h | 1 +
drivers/gpu/drm
Fixes: 2f60d5f2bc4 "drm/amdgpu/vcn: move macro from vcn2.0 to share amdgpu_vcn"
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
b/drivers/gpu/drm/
Fixes: 8ae1e132 "drm/amdgpu/vcn: support multiple instance direct SRAM read and
write"
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/g
those fixed in patch2&3, the series are:
Reviewed-by: Leo Liu
Regards,
Leo
James Zhu (5):
drm/amdgpu/vcn: support multiple-instance dpg pause mode
drm/amdgpu/vcn2.5: support multiple instance direct SRAM read and
write
drm/amdgpu/vcn2.5: add DPG mode start and stop
On 2020-01-14 5:23 p.m., James Zhu wrote:
Add DPG mode start and stop functions for vcn2.5
v2: Correct firmware ucode index in vcn_v2_5_mc_resume_dpg_mode
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 295 +-
1 file changed, 293 insert
On 2020-01-14 5:23 p.m., James Zhu wrote:
Add multiple instance direct SRAM read and write support for vcn2.5
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 27 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 46
drivers/gpu/drm/amd/amdgpu/vcn
On 2020-01-14 12:58 p.m., James Zhu wrote:
Add dpg pause mode support for vcn2.5
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 70 +++
1 file changed, 70 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
b/drivers/gpu/
I think you can avoid the duplication, instead adding instance to
"RREG32(WREG)_SOC15_DPG_MODE_2_0(offset, mask_en) ", just like adding
instance to other part of the code.
Regards,
Leo
On 2020-01-14 12:58 p.m., James Zhu wrote:
Add direct SRAM read and write MACRO for vcn2.5
Signed-off-by:
Reviewed-by: Leo Liu
On 2020-01-14 12:58 p.m., James Zhu wrote:
Add multiple-instance dpg pause mode support for VCN2.5
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
With default PSP FW loading
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 714cf4dfd0a7..e4a7245939c8 100644
--- a/drivers/gpu/drm
ucodes for instances are from different location
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index 4ea8e20ed15d
Esp. VCN1.0 headers should not be here
v2: add back the to keep consistent.
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index
at the MODULE_FIRMWARE for VCN.
So in order to keep it consistent, and I will send v2 to keep
Regards,
Leo
On 2019-12-16 11:50 a.m., Leo Liu wrote:
On 2019-12-16 11:36 a.m., Alex Deucher wrote:
On Mon, Dec 16, 2019 at 11:06 AM Leo Liu wrote:
Esp. VCN1.0 headers should not be here
On 2019-12-16 11:36 a.m., Alex Deucher wrote:
On Mon, Dec 16, 2019 at 11:06 AM Leo Liu wrote:
Esp. VCN1.0 headers should not be here
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Esp. VCN1.0 headers should not be here
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index e522025430c7..371f55de42dc 100644
--- a
Because VCN1.0 power management and DPG mode are managed together with
JPEG1.0 under both HW and FW, so separated them from general VCN code.
Also the multiple instances case got removed, since VCN1.0 HW just have
a single instance.
v2: override work func with vcn1.0's own
Signed-off-by: Le
On 2019-12-12 3:18 a.m., Christian König wrote:
Am 11.12.19 um 20:48 schrieb Leo Liu:
Since it's only needed with VCN1.0 when HW has no its
own JPEG HW IP block
Wouldn't it be simpler/cleaner to just define a
vcn_v1_0_ring_begin_use() and vcn_v1_0_idle_work_handler() instead?
For VCN2.0 and above, VCN has been separated from JPEG
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 28 +
1 file changed, 5 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu
Because VCN1.0 power management and DPG mode are managed together with
JPEG1.0 under both HW and FW, so separated them from general VCN code.
Also the multiple instances case got removed, since VCN1.0 HW just have
a single instance.
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu
Since it's only needed with VCN1.0 when HW has no its
own JPEG HW IP block
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 29 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 2 ++
2 files changed, 20 insertions(+), 11 deletions(-)
diff --git a/dr
Fixes: 0388aee76("drm/amdgpu: use the JPEG structure for
general driver support")
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/
The JPEG irq type has been moved to its own structure
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm
On 2019-11-15 5:15 p.m., Leo Liu wrote:
Fixes: 9072c584 (drm/amdgpu: move JPEG2.5 out from VCN2.5)
Just checked the bug was existing before the changes above.
Regards,
Leo
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 6 +++---
1 file changed, 3 insertions
Fixes: 9072c584 (drm/amdgpu: move JPEG2.5 out from VCN2.5)
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index 451dc814d845
On 2019-11-14 11:03 a.m., Alex Deucher wrote:
On Tue, Nov 12, 2019 at 1:04 PM Leo Liu wrote:
By using its own enabling function
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 8
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h | 1 +
drivers/gpu/drm/amd/amdgpu
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