Enable mes pipe wptr polling for gfxoff might result
in mes pipe wptr missing.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index
Correct kiq unmap queue timeout value.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 9d0e342a2f81..1ce935e684c7 100644
enable_level_process_quantum_check is requried to enable process
quantum based scheduling.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
The SET_SHADER_DEBUGGER packet must work with the added
hardware queue, switch the packet submitting to mes schq pipe.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
For mes11 old firmware has issue to map legacy queue,
add a flag to switch mes to map legacy queue.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 1 +
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 49
Set sched_hw_submission=8 for mes maximum packet execution.
v2. Only set sched_hw_submission.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
b/drivers/gpu/drm/amd/amdgpu
Use mes pipe to unmap kcq and kgq.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 22
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 27 +
2 files changed, 23 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Configure tow pipes with different hardware resources.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 77 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 12 ++--
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 7 +--
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
Add mes pipe switch to let caller choose pipe
to submit packet.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 59 ++
1 file changed, 33 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd
Free memory for two pipes and unmap pipe0 via pipe1.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 31 +-
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu
Adjust mes12 sw/hw initiailization for both pipe0 and pipe1
enablement. The two pipes are almost identical pipe. Pipe0
behaves like schq and pipe1 like kiq, pipe0 was mapped by pipe1.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 106 +++--
1 file
Enable unified mes firmware to load on pipe0 and pipe1.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 2 +-
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 27 +++--
2 files changed, 4 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd
Enable both pipe0 and pipe1 running unified mes firmware.
They are almost identical pipe, but pipe1 behaves more like legacy kiq.
As per fw design, pipe0 is required to be mapped by pipe1 to make
some fw feature work.
Jack Xiao (8):
drm/amdgpu/mes12: update mes_v12_api_def.h
drm/amdgpu/mes
Add multiple mes ring instances in mes structure to support
multiple mes pipes.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 5 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 4 ++-
drivers/gpu/drm/amd/amdgpu
Update mes12 api definition.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/include/mes_v12_api_def.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/mes_v12_api_def.h
b/drivers/gpu/drm/amd/include/mes_v12_api_def.h
index ffd67c6ed9b3
Only allow API_NUMBER_OF_COMMAND_MAX packet in mes ring buffer,
refine the code for maximum packet execution.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 2 ++
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 2 +-
3 files
wait memory room until enough before writing mes packets
to avoid ring buffer overflow.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 18 ++
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 18 ++
2 files changed, 28 insertions(+), 8 deletions
Port mes11 hw_fini to mes12, fix for mode1 reset.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 45b70a4c4ada
Adjust mes12 initialization sequence to fix mapping
legacy queue.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 71 -
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 10 ++--
2 files changed, 53 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu
kiq ring test has overwitten ready flag,
need disable after gfx hw init.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
mes schq engine require more waiting time for engine ready
before packet submission.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu
Enable mes to map legacy queue support.
Signed-off-by: Jack Xiao
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 39 +
1 file changed, 34 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
b/drivers/gpu/drm/amd
Adjust mes queue initialization before kgq/kcq initialization
to enable mes mapping legacy queue.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu
Update ADD_QUEUE interface for mes11 to support
mes mapping legacy queue.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/include/mes_v11_api_def.h | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
b/drivers
Add mes11 map legacy queue packet submission.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 0d1407f25005
Jack Xiao (5):
drm/amdgpu/mes: add mes mapping legacy queue support
drm/amdgpu/mes11: update ADD_QUEUE interface
drm/amdgpu/mes11: add mes mapping legacy queue support
drm/amdgpu/mes11: adjust mes initialization sequence
drm/amdgpu/gfx: enable mes to map legacy queue support
drivers
Add mes mapping legacy queue framework support.
Signed-off-by: Jack Xiao
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 22 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 14 ++
2 files changed, 36 insertions(+)
diff --git a/drivers/gpu
Delete fence fallback timer to fix the ramdom
use-after-free issue.
v2: move to amdgpu_mes.c
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
b/drivers/gpu/drm/amd/amdgpu
Delete fence fallback timer to fix the ramdom
use-after-free issue.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 06f0a6534a94
It's required to take the gfx mutex before access to CP_VMID_RESET,
for there is a race condition with CP firmware to write the register.
v2: add extra code to ensure the mutex releasing is successful.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
It's required to take the gfx mutex before access to CP_VMID_RESET,
for there is a race condition with CP firmware to write the register.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gp
1. Need flush HDP for MQD putting in vram
2. Zero out mes MQD
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 3 +++
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 3 +++
3 files changed, 10 insertions(+)
diff --git a/drivers
Make the preemption optimization effect only for SRIOV,
for it caused failure to resume from S3.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 7 +--
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 7 +--
3 files
The fences associated with mes queue have to be freed
up during amdgpu_ring_fini.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
To avoid new mes fw running with old driver, rename
mes schq fw to gc_*_mes_2.bin.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 26 +
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
b
Freeing memory was warned during suspend.
Move the self test out of suspend.
Link: https://bugzilla.redhat.com/show_bug.cgi?id=2151825
Cc: jfale...@redhat.com
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 +-
2
Reduce waringings, only warn when DMA is unavailable.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index
Update the api def of mes11.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/include/mes_v11_api_def.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
index 7e85cdc5bd34
Enable reg active poll in mes11.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 02ad84a1526a..a3e7062b7f77 100644
--- a/drivers/gpu/drm
If mes enabled, reserve VM invalidation engine 5 for firmware.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 4365ede42855
Allocate and enable aggregated doorbell.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 58 +-
1 file changed, 57 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index
Port aggregated doorbell support to gfx11.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 82 ++
1 file changed, 71 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index
Port aggregated doorbell support to sdma6.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 80 ++
1 file changed, 57 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
index
From: Le Ma
Ring aggregated doorbel to make unmapped queue scheduled in mes firmware.
Signed-off-by: Le Ma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 7 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 3 +
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 82 +
drivers/gpu/d
From: Le Ma
Allocate and enable aggregated doorbell.
Signed-off-by: Le Ma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 16 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 2 +-
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 58 -
3 files changed, 70 insertions(+), 6 dele
Set corresponding ready flag for mes ring when enable or disable
mes ring.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 3 +++
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
b
For some cases (accessing registers, unmap legacy queue), it needs
access mes in atomic context. Use spinlock to protect agaist mes
ring buffer race condition.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 16 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 1
Need reserve buffers before unmap mes ctx bo va.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 59 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 2 +
2 files changed, 58 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
MES fw updated to support unmapping legacy gfx/compute queue.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 9 -
drivers/gpu/drm/amd/include/mes_v11_api_def.h | 6 +-
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd
This reverts commit 5af39cf2fbadbaac1a04c94a604b298a9a325670
since drv enabled mes to access registers.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 51 +-
1 file changed, 1 insertion(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Enable mes to access registers.
v2: squash mes sched ring enablement flag
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 6 ++
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu
Use read/write register to test mes ring.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 36 +
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 1 +
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 6 +
3 files changed, 43 insertions(+)
diff --git a
Add mes register access routines:
1. read register
2. write register
3. wait register
4. write and wait register
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 132 +++-
1 file changed, 131 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
Add misc op commands in mes11.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 53 ++
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index d5200cbceb8a..e2aa1ebb3a00
Update MES firmware api for accessing registers.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/include/mes_v11_api_def.h | 37 +--
1 file changed, 26 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
b/drivers/gpu/drm/amd/include
Add common interface for mes misc op, including accessing register
interface.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 46 +
1 file changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
b/drivers/gpu/drm/amd/amdgpu
MES requires mc wptr address for usermode queues.
Export bo gart address for mc wptr address.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 10 --
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 2 ++
drivers/gpu/drm/amd/amdgpu
Initialize the cpu/gpu address of rptr/wptr/fence.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 37
1 file changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
b/drivers/gpu/drm/amd/amdgpu
Use ring structure to access the cpu/gpu address of rptr/wptr.
v2: merge gfx10/sdma5/sdma5.2 patches
Signed-off-by: Jack Xiao
Reviewed-by: Christian König
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 8 +++---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 37
assign the cpu/gpu address of fence for the normal or mes ring
from ring structure.
Signed-off-by: Jack Xiao
Reviewed-by: Hawking Zhang
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
Define ring structure to access the cpu/gpu address of rptr/wptr/fence
instead of dynamic calculation.
Cc: Christian König
Suggested-by: Christian König
Signed-off-by: Jack Xiao
Reviewed-by: Hawking Zhang
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 6 ++
1
During preemption test for gfx10, it uses kiq to trigger
gfx preemption, which would result in race condition
with flushing TLB for kiq.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu
Remove signaled jobs from job list and ensure the
job was indeed preempted.
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers
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