Re: [PATCH v6 12/12] x86/traps: Fix up invalid PASID

2020-08-03 Thread Fenghua Yu
Hi, Andy, On Fri, Jul 31, 2020 at 06:28:37PM -0700, Andy Lutomirski wrote: > On Mon, Jul 13, 2020 at 4:48 PM Fenghua Yu wrote: > > > > A #GP fault is generated when ENQCMD instruction is executed without > > a valid PASID value programmed in the current thread's PA

Re: [PATCH v6 12/12] x86/traps: Fix up invalid PASID

2020-08-03 Thread Fenghua Yu
Hi, Andy, On Fri, Jul 31, 2020 at 04:34:11PM -0700, Andy Lutomirski wrote: > On Mon, Jul 13, 2020 at 4:48 PM Fenghua Yu wrote: > > > > A #GP fault is generated when ENQCMD instruction is executed without > > a valid PASID value programmed in the current thread's PA

Re: [PATCH v6 01/12] iommu: Change type of pasid to u32

2020-07-22 Thread Fenghua Yu
Hi, Joerg, On Wed, Jul 22, 2020 at 04:03:40PM +0200, Joerg Roedel wrote: > On Mon, Jul 13, 2020 at 04:47:56PM -0700, Fenghua Yu wrote: > > PASID is defined as a few different types in iommu including "int", > > "u32", and "unsigned int". To be cons

Re: [PATCH v6 03/12] docs: x86: Add documentation for SVA (Shared Virtual Addressing)

2020-07-16 Thread Fenghua Yu
Hi, Yi, On Mon, Jul 13, 2020 at 08:25:20PM -0700, Liu, Yi L wrote: > > From: Fenghua Yu > > Sent: Tuesday, July 14, 2020 7:48 AM > > From: Ashok Raj Thank you for your comments! But I think we don't need to update this patch because the current text is better than sug

Re: [PATCH v6 01/12] iommu: Change type of pasid to u32

2020-07-14 Thread Fenghua Yu
On Mon, Jul 13, 2020 at 07:45:49PM -0700, Liu, Yi L wrote: > > From: Fenghua Yu > > Sent: Tuesday, July 14, 2020 7:48 AM > > > > PASID is defined as a few different types in iommu including "int", > > "u32", and "unsigned int". To be con

[PATCH v6 07/12] mm: Define pasid in mm

2020-07-14 Thread Fenghua Yu
PASID is shared by all threads in a process. So the logical place to keep track of it is in the "mm". Both ARM and X86 need to use the PASID in the "mm". Suggested-by: Christoph Hellwig Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v4: - Change PASID type to

[PATCH v6 04/12] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions

2020-07-14 Thread Fenghua Yu
ENQCMDS. There isn't any usage of ENQCMD in the kernel as of now. The CPU feature flag is shown as "enqcmd" in /proc/cpuinfo. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Re-write commit message (Thomas) arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/c

[PATCH v6 09/12] x86/process: Clear PASID state for a newly forked/cloned thread

2020-07-14 Thread Fenghua Yu
s Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Modify init_task_pasid(). arch/x86/kernel/process.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index f362ce0d5ac0..1b1492e337a6 100644 --- a/arch/

[PATCH v6 08/12] fork: Clear PASID for new mm

2020-07-14 Thread Fenghua Yu
When a new mm is created, its PASID should be cleared, i.e. the PASID is initialized to its init state 0 on both ARM and X86. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Add this patch to initialize PASID value for a new mm. include/linux/mm_types.h | 2 ++ kernel/fork.c

[PATCH v6 05/12] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature

2020-07-14 Thread Fenghua Yu
From: Yu-cheng Yu ENQCMD instruction reads PASID from IA32_PASID MSR. The MSR is stored in the task's supervisor FPU PASID state and is context switched by XSAVES/XRSTORS. Signed-off-by: Yu-cheng Yu Co-developed-by: Fenghua Yu Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck -

[PATCH v6 03/12] docs: x86: Add documentation for SVA (Shared Virtual Addressing)

2020-07-14 Thread Fenghua Yu
From: Ashok Raj ENQCMD and Data Streaming Accelerator (DSA) and all of their associated features are a complicated stack with lots of interconnected pieces. This documentation provides a big picture overview for all of the features. Signed-off-by: Ashok Raj Co-developed-by: Fenghua Yu Signed

[PATCH v6 01/12] iommu: Change type of pasid to u32

2020-07-14 Thread Fenghua Yu
xplicit than "unsigned int". No PASID type change in uapi although it defines PASID as __u64 in some places. Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck Reviewed-by: Lu Baolu Acked-by: Felix Kuehling --- v6: - Change return type to u32 for kfd_pas

[PATCH v6 02/12] iommu/vt-d: Change flags type to unsigned int in binding mm

2020-07-14 Thread Fenghua Yu
"flags" passed to intel_svm_bind_mm() is a bit mask and should be defined as "unsigned int" instead of "int". Change its type to "unsigned int". Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck Reviewed-by: Lu Baolu --- v5

[PATCH v6 06/12] x86/msr-index: Define IA32_PASID MSR

2020-07-14 Thread Fenghua Yu
The IA32_PASID MSR (0xd93) contains the Process Address Space Identifier (PASID), a 20-bit value. Bit 31 must be set to indicate the value programmed in the MSR is valid. Hardware uses PASID to identify process address space and direct responses to the right address space. Signed-off-by: Fenghua

[PATCH v6 12/12] x86/traps: Fix up invalid PASID

2020-07-14 Thread Fenghua Yu
other reason 3) Try initializing the PASID MSR and returning. If the #GP was from an ENQCMD this will fix it. If not, the #GP fault will be repeated and will hit case "2". Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck Reviewed-by: Lu Baolu

[PATCH v6 11/12] sched: Define and initialize a flag to identify valid PASID in the task

2020-07-14 Thread Fenghua Yu
From: Peter Zijlstra The flag is defined for the task to identify if the task has a valid PASID. Its initial value is 0 when the task is forked/cloned. It will be used shortly. Signed-off-by: Peter Zijlstra Co-developed-by: Fenghua Yu Signed-off-by: Fenghua Yu --- v2: - Add this patch to

[PATCH v6 00/12] x86: tag application address space for devices

2020-07-14 Thread Fenghua Yu
m_struct (Christoph). Jean-Philippe Brucker released a virtually same patch. Upstream only needs one of the two. - Add patch 9 to initialize PASID in a new mm. - Plus other changes described in each patch (Thomas) Ashok Raj (1): docs: x86: Add documentation for SVA (Shared Virtual Addressing)

[PATCH v6 10/12] x86/mmu: Allocate/free PASID

2020-07-14 Thread Fenghua Yu
w many SVM devices are sharing the PASID). Currently the ENQCMD feature cannot be used if CONFIG_INTEL_IOMMU_SVM is not set. Add X86_FEATURE_ENQCMD to the disabled features mask as appropriate and use cpu_feature_enabled() to check the feature. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck Revie

Re: [PATCH v5 00/12] x86: tag application address space for devices

2020-07-07 Thread Fenghua Yu
Hi, Thomas, Joerg, Boris, Ingo, Baolu, and x86/iommu maintainers, On Tue, Jun 30, 2020 at 04:44:30PM -0700, Fenghua Yu wrote: > Typical hardware devices require a driver stack to translate application > buffers to hardware addresses, and a kernel-user transition to notify the > hardwa

Re: [PATCH v5 01/12] iommu: Change type of pasid to u32

2020-07-03 Thread Fenghua Yu
Hi, Felix, Thomas, Joerg and maintainers, On Tue, Jun 30, 2020 at 10:12:38PM -0400, Felix Kuehling wrote: > Am 2020-06-30 um 7:44 p.m. schrieb Fenghua Yu: > You didn't change the return types of amdgpu_pasid_alloc and > kfd_pasid_alloc. amdgpu_pasid_alloc returns int, because

[PATCH v5 00/12] x86: tag application address space for devices

2020-06-30 Thread Fenghua Yu
quot;pasid" to generic mm_struct (Christoph). Jean-Philippe Brucker released a virtually same patch. Upstream only needs one of the two. - Add patch 9 to initialize PASID in a new mm. - Plus other changes described in each patch (Thomas) Ashok Raj (1): docs: x86: Add documentation for

[PATCH v5 10/12] x86/mmu: Allocate/free PASID

2020-06-30 Thread Fenghua Yu
w many SVM devices are sharing the PASID). Currently the ENQCMD feature cannot be used if CONFIG_INTEL_IOMMU_SVM is not set. Add X86_FEATURE_ENQCMD to the disabled features mask as appropriate and use cpu_feature_enabled() to check the feature. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck Revie

[PATCH v5 04/12] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions

2020-06-30 Thread Fenghua Yu
ENQCMDS. There isn't any usage of ENQCMD in the kernel as of now. The CPU feature flag is shown as "enqcmd" in /proc/cpuinfo. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Re-write commit message (Thomas) arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/c

[PATCH v5 11/12] sched: Define and initialize a flag to identify valid PASID in the task

2020-06-30 Thread Fenghua Yu
From: Peter Zijlstra The flag is defined for the task to identify if the task has a valid PASID. Its initial value is 0 when the task is forked/cloned. It will be used shortly. Signed-off-by: Peter Zijlstra Co-developed-by: Fenghua Yu Signed-off-by: Fenghua Yu --- v2: - Add this patch to

[PATCH v5 01/12] iommu: Change type of pasid to u32

2020-06-30 Thread Fenghua Yu
xplicit than "unsigned int". No PASID type change in uapi although it defines PASID as __u64 in some places. Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck Reviewed-by: Lu Baolu --- v5: - Reviewed by Lu Baolu v4: - Change PASID type from "u

[PATCH v5 08/12] fork: Clear PASID for new mm

2020-06-30 Thread Fenghua Yu
When a new mm is created, its PASID should be cleared, i.e. the PASID is initialized to its init state 0 on both ARM and X86. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Add this patch to initialize PASID value for a new mm. include/linux/mm_types.h | 2 ++ kernel/fork.c

[PATCH v5 05/12] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature

2020-06-30 Thread Fenghua Yu
From: Yu-cheng Yu ENQCMD instruction reads PASID from IA32_PASID MSR. The MSR is stored in the task's supervisor FPU PASID state and is context switched by XSAVES/XRSTORS. Signed-off-by: Yu-cheng Yu Co-developed-by: Fenghua Yu Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck -

[PATCH v5 02/12] iommu/vt-d: Change flags type to unsigned int in binding mm

2020-06-30 Thread Fenghua Yu
"flags" passed to intel_svm_bind_mm() is a bit mask and should be defined as "unsigned int" instead of "int". Change its type to "unsigned int". Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck Reviewed-by: Lu Baolu --- v5

[PATCH v5 03/12] docs: x86: Add documentation for SVA (Shared Virtual Addressing)

2020-06-30 Thread Fenghua Yu
From: Ashok Raj ENQCMD and Data Streaming Accelerator (DSA) and all of their associated features are a complicated stack with lots of interconnected pieces. This documentation provides a big picture overview for all of the features. Signed-off-by: Ashok Raj Co-developed-by: Fenghua Yu Signed

[PATCH v5 07/12] mm: Define pasid in mm

2020-06-30 Thread Fenghua Yu
PASID is shared by all threads in a process. So the logical place to keep track of it is in the "mm". Both ARM and X86 need to use the PASID in the "mm". Suggested-by: Christoph Hellwig Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v4: - Change PASID type to

[PATCH v5 09/12] x86/process: Clear PASID state for a newly forked/cloned thread

2020-06-30 Thread Fenghua Yu
s Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Modify init_task_pasid(). arch/x86/kernel/process.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index f362ce0d5ac0..1b1492e337a6 100644 --- a/arch/

[PATCH v5 12/12] x86/traps: Fix up invalid PASID

2020-06-30 Thread Fenghua Yu
other reason 3) Try initializing the PASID MSR and returning. If the #GP was from an ENQCMD this will fix it. If not, the #GP fault will be repeated and will hit case "2". Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck Reviewed-by: Lu Baolu

[PATCH v5 06/12] x86/msr-index: Define IA32_PASID MSR

2020-06-30 Thread Fenghua Yu
The IA32_PASID MSR (0xd93) contains the Process Address Space Identifier (PASID), a 20-bit value. Bit 31 must be set to indicate the value programmed in the MSR is valid. Hardware uses PASID to identify process address space and direct responses to the right address space. Signed-off-by: Fenghua

Re: [PATCH v2 02/12] ocxl: Change type of pasid to unsigned int

2020-06-18 Thread Fenghua Yu
Hi, Frederic, On Thu, Jun 18, 2020 at 10:05:19AM +0200, Frederic Barrat wrote: > > > Le 13/06/2020 à 02:41, Fenghua Yu a écrit : > >PASID is defined as "int" although it's a 20-bit value and shouldn't be > >negative int. To be consistent with type defin

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-16 Thread Fenghua Yu
Hi, Peter, On Mon, Jun 15, 2020 at 09:09:28PM +0200, Peter Zijlstra wrote: > On Mon, Jun 15, 2020 at 11:55:29AM -0700, Fenghua Yu wrote: > > > Or do you suggest to add a random new flag in struct thread_info instead > > of a TIF flag? > > Why thread_info? What's wro

Re: [PATCH v2 08/12] mm: Define pasid in mm

2020-06-16 Thread Fenghua Yu
Hi, Jean, On Tue, Jun 16, 2020 at 10:28:19AM +0200, Jean-Philippe Brucker wrote: > On Fri, Jun 12, 2020 at 05:41:29PM -0700, Fenghua Yu wrote: > > diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h > > index 64ede5f150dc..5778db3aa42d 100644 > > --- a/inc

Re: [PATCH v2 04/12] docs: x86: Add documentation for SVA (Shared Virtual Addressing)

2020-06-16 Thread Fenghua Yu
Hi, Baolu, On Sat, Jun 13, 2020 at 08:17:40PM +0800, Lu Baolu wrote: > Hi Fenghua, > > On 2020/6/13 8:41, Fenghua Yu wrote: > >+implement implement fairness or ensure forward progress can be made. > > Repeated "implement". Will fix this. > >+For example,

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Fenghua Yu
Hi, Peter, On Mon, Jun 15, 2020 at 09:09:28PM +0200, Peter Zijlstra wrote: > On Mon, Jun 15, 2020 at 11:55:29AM -0700, Fenghua Yu wrote: > > > Or do you suggest to add a random new flag in struct thread_info instead > > of a TIF flag? > > Why thread_info? What's wro

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Fenghua Yu
Hi, Peter, On Mon, Jun 15, 2020 at 08:31:16PM +0200, Peter Zijlstra wrote: > On Mon, Jun 15, 2020 at 11:12:59AM -0700, Fenghua Yu wrote: > > > I don't get why you need a rdmsr here, or why not having one would > > > require a TIF flag. Is that because this MSR is XSAVE/X

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Fenghua Yu
On Mon, Jun 15, 2020 at 06:03:57PM +0200, Peter Zijlstra wrote: > On Mon, Jun 15, 2020 at 08:48:54AM -0700, Fenghua Yu wrote: > > Hi, Peter, > > On Mon, Jun 15, 2020 at 09:56:49AM +0200, Peter Zijlstra wrote: > > > On Fri, Jun 12, 2020 at 05:41:33PM

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Fenghua Yu
Hi, Peter, On Mon, Jun 15, 2020 at 09:56:49AM +0200, Peter Zijlstra wrote: > On Fri, Jun 12, 2020 at 05:41:33PM -0700, Fenghua Yu wrote: > > +/* > > + * Apply some heuristics to see if the #GP fault was caused by a thread > > + * that hasn't had the IA32_PASID MSR init

Re: [PATCH v2 00/12] x86: tag application address space for devices

2020-06-15 Thread Fenghua Yu
Hi, Peter, On Mon, Jun 15, 2020 at 09:52:02AM +0200, Peter Zijlstra wrote: > On Fri, Jun 12, 2020 at 05:41:21PM -0700, Fenghua Yu wrote: > > > This series only provides simple and basic support for ENQCMD and the MSR: > > 1. Clean up type definitions (patch 1-3). These p

[PATCH v2 09/12] fork: Clear PASID for new mm

2020-06-13 Thread Fenghua Yu
When a new mm is created, its PASID should be cleared, i.e. the PASID is initialized to its init state 0 on both ARM and X86. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Add this patch to initialize PASID value for a new mm. include/linux/mm_types.h | 2 ++ kernel/fork.c

[PATCH v2 06/12] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature

2020-06-13 Thread Fenghua Yu
From: Yu-cheng Yu ENQCMD instruction reads PASID from IA32_PASID MSR. The MSR is stored in the task's supervisor FPU PASID state and is context switched by XSAVES/XRSTORS. Signed-off-by: Yu-cheng Yu Co-developed-by: Fenghua Yu Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck -

[PATCH v2 00/12] x86: tag application address space for devices

2020-06-13 Thread Fenghua Yu
pasid" to generic mm_struct (Christoph). Jean-Philippe Brucker released a virtually same patch. Upstream only needs one of the two. - Add patch 9 to initialize PASID in a new mm. - Plus other changes described in each patch (Thomas) Ashok Raj (1): docs: x86: Add documentation for SVA (

[PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-13 Thread Fenghua Yu
other reason 3) Try initializing the PASID MSR and returning. If the #GP was from an ENQCMD this will fix it. If not, the #GP fault will be repeated and will hit case "2". Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Update the first p

[PATCH v2 11/12] x86/mmu: Allocate/free PASID

2020-06-13 Thread Fenghua Yu
w many SVM devices are sharing the PASID). Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Define a helper free_bind() to simplify error exit code in bind_mm() (Thomas) - Fix a ret error code in bind_mm() (Thomas) - Change pasid's type from "int" to "unsigned int"

[PATCH v2 01/12] iommu: Change type of pasid to unsigned int

2020-06-13 Thread Fenghua Yu
PASID is defined as a few different types in iommu including "int", "u32", and "unsigned int". To be consistent and to match with ioasid's type, define PASID and its variations (e.g. max PASID) as "unsigned int". No PASID type change in uapi. Suggeste

[PATCH v2 08/12] mm: Define pasid in mm

2020-06-13 Thread Fenghua Yu
PASID is shared by all threads in a process. So the logical place to keep track of it is in the "mm". Both ARM and X86 need to use the PASID in the "mm". Suggested-by: Christoph Hellwig Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - This new patch moves "

[PATCH v2 04/12] docs: x86: Add documentation for SVA (Shared Virtual Addressing)

2020-06-13 Thread Fenghua Yu
From: Ashok Raj ENQCMD and Data Streaming Accelerator (DSA) and all of their associated features are a complicated stack with lots of interconnected pieces. This documentation provides a big picture overview for all of the features. Signed-off-by: Ashok Raj Co-developed-by: Fenghua Yu Signed

[PATCH v2 07/12] x86/msr-index: Define IA32_PASID MSR

2020-06-13 Thread Fenghua Yu
The IA32_PASID MSR (0xd93) contains the Process Address Space Identifier (PASID), a 20-bit value. Bit 31 must be set to indicate the value programmed in the MSR is valid. Hardware uses PASID to identify process address space and direct responses to the right address space. Signed-off-by: Fenghua

[PATCH v2 02/12] ocxl: Change type of pasid to unsigned int

2020-06-13 Thread Fenghua Yu
PASID is defined as "int" although it's a 20-bit value and shouldn't be negative int. To be consistent with type defined in iommu, define PASID as "unsigned int". Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Create thi

[PATCH v2 10/12] x86/process: Clear PASID state for a newly forked/cloned thread

2020-06-13 Thread Fenghua Yu
s Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Modify init_task_pasid(). arch/x86/kernel/process.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index f362ce0d5ac0..1b1492e337a6 100644 --- a/arch/

[PATCH v2 05/12] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions

2020-06-13 Thread Fenghua Yu
ENQCMDS. There isn't any usage of ENQCMD in the kernel as of now. The CPU feature flag is shown as "enqcmd" in /proc/cpuinfo. Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Re-write commit message (Thomas) arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/c

[PATCH v2 03/12] iommu/vt-d: Change flags type to unsigned int in binding mm

2020-06-13 Thread Fenghua Yu
"flags" passed to intel_svm_bind_mm() is a bit mask and should be defined as "unsigned int" instead of "int". Change its type to "unsigned int". Suggested-by: Thomas Gleixner Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- v2: - Add this new pa

Re: drm/amdkfd: Change pasid's type to unsigned int

2020-05-22 Thread Fenghua Yu
Hi, Felix, On Fri, May 22, 2020 at 03:40:06PM -0400, Felix Kuehling wrote: > Hi Fenghua, > > The PASID width in KFD is currently limited to 16 bits. I believe this > reflects what our hardware can handle. KFD will never allocate a PASID > bigger than 16 bits. That said, I'm OK with changing this

drm/amdkfd: Change pasid's type to unsigned int

2020-05-22 Thread Fenghua Yu
Hi, Yong, In commit: 6027b1bf6071fc61a5aa11b9922a2e0e91bff1ea drm/amdkfd: Use hex print format for pasid pasid's type was change to "uint16_t" from "unsigned int" in struct kfd_process. But, pasid is a 20-bit value according to PCIe spec and other places in amdkfd (plus other iommu code) def