[PATCH 1/2] drm/amdgpu: Add psp command CONFIG_SQ_PERFMON

Add support for enable/disable perfmon profiling. Signed-off-by: Feifei Xu Suggested-by: Hawking Zhang Reviewed-by: Lijo Lazar --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 38 + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 4 +++ drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h

[PATCH 2/2] drm/amdkfd:Add kfd function to config sq perfmon

Expose the interface for kfd to config sq perfmon. Signed-off-by: Feifei Xu Suggested-by: Hawking Zhang Reviewed-by: Lijo Lazar --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 15 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 3 +++ 2 files changed, 18 insertions(+) diff

[PATCH] drm/amdgpu:Check gfx poweron when skip flush_gpu_tlb

To fix the gpu recovery failed on GFX11 with gfxhub pagefault, flush gpu tlb after reset on GFX11. Gfxhub tlb flush need check if adev->gfx.is_poweron set. Fixes: d0c860f33553 ("drm/amdgpu: rework lock handling for flush_tlb v2") Signed-off-by: Feifei Xu --- drivers/gpu/d

[PATCH] drm/amdgpu: extend the default timeout for kernel compute queues

Extend to 120s. The default timeout value should also extend if compute shader execution time extended. Otherwise some stress test will trigger compute ring timeout in software. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++-- 1 file changed, 2 insertions(+), 2

[PATCH] drm/amd/pm: fix return value in aldebaran_set_mp1_state()

We should just return error in invalid case. For valid but not implemented one, do nothing and return 0. Otherwise resume will abort because of the wrong return value. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 6 -- 1 file changed, 4 insertions(+), 2

[PATCH 2/2] drm/amdgpu: Correct and simplify sdma 4.x irq.num_types

Correct and init the sdma4.x irq.num_types. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 29 -- 1 file changed, 9 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index

[PATCH 1/2] drm/amdgpu: Change the sdma interrupt print level

Change the print level into debug. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 2800b1b1f2ff

[PATCH 2/2] drm/amdgpu: Change the sdma interrupt print level

Change the print level into debug. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 2800b1b1f2ff

[PATCH 1/2] drm/amdgpu: Correct sdma 4.x irq.num_types

correct and init the sdma4.x irq.num_types. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index

[PATCH] drm/amdgpu: correct sdma 4.x irq.num_types.

Change the sdma interrupt info print level to debug. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 28 +++--- 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu

[PATCH] drm/amdgpu: use ratelimited print in sdma4 interrupt

dev_*_ratelimited printing will avoid dmesg flush. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index

[PATCH] drm/amdgpu: skip PP_MP1_STATE_UNLOAD on aldebaran

This message is not needed on Aldebaran. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 389730a38e19..9e769cf6095b

[PATCH v2] drm/amdgpu: Use dev_info if VFCT table not valid

Some ASICs do not have GOP driver to copy vbios image into VFCT table. And it will go to next check. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c b

[PATCH] drm/amdgpu: Use DRM_INFO if VFCT table not valid

Some ASICs has no GOP driver to copy vbios image to VFCT table. In this case, it will go to next check. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

[PATCH] drm/amdgpu:disable XGMI TA unload for A+A aldebaran

In gpu reset, XGMI TA unload will cause gpu hang. Skip it on A+A aldebaran. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu

[PATCH 1/2] drm/amdgpu: add amdgpu_device_is_headless() func

Add headless check function for NV and afterwards. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 drivers/gpu/drm/amd/amdgpu/nv.c| 2 +- drivers/gpu/drm/amd/amdgpu

[PATCH 2/2] drm/amdgpu: skip query VFCT table for headless ASICs

There will be no GOP driver to copy vbios image to VFCT table for headless ASICs. Thus skip VFCT. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH] drm/amdgpu: remove ECO_BITS programing on gmc9

Remove the ECO_BITS programing in driver on gfxhub1.0, mmhub1_x and mmhub_9.4. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 1 - drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 1 - drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c | 1 - drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

[PATCH] drm/amdgpu: add sdma 4_x interrupts printing

Add VM_HOLE/DOORBELL_INVALID_BE/POLL_TIMEOUT/SRBMWRITE interrupt info printing. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 5 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 119 +++ 2 files changed, 124 insertions(+) diff --git a/drivers/gpu/drm

[PATCH] drm/amdgpu: simplify the sdma 4_x MGCG/MGLS logic.

SDMA 4_x asics share the same MGCG/MGLS setting. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 20 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index

[PATCH] drm/amdgpu: simplify the sdma 4_x MGCG/MGLS logic.

SDMA 4_x asics share the same MGCG/MGLS setting. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index

[PATCH] drm/amdgpu: simplify the sdma 4_x MGCG/MGLS logic.

SDMA 4_x asics share the same MGCG/MGLS setting. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index

[PATCH] drm/amdgpu: soc15 pcie gen4 support

Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/soc15.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 28b991904eaa..437cdc56bdc5 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c

[PATCH] drm/amdgpu: add sdma 4_x interrupts printing

Add VM_HOLE/DOORBELL_INVALID_BE/POLL_TIMEOUT/SRBMWRITE interrupt info printing. Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 5 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 119 +++ 2 files changed, 124 insertions(+) diff --git a/drivers/gpu/drm

[PATCH] drm/amdgpu/runpm: disable runpm on Vega10

Some framework test will fail if enable runpm on Vega10. Disable it untill issue fixed. Signed-off-by: Feifei Xu Tested-by: Kyle Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd

[PATCH] drm/amdgpu: Set no-retry as default.

This is to improve performance. Signed-off-by: Feifei Xu Tested-by: Candice Li --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index

[PATCH] drm/amdgpu:skip ASIC_INIT when posting card on vg20

On vega20, the job of executing the ASIC_INIT table when posting card is moved to psp. Skip the atombios's ASIC_INIT on vega20 when posting card. Change-Id: Id1d3c0a0d19296d5ed804de7edf5b09b8d38c0a5 Signed-off-by: Feifei Xu Tested-by: Candice Li --- drivers/gpu/drm/amd/amdgpu/amdgpu_dev

[PATCH] drm/amdgpu:skip ASIC_INIT when posting card on vg20

On vega20, the job of executing the ASIC_INIT table when posting card is moved to psp. Skip the atombios's ASIC_INIT on vega20 when posting card. Change-Id: Id1d3c0a0d19296d5ed804de7edf5b09b8d38c0a5 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++- 1 file ch

[PATCH] drm/amdgpu: Update gc_9_0 golden settings.

Add mmDB_DEBUG3 settings. Change-Id: I5797f8973673d94c090f1c4c3a1baf082b8ecba4 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 3594704a6f9b

[PATCH] drm/gfx9: Update gc goldensetting for vega20.

Update mmCB_DCC_CONFIG register goldensetting. Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index eb50d86..3647729

[PATCH 8/8] drm/amdgpu: program system bit for pte/pde when ZFB is enabled

Change-Id: I9e4babf1e91855fb66e65cf2f82db64a1cd6fc97 Signed-off-by: Hawking Zhang Signed-off-by: Feifei Xu Acked-by: John Bridgman Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++ drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 6 ++ drivers/gpu/drm/amd/amdgpu

[PATCH 7/8] drm/amdgpu: program AGP aperture as frame buffer when ZFB is enabled

From: Hawking Zhang Change-Id: I09f9ddea0ad23af00fadd9af7aaccf7160e4e569 Signed-off-by: Hawking Zhang Acked-by: John Bridgman Reviewed-by: Alex Deucher Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 19 +++ drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

[PATCH 6/8] drm/amdgpu: enable physical transaction for ptd/pde when ZFB is enabled

Change-Id: I2b45d765f1f60252fa1c02aced94f8100d575ddc Signed-off-by: Hawking Zhang Signed-off-by: Feifei Xu Acked-by: John Bridgman Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 9 +++-- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 9 +++-- 2 files changed, 14

[PATCH 5/8] drm/amdgpu: user reserved zfb to init vram base offset and size

Change-Id: I866dd16548304a42298b0cb28741f27cba3a76ca Signed-off-by: Feifei Xu Signed-off-by: Hawking Zhang Acked-by: John Bridgman Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 26 -- 1 file changed, 20 insertions(+), 6 deletions(-) diff --git

[PATCH 4/8] drm/amdgpu: init zfb start address and size

Use module parameter passed from user to initialize zfb start address and size. Change-Id: I3d786e863114a217f89ff7c3d4ffdabf000f31a4 Signed-off-by: Feifei Xu Signed-off-by: Hawking Zhang Acked-by: John Bridgman Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10

[PATCH 3/8] drm/amdgpu: add amdgpu module parameter for zfb

-by: Feifei Xu Acked-by: John Bridgman Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 + 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h in

[PATCH 2/8] drm/amdgpu: add new member in amdgpu_mc for zfb support

Change-Id: I8253c8ff80e0cbd1f12e5ee801600e7619e6718f Signed-off-by: Hawking Zhang Signed-off-by: Feifei Xu Acked-by: John Bridgman Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 1/8] drm/amdgpu: Fix hardcoded base offset of vram pages

In gmc_v9_0_vram_gtt_location(),the vram_base_offset is hardcoded to 0 in dGPU. Fix it by reading mmMC_VM_FB_OFFSET or return zfb_phys_addr if ZFB is enabled. Change-Id: I585b7d4d96ebab2a5d7178fe8d1d6a746ef0c72a Signed-off-by: Feifei Xu Signed-off-by: Hawking Zhang --- drivers/gpu/drm/amd

[PATCH 8/9] drm/amdgpu: init mc base address for zfb

From: Hawking Zhang Change-Id: I89b9ff36b62eb685a9e2d87e2058d200b92f5034 Signed-off-by: Hawking Zhang Acked-by: John Bridgman Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/

[PATCH 9/9] drm/amdgpu: program system bit for pte/pde when ZFB is enabled

Change-Id: Icfb8c1df201d3f22f1d8cdbaee55de6bebac8df6 Signed-off-by: Hawking Zhang Acked-by: John Bridgman --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++ drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 6 ++ drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 2 ++ 3 files changed, 10 insertions(+)

[PATCH 7/9] drm/amdgpu: program AGP aperture as frame buffer when ZFB is enabled

From: Hawking Zhang Change-Id: I32e6321da74a1bd87f13adbe8e7738023738e6d5 Signed-off-by: Hawking Zhang Acked-by: John Bridgman Reviewed-by: Alex Deucher Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 19 +++ drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

[PATCH 6/9] drm/amdgpu: enable physical transaction for ptd/pde when ZFB is enabled

From: Hawking Zhang Change-Id: I298b78b160f3894bdd56d9a14a20fbb7fb2ac645 Signed-off-by: Hawking Zhang Acked-by: John Bridgman --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 9 +++-- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 9 +++-- 2 files changed, 14 insertions(+), 4 deletions(-) d

[PATCH 5/9] drm/amdgpu: user reserved zfb to init vram base offset and size

Change-Id: I3beb3ca3f958fdd63b3ce7068b59ebf957b49a5a Signed-off-by: Hawking Zhang Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 5 - drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 18 +- 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a

[PATCH 3/9] drm/amdgpu: add amdgpu module parameter for zfb

-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 + 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 1b4c5ad..be79cb1 100644 --- a/drivers/gpu/drm/amd/amd

[PATCH 1/9] drm/amdgpu: Fix hardcoded base offset of vram pages

In gmc_v9_0_vram_gtt_location(),the vram_base_offset is hardcoded to 0 in dGPU. Fix it by reading mmMC_VM_FB_OFFSET or return zfb_phys_addr if ZFB is enabled. Change-Id: I585b7d4d96ebab2a5d7178fe8d1d6a746ef0c72a Signed-off-by: Feifei Xu Signed-off-by: Hawking Zhang --- drivers/gpu/drm/amd

[PATCH 4/9] drm/amdgpu: init zfb start address and size

Use module parameter passed from user to initialize zfb start address and size. Change-Id: Idd0ae02ef8010ec36baa4b03b01981e97b3e748a Signed-off-by: Feifei Xu Signed-off-by: Hawking Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 1 file changed, 12 insertions(+) diff

[PATCH 2/9] drm/amdgpu: add new member in amdgpu_mc for zfb support

Change-Id: I43ab31a68e93ef264fb8d8dd8a3dba59e2962fad Signed-off-by: Hawking Zhang Acked-by: John Bridgman --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h index

[PATCH 0/9] drm/amdgpu:Enable Full Zero Frame Buffer feature

This patch-set enabled Full Zero Frame Buffer. And fixed hardcoded base offset of vram pages issue. Enable the ZFB by: modprobe amdgpu zfb={zfb_size,zfb_phy_offset} Feifei Xu (6): drm/amdgpu: Fix hardcoded base offset of vram pages drm/amdgpu: add new member in amdgpu_mc for zfb support

[PATCH 1/8] drm/amd/include:cleanup raven1 sdma header files.

Cleanup asic_reg/raven1/SDMA0 folder.Remove unused sdma0_4_1_sh_mask.h. Change-Id: I3087f4b097e0971d221bcea96978b3fce942c49c Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/psp_v10_0.c |2 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c |2 +- .../asic_reg

[PATCH 8/8] drm/amd/include:cleanup raven1 vcn header files.

Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h. Signed-off-by: Feifei Xu Change-Id: Ic9a7796c169c93aa4c5f3c81fa323fc6a5c8ae42 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c| 2 +- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 4

[PATCH 7/8] drm/amd/include:cleanup raven1 thm header files.

Cleanup asic_reg/raven1/THM folder. Change-Id: I088cd61f42ee88ccf0c327b139d7a34c0fdadea5 Signed-off-by: Feifei Xu --- .../drm/amd/include/asic_reg/{raven1/THM => thm}/thm_10_0_default.h | 0 .../drm/amd/include/asic_reg/{raven1/THM => thm}/thm_10_0_offset.h | 0 .../drm/amd/include/as

[PATCH 5/8] drm/amd/include:cleanup raven1 mp header files.

Cleanup asic_reg/raven1/MP folder. Change-Id: Idda7bb5b39b479f7a408089de5eb135d739816a0 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 2 +- .../drm/amd/include/asic_reg/{raven1/MP => mp}/mp_10_0_default.h| 0 .../gpu/drm/amd/incl

[PATCH 6/8] drm/amd/include:cleanup raven1 nbio header files.

Cleanup asic_reg/raven1/NBIO folder. Signed-off-by: Feifei Xu Change-Id: Icaf08a09d6db5f2d52b1bb9ce855f2e3de5431e1 --- drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 6 +++--- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 2 +- .../amd/include

[PATCH 3/8] drm/amd/include:cleanup raven1 gc header files.

Cleanup asic_reg/raven1/GC folder. Remove unused files: gc_9_1_default.h gc_9_1_sh_mask.h Change-Id: I51abe8a8f9955cf220eae6f4f72b915b32c3d703 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 2 +- .../asic_reg/{raven1/GC => gc}/gc_9_1_offse

[PATCH 4/8] drm/amd/include:cleanup raven1 mmhub header files.

Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h Change-Id: I154b2564ca5875450c3822555b3bf7b98a87f880 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c |4 +- .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c |4 +- .../{raven1/MMHUB

[PATCH 2/8] drm/amd/include:cleanup raven1 dcn header files.

Cleanup asic_reg/raven1/DCN folder.Remove unused dcn_1_0_default.h. Change-Id: I6a427f5379a501783deac0cc3e73f7739c215acb Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |4 +- .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c |4 +- .../amd/display/dc

[PATCH 0/8] Cleanup raven1 header files.

meant to be applied with git apply. Feifei Xu (8): drm/amd/include:cleanup raven1 sdma header files. drm/amd/include:cleanup raven1 dcn header files. drm/amd/include:cleanup raven1 gc header files. drm/amd/include:cleanup raven1 mmhub header files. drm/amd/include:cleanup raven1 mp header

[PATCH 12/16] drm/amd/include:cleanup vega10 nbio header files.

Cleanup asic_reg/vega10/NBIO folder. Change-Id: I0c05dca48dbf027e0f3b57df58c4f764ee835c8d Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 6 +++--- drivers/gpu/drm

[PATCH 09/16] drm/amd/include:cleanup vega10 vce header files.

Cleanup asic_reg/vega10/VCE folder. Change-Id: I60d71f93eecf4ecb3957d8ac18305641fe66b7f1 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 6 +++--- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 6 +++--- .../drm/amd

[PATCH 08/16] drm/amd/include:cleanup vega10 uvd header files.

Cleanup asic_reg/vega10/UVD folder,remove unused uvd_7_0_default.h. Change-Id: I859427f9dbf9fe96b36cd730b5cfa3b2224b5aab Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 +- .../asic_reg/{vega10

[PATCH 06/16] drm/amd/include: cleanup vega10 umc header files.

Remove asic/vega10/UMC folder. Change-Id: Ic99f95e957c24cac3d5cb8768fa63452c8d1e505 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +- .../gpu/drm/amd/include/asic_reg/{vega10/UMC => umc}/umc_6_0_default.h | 0 .../gpu/drm/amd/incl

[PATCH 05/16] drm/amd/include:cleanup vega10 thm header files.

Cleanup asic_reg/vega10/THM folder. Change-Id: Ic4dcd42d5aaf9da38b936467bd340cd67b0235c6 Signed-off-by: Feifei Xu --- .../drm/amd/include/asic_reg/{vega10/THM => thm}/thm_9_0_default.h | 0 .../drm/amd/include/asic_reg/{vega10/THM => thm}/thm_9_0_offset.h | 0 .../drm/amd/include/as

[PATCH 02/16] drm/amd/include:cleanup vega10 hdp header files.

Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h Change-Id: Ia7cd2e660ceb89a1096c195c6a67677714ccbd69 Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +- drivers/gpu/drm/amd/amdgpu

[PATCH 16/16] drm/amd/include:cleanup vega10 header files.

Remove asic_reg/vega10 folder. Change-Id: Ic8d6c3d8aab278fe7050147b3d8d097a45c0ef4b Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c| 4 ++-- drivers/gpu/drm/amd/amdgpu

[PATCH 14/16] drm/amd/include:cleanup vega10 smuio header files.

Cleanup asic_reg/vega10/SMUIO folder. Change-Id: Iec10ed4cf8e967e1d12b8bfb15594abd9ecb309f Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/soc15.c | 4 +- .../{vega10/SMUIO => smuio}/smuio_9_0_offset.h | 0 .../{vega10/SMUIO => smuio}/smuio_9_0_sh_mask.h

[PATCH 13/16] drm/amd/include:cleanup vega10 nbif header files.

Cleanup asic_reg/vega10/NBIF folder. Change-Id: Iafd95103840eed8bcf0f2a7312fcbe85f4f99cd5 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c |2 +- .../{vega10/NBIF => nbif}/nbif_6_1_offset.h|0 .../{vega10/NBIF => nbif}/nbif_6_1_sh_

[PATCH 15/16] drm/amd/include:cleanup vega10 osssys header files.

Cleanup asic_reg/vega10/OSSSYS folder. Change-Id: Ie794e8fc42b9b4451fc9016e4bbe9a9421a8097e Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 4 +- .../{vega10/OSSSYS => oss}/osssys_4_0_offset.h | 0 .../{vega10/OSSSYS => oss}/osssys_4_0_sh_

[PATCH 11/16] drm/amd/include:cleanup vega10 mmhub header files.

Cleanup asic_reg/vega10/MMHUB folder. Change-Id: I889fbb4893d4c682f32e0551004fb090dd9311da Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 6 +++--- drivers/gpu/drm/amd

[PATCH 10/16] drm/amd/include:cleanup vega10 gc header files.

Cleanup asic_reg/vega10/GC folder. Signed-off-by: Feifei Xu Change-Id: I10b2a9a5a91748bae1973dbd266dfd2e6e429727 --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c| 6 +++--- drivers/gpu/drm/amd

[PATCH 07/16] drm/amd/include:cleanup vega10 dce header files.

Cleanup asic_reg/vega10/DC folder.Remove dce_12_0_default.h. Change-Id: I845e6551c6af8c01bf7964641cf89e8aa1658c11 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |4 +- .../amd/display/dc/dce120/dce120_hw_sequencer.c|4 +- .../drm/amd/display/dc

[PATCH 00/16] Cleanup vega10 header files.

apply. Feifei Xu (16): drm/amd/include:cleanup vega10 sdma0/1 header files. drm/amd/include:cleanup vega10 hdp header files. drm/amd/include:cleanup vega10 mp header files. drm/amd/include:cleanup vega10 athub header files. drm/amd/include:cleanup vega10 thm header files. drm/amd/include

[PATCH 03/16] drm/amd/include:cleanup vega10 mp header files.

Cleanup asic_reg/vega10/MP folder, remove mp_9_0_default.h Change-Id: Id53e6ab7a8bc78ff61457836b1b3ce499b158610 Signed-off-by: Feifei Xu Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/psp_v3_1.c |4 +- drivers/gpu/drm/amd/amdgpu/soc15.c |4

Re: [Resend 1/3] drm/amd/include:cleanup vega10 sdma0/1 header files.

Resend patch-set which cleanup vega10's sdma0/1,hdp,mp header files. No source code change from previous thread. Just omit the preimage for deletes and omit the renames to format a resonable size patch. -- -Feifei On 11/17/2017 06:27 PM, Feifei Xu wrote: To remove include/asic_reg/v

[Resend 3/3] drm/amd/include:cleanup vega10 mp header files.

To remove include/asic_reg/vega10 folder, this patch cleanup asic_reg/vega10/MP folder, and remove unused mp_9_0_default.h. Change-Id: Id53e6ab7a8bc78ff61457836b1b3ce499b158610 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 4 +- drivers/gpu/drm/amd/amdgpu

[Resend 2/3] drm/amd/include:cleanup vega10 hdp header files.

To remove include/asic_reg/vega10 folder,create IP folder hdp. This patch cleanup asic_reg/vega10/HDP folder, and remove unused hdp_4_0_default.h file. Change-Id: Ia7cd2e660ceb89a1096c195c6a67677714ccbd69 Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2

[Resend 1/3] drm/amd/include:cleanup vega10 sdma0/1 header files.

To remove include/asic_reg/vega10 folder,create IP folders sdma0/1. This patch cleanup asic_reg/vega10/SDMA folders. Change-Id: I861f4047cb23154f9094553b602157b01da9028e Signed-off-by: Feifei Xu --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 8 drivers/gpu/drm

Re: [PATCH 2/3] drm/amd/include:cleanup vega10 hdp header files.

On 11/17/2017 12:01 AM, Michel Dänzer wrote: On 16/11/17 11:29 AM, Xu, Feifei wrote: Resent the patch #1, yes, it is too large due to the header file movement. And I will send the coming cleanup patches separately to avoid message dropping. There's no need for anybody to download megabytes of

Re: [PATCH 2/3] drm/amd/include:cleanup vega10 hdp header files.

On 11/16/2017 10:59 PM, Alex Deucher wrote: On Thu, Nov 16, 2017 at 3:03 AM, Feifei Xu wrote: Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h Change-Id: Ia7cd2e660ceb89a1096c195c6a67677714ccbd69 Signed-off-by: Feifei Xu Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu